[v2] target/mips: Optimize support for certain MSA instructions

[Qemu-devel] [PATCH v2 0/4] target/mips: Optimize support for certain MSA instructions

Mateja Marjanovic posted 4 patches 6 years, 8 months ago

Diff against v1
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git fetch https://github.com/patchew-project/qemu tags/patchew/1551445720-19622-1-git-send-email-mateja.marjanovic@rt-rk.com

Maintainers: Aleksandar Markovic <amarkovic@wavecomp.com>, Aleksandar Rikalo <arikalo@wavecomp.com>, Aurelien Jarno <aurelien@aurel32.net>

target/mips/msa_helper.c | 236 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 205 insertions(+), 31 deletions(-)

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[Qemu-devel] [PATCH v2 0/4] target/mips: Optimize support for certain MSA instructions

Posted by Mateja Marjanovic 6 years, 8 months ago

From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com>

This series optimizes the support for certain MSA instructions.

v2:
  -Fixed indentation in two places
  -Fixed bugs for the cases when the destination register and
  one of the source registers are the same

Mateja Marjanovic (4):
  target/mips: Optimize support for MSA instructions ILVEV.<B|H|W|D>
  target/mips: Optimize support for MSA instructions ILVOD.<B|H|W|D>
  target/mips: Optimize support for MSA instructions ILVL.<B|H|W|D>
  target/mips: Optimize support for MSA instructions ILVR.<B|H|W|D>

 target/mips/msa_helper.c | 236 ++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 205 insertions(+), 31 deletions(-)

-- 
2.7.4