[Qemu-devel] [PATCH 4/4] target/mips: Optimize support for MSA instructions ILVR.<B|H|W|D>

Mateja Marjanovic posted 4 patches 6 years, 8 months ago
Maintainers: Aleksandar Markovic <amarkovic@wavecomp.com>, Aleksandar Rikalo <arikalo@wavecomp.com>, Aurelien Jarno <aurelien@aurel32.net>
There is a newer version of this series
[Qemu-devel] [PATCH 4/4] target/mips: Optimize support for MSA instructions ILVR.<B|H|W|D>
Posted by Mateja Marjanovic 6 years, 8 months ago
From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com>

Optimize support for MSA instructions ILVR.B, ILVR.H, ILVR.W, and
ILVR.D.

Optimization is done by eliminating loops, and explicitly assigning
desired values to individual data elements. Performance measurement
is done by executing the instructions large number of times on a
computer with Intel Core i7-3770 CPU @ 3.40GHz×8.

Measured time before optimization:
  ILVR.B:  115.84 ms
  ILVR.H:   94.20 ms
  ILVR.W:  121.12 ms
  ILVR.D:   41.36 ms

Measured time after optimization:
  ILVR.B:   61.06 ms
  ILVR.H:   43.03 ms
  ILVR.W:   39.21 ms
  ILVR.D:   39.18 ms

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
---
 target/mips/msa_helper.c | 59 +++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 51 insertions(+), 8 deletions(-)

diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 59aac72..ab797b1 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1182,14 +1182,6 @@ MSA_FN_DF(pckev_df)
 MSA_FN_DF(pckod_df)
 #undef MSA_DO
 
-#define MSA_DO(DF)                      \
-    do {                                \
-        pwx->DF[2*i]   = R##DF(pwt, i); \
-        pwx->DF[2*i+1] = R##DF(pws, i); \
-    } while (0)
-MSA_FN_DF(ilvr_df)
-#undef MSA_DO
-
 #undef MSA_LOOP_COND
 
 #define MSA_LOOP_COND(DF) \
@@ -1361,6 +1353,57 @@ void helper_msa_ilvl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
     }
 }
 
+void helper_msa_ilvr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
+    uint32_t ws, uint32_t wt)
+{
+    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+    switch (df) {
+    case DF_BYTE:
+        pwd->b[0]  = pwt->b[0];
+        pwd->b[1]  = pws->b[0];
+        pwd->b[2]  = pwt->b[1];
+        pwd->b[3]  = pws->b[1];
+        pwd->b[4]  = pwt->b[2];
+        pwd->b[5]  = pws->b[2];
+        pwd->b[6]  = pwt->b[3];
+        pwd->b[7]  = pws->b[3];
+        pwd->b[8]  = pwt->b[4];
+        pwd->b[9]  = pws->b[4];
+        pwd->b[10] = pwt->b[5];
+        pwd->b[11] = pws->b[5];
+        pwd->b[12] = pwt->b[6];
+        pwd->b[13] = pws->b[6];
+        pwd->b[14] = pwt->b[7];
+        pwd->b[15] = pws->b[7];
+        break;
+    case DF_HALF:
+        pwd->h[0] = pwt->h[0];
+        pwd->h[1] = pws->h[0];
+        pwd->h[2] = pwt->h[1];
+        pwd->h[3] = pws->h[1];
+        pwd->h[4] = pwt->h[2];
+        pwd->h[5] = pws->h[2];
+        pwd->h[6] = pwt->h[3];
+        pwd->h[7] = pws->h[3];
+        break;
+    case DF_WORD:
+        pwd->w[0] = pwt->w[0];
+        pwd->w[1] = pws->w[0];
+        pwd->w[2] = pwt->w[1];
+        pwd->w[3] = pws->w[1];
+        break;
+    case DF_DOUBLE:
+        pwd->d[0] = pwt->d[0];
+        pwd->d[1] = pws->d[0];
+        break;
+    default:
+        assert(0);
+    }
+}
+
 void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
                         uint32_t ws, uint32_t n)
 {
-- 
2.7.4