> From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> Sent: Tuesday, October 16, 2018 4:46 PM
> To: qemu-devel@nongnu.org
> Cc: aurelien@aurel32.net; Aleksandar Markovic; Stefan Markovic; Petar Jovanovic; > peter.maydell@linaro.org
> Subject: [PATCH] target/mips: Fix misplaced 'break' in NM_SHRA_R_PH handling
>
> From: Stefan Markovic <smarkovic@wavecomp.com>
>
> Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by
> Coverity (CID 1395627).
>
> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index faf05ae..e93c6f9 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -19991,8 +19991,8 @@ static void gen_pool32a5_nanomips_insn(DisasContext *ctx, int > opc,
> case 0:
> /* SHRA_PH */
> gen_helper_shra_ph(v1_t, t0, v1_t);
> - break;
> gen_store_gpr(v1_t, rt);
> + break;
> case 1:
> /* SHRA_R_PH */
> gen_helper_shra_r_ph(v1_t, t0, v1_t);
> --
> 2.7.4
>
>