From: Aleksandar Markovic <amarkovic@wavecomp.com>

The following changes since commit 659b11e7a7239529cfdb4968418268ff9aa22d88:

  Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging (2018-08-21 11:36:15 +0100)

are available in the git repository at:

  https://github.com/AMarkovic/qemu tags/mips-queue-aug-21-2018

for you to fetch changes up to 7bfa634d0a73b74f2b84a5cd13d055e61210c356:

  target/mips: Add definition of nanoMIPS I7200 CPU (2018-08-21 14:59:32 +0200)

----------------------------------------------------------------
MIPS queue August 21, 2018 v3

In v2, the initial ('since') commit was wrong.
In v1, there were three missing "Reviewed-by" lines. Please use

----------------------------------------------------------------

Aleksandar Markovic (5):
  target/mips: Add preprocessor constants for nanoMIPS
  target/mips: Add placeholder and invocation of decode_nanomips_opc()
  target/mips: Add nanoMIPS decoding and extraction utilities
  elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too
  elf: Don't check FCR31_NAN2008 bit for nanoMIPS

Aleksandar Rikalo (4):
  target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair
  target/mips: Fix pre-nanoMIPS MT ASE instructions availability control
  elf: Add EM_NANOMIPS value as a valid one for e_machine field
  elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for
    MIPS

Dimitrije Nikolic (2):
  target/mips: Add CP0 Config3 and Config5 fields to DisasContext
    structure
  target/mips: Add availability control via bit NMS

James Hogan (1):
  target/mips: Implement emulation of nanoMIPS EXTW instruction

Matthew Fortune (3):
  target/mips: Implement emulation of nanoMIPS ROTX instruction
  disas: Add support for nanoMIPS platform
  mips_malta: Add basic nanoMIPS boot code for Malta board

Paul Burton (1):
  mips_malta: Add setting up GT64120 BARs to the nanoMIPS bootloader

Stefan Markovic (15):
  target/mips: Add nanoMIPS DSP ASE opcodes
  target/mips: Prevent switching mode related to Config3 ISA bit for
    nanoMIPS
  target/mips: Add emulation of nanoMIPS 16-bit branch instructions
  target/mips: Add emulation of nanoMIPS 16-bit save and restore
    instructions
  target/mips: Add emulation of nanoMIPS 32-bit branch instructions
  target/mips: Implement MT ASE support for nanoMIPS
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 1
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 2
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 3
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 4
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 5
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 6
  target/mips: Add updating BadInstr and BadInstrX for nanoMIPS
  mips_malta: Fix semihosting argument passing for nanoMIPS bare metal
  target/mips: Add definition of nanoMIPS I7200 CPU

Yongbok Kim (15):
  target/mips: Add nanoMIPS base instruction set opcodes
  target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions
  target/mips: Add emulation of nanoMIPS 16-bit shift instructions
  target/mips: Add emulation of nanoMIPS 16-bit misc instructions
  target/mips: Add emulation of nanoMIPS 16-bit load and store
    instructions
  target/mips: Add emulation of nanoMIPS 16-bit logic instructions
  target/mips: Add emulation of some common nanoMIPS 32-bit instructions
  target/mips: Add emulation of nanoMIPS instructions MOVE.P and
    MOVE.PREV
  target/mips: Add emulation of nanoMIPS 48-bit instructions
  target/mips: Add emulation of nanoMIPS FP instructions
  target/mips: Add emulation of misc nanoMIPS instructions (pool32a0)
  target/mips: Add emulation of misc nanoMIPS instructions (pool32axf)
  target/mips: Add emulation of misc nanoMIPS instructions (p_lsx)
  target/mips: Add emulation of nanoMIPS 32-bit load and store
    instructions
  target/mips: Fix ERET/ERETNC behavior related to ADEL exception

 MAINTAINERS                      |     2 +
 disas/Makefile.objs              |     1 +
 disas/mips.c                     |    90 +-
 disas/nanomips.cpp               | 15812 +++++++++++++++++++++++++++++++++++++
 disas/nanomips.h                 |  1100 +++
 hw/mips/mips_malta.c             |   212 +-
 include/disas/bfd.h              |     1 +
 include/elf.h                    |     2 +
 include/hw/elf_ops.h             |     8 +
 linux-user/elfload.c             |     2 +
 linux-user/mips/cpu_loop.c       |    28 +-
 target/mips/cpu.c                |    11 +-
 target/mips/cpu.h                |     2 +
 target/mips/helper.c             |    16 +
 target/mips/helper.h             |     2 +
 target/mips/mips-defs.h          |     4 +
 target/mips/op_helper.c          |    98 +-
 target/mips/translate.c          |  4983 +++++++++++-
 target/mips/translate_init.inc.c |    39 +
 19 files changed, 22330 insertions(+), 83 deletions(-)
 create mode 100644 disas/nanomips.cpp
 create mode 100644 disas/nanomips.h

-- 
2.7.4

On 21 August 2018 at 14:31, Aleksandar Markovic
<aleksandar.markovic@rt-rk.com> wrote:
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> The following changes since commit 659b11e7a7239529cfdb4968418268ff9aa22d88:
>
>   Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging (2018-08-21 11:36:15 +0100)
>
> are available in the git repository at:
>
>   https://github.com/AMarkovic/qemu tags/mips-queue-aug-21-2018
>
> for you to fetch changes up to 7bfa634d0a73b74f2b84a5cd13d055e61210c356:
>
>   target/mips: Add definition of nanoMIPS I7200 CPU (2018-08-21 14:59:32 +0200)
>
> ----------------------------------------------------------------
> MIPS queue August 21, 2018 v3
>
> In v2, the initial ('since') commit was wrong.
> In v1, there were three missing "Reviewed-by" lines. Please use
>
> ----------------------------------------------------------------

Hi; I'm afraid this fails to build on clang for the linux-user
targets:

/home/petmay01/linaro/qemu-for-merges/target/mips/translate.c:1947:20:
error: unused function 'check_cp0_mt' [-Werror,-Wunused-function]
static inline void check_cp0_mt(DisasContext *ctx)
                   ^
1 error generated.

This function is only called inside #ifndef CONFIG_USER_ONLY
sections, but the function definition is not similarly guarded.

thanks
-- PMM

> -------- Original Message --------
> Subject: Re: [PULL v3 00/46] MIPS queue August 21, 2018 v3
> Date: Thursday, August 23, 2018 12:19 CEST
> From: Peter Maydell <peter.maydell@linaro.org>
> To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> CC: QEMU Developers <qemu-devel@nongnu.org>
> References: <1534858316-12945-1-git-send-email-aleksandar.markovic@rt-rk.com>
>
>
>
> > On 21 August 2018 at 14:31, Aleksandar Markovic
> > <aleksandar.markovic@rt-rk.com> wrote:
> > > From: Aleksandar Markovic <amarkovic@wavecomp.com>
> > >
> > > The following changes since commit 659b11e7a7239529cfdb4968418268ff9aa22d88:
> > >
> > > Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging (2018-08-21 11:36:15 +0100)
> > >
> > > are available in the git repository at:
> > >
> > > https://github.com/AMarkovic/qemu tags/mips-queue-aug-21-2018
> > >
> > > for you to fetch changes up to 7bfa634d0a73b74f2b84a5cd13d055e61210c356:
> > >
> > > target/mips: Add definition of nanoMIPS I7200 CPU (2018-08-21 14:59:32 +0200)
> > >
> > > ----------------------------------------------------------------
> > > MIPS queue August 21, 2018 v3
> > >
> > > In v2, the initial ('since') commit was wrong.
> > > In v1, there were three missing "Reviewed-by" lines. Please use
> > >
> > > ----------------------------------------------------------------
> >
> > Hi; I'm afraid this fails to build on clang for the linux-user
> > targets:
> >
> > /home/petmay01/linaro/qemu-for-merges/target/mips/translate.c:1947:20:
> > error: unused function 'check_cp0_mt' [-Werror,-Wunused-function]
> > static inline void check_cp0_mt(DisasContext *ctx)
> > ^
> > 1 error generated.
> >
> > This function is only called inside #ifndef CONFIG_USER_ONLY
> > sections, but the function definition is not similarly guarded.
> >
> > thanks
> > -- PMM
>

OK. My bad. I am preparing a corrected pull request. Build tests are running for each patch. If all is well, I am going to send v4 afterwards.

Thanks,
Aleksandar