[Qemu-devel] [PATCH v7 53/80] elf: Add nanoMIPS specific variations in ELF header fields

Aleksandar Markovic posted 80 patches 7 years, 3 months ago
There is a newer version of this series
[Qemu-devel] [PATCH v7 53/80] elf: Add nanoMIPS specific variations in ELF header fields
Posted by Aleksandar Markovic 7 years, 3 months ago
From: Aleksandar Rikalo <arikalo@wavecomp.com>

Add nanoMIPS-related values in ELF header fields as specified in
nanoMIPS' "ELF ABI Supplement".

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 include/elf.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/elf.h b/include/elf.h
index 002a002..3f74fba 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -62,6 +62,24 @@ typedef int64_t  Elf64_Sxword;
 #define EF_MIPS_FP64      0x00000200
 #define EF_MIPS_NAN2008   0x00000400
 
+/* nanoMIPS architecture bits, EF_NANOMIPS_ARCH */
+#define EF_NANOMIPS_ARCH_32R6 0x00000000  /* 32-bit nanoMIPS Release 6 ISA   */
+#define EF_NANOMIPS_ARCH_64R6 0x10000000  /* 62-bit nanoMIPS Release 6 ISA   */
+
+/* nanoMIPS ABI bits, EF_NANOMIPS_ABI */
+#define EF_NANOMIPS_ABI_P32   0x00001000  /* 32-bit nanoMIPS ABI             */
+#define EF_NANOMIPS_ABI_P64   0x00002000  /* 64-bit nanoMIPS ABI             */
+
+/* nanoMIPS processor specific flags, e_flags */
+#define EF_NANOMIPS_LINKRELAX 0x00000001  /* Link-time relaxation            */
+#define EF_NANOMIPS_PIC       0x00000002  /* Position independant code       */
+#define EF_NANOMIPS_32BITMODE 0x00000004  /* 32-bit object for 64-bit arch.  */
+#define EF_NANOMIPS_PID       0x00000008  /* Position independant data       */
+#define EF_NANOMIPS_PCREL     0x00000010  /* PC-relative mode                */
+#define EF_NANOMIPS_ABI       0x0000f000  /* nanoMIPS ABI                    */
+#define EF_NANOMIPS_MACH      0x00ff0000  /* Machine variant                 */
+#define EF_NANOMIPS_ARCH      0xf0000000  /* nanoMIPS architecture           */
+
 /* MIPS machine variant */
 #define EF_MIPS_MACH_NONE     0x00000000  /* A standard MIPS implementation  */
 #define EF_MIPS_MACH_3900     0x00810000  /* Toshiba R3900                   */
@@ -143,6 +161,8 @@ typedef int64_t  Elf64_Sxword;
 
 #define EM_RISCV        243     /* RISC-V */
 
+#define EM_NANOMIPS     249     /* Wave Computing nanoMIPS */
+
 /*
  * This is an interim value that we will use until the committee comes
  * up with a final number.
-- 
2.7.4


Re: [Qemu-devel] [PATCH v7 53/80] elf: Add nanoMIPS specific variations in ELF header fields
Posted by Aleksandar Markovic 7 years, 3 months ago
> From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> Sent: Monday, August 6, 2018 7:00 PM
> Subject: [PATCH v7 53/80] elf: Add nanoMIPS specific variations in ELF header fields
> 
> From: Aleksandar Rikalo <arikalo@wavecomp.com>
> 
> Add nanoMIPS-related values in ELF header fields as specified in
> nanoMIPS' "ELF ABI Supplement".
> 
> Acked-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
> ---
>  include/elf.h | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>

> 
> diff --git a/include/elf.h b/include/elf.h
> index 002a002..3f74fba 100644
> --- a/include/elf.h
> +++ b/include/elf.h
> @@ -62,6 +62,24 @@ typedef int64_t  Elf64_Sxword;
>  #define EF_MIPS_FP64      0x00000200
>  #define EF_MIPS_NAN2008   0x00000400
> 
> +/* nanoMIPS architecture bits, EF_NANOMIPS_ARCH */
> +#define EF_NANOMIPS_ARCH_32R6 0x00000000  /* 32-bit nanoMIPS Release 6 ISA   */
> +#define EF_NANOMIPS_ARCH_64R6 0x10000000  /* 62-bit nanoMIPS Release 6 ISA   */
> +
> +/* nanoMIPS ABI bits, EF_NANOMIPS_ABI */
> +#define EF_NANOMIPS_ABI_P32   0x00001000  /* 32-bit nanoMIPS ABI             */
> +#define EF_NANOMIPS_ABI_P64   0x00002000  /* 64-bit nanoMIPS ABI             */
> +
> +/* nanoMIPS processor specific flags, e_flags */
> +#define EF_NANOMIPS_LINKRELAX 0x00000001  /* Link-time relaxation            */
> +#define EF_NANOMIPS_PIC       0x00000002  /* Position independant code       */
> +#define EF_NANOMIPS_32BITMODE 0x00000004  /* 32-bit object for 64-bit arch.  */
> +#define EF_NANOMIPS_PID       0x00000008  /* Position independant data       */
> +#define EF_NANOMIPS_PCREL     0x00000010  /* PC-relative mode                */
> +#define EF_NANOMIPS_ABI       0x0000f000  /* nanoMIPS ABI                    */
> +#define EF_NANOMIPS_MACH      0x00ff0000  /* Machine variant                 */
> +#define EF_NANOMIPS_ARCH      0xf0000000  /* nanoMIPS architecture           */
> +
>  /* MIPS machine variant */
>  #define EF_MIPS_MACH_NONE     0x00000000  /* A standard MIPS implementation  */
>  #define EF_MIPS_MACH_3900     0x00810000  /* Toshiba R3900                   */
> @@ -143,6 +161,8 @@ typedef int64_t  Elf64_Sxword;
> 
>  #define EM_RISCV        243     /* RISC-V */
> 
> +#define EM_NANOMIPS     249     /* Wave Computing nanoMIPS */
> +
>  /*
>   * This is an interim value that we will use until the committee comes
>   * up with a final number.
> --
> 2.7.4