From: Stefan Markovic <smarkovic@wavecomp.com>

Add emulation of DSP ASE instructions for nanoMIPS - part 2.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 target/mips/translate.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2448a39..055be7e 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -18742,6 +18742,18 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
                 case NM_BC1NEZC:
                     gen_compute_branch1_r6(ctx, OPC_BC1NEZ, rt, s, 0);
                     break;
+                case NM_BPOSGE32C:
+                    check_dsp(ctx);
+                    {
+                        int32_t imm = ctx->opcode;
+                        imm >>= 1;
+                        imm &= 0x1fff;
+                        imm |= (ctx->opcode & 1) << 13;
+
+                        gen_compute_branch(ctx, OPC_BPOSGE32, 4, -1, -2,
+                                           (int32_t)imm, 4);
+                    }
+                    break;
                 default:
                     generate_exception_end(ctx, EXCP_RI);
                     break;
-- 
2.7.4

On 07/30/2018 12:12 PM, Aleksandar Markovic wrote:

> +                case NM_BPOSGE32C:
> +                    check_dsp(ctx);
> +                    {
> +                        int32_t imm = ctx->opcode;
> +                        imm >>= 1;
> +                        imm &= 0x1fff;
> +                        imm |= (ctx->opcode & 1) << 13;

extract32.

> +
> +                        gen_compute_branch(ctx, OPC_BPOSGE32, 4, -1, -2,
> +                                           (int32_t)imm, 4);

Useless cast.  And see my other response re gen_compute_branch.


r~