[Qemu-devel] [PATCH v7 00/10] Mips maintenance and misc fixes and improvements

Aleksandar Markovic posted 10 patches 5 years, 9 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/1532451888-8958-1-git-send-email-aleksandar.markovic@rt-rk.com
Test docker-mingw@fedora passed
Test checkpatch passed
Test docker-quick@centos7 passed
.mailmap                       |   7 +-
MAINTAINERS                    |   9 +-
include/elf.h                  |  24 +++-
linux-user/mips/syscall_nr.h   |   9 ++
linux-user/mips64/syscall_nr.h |  18 +++
linux-user/strace.c            |  14 ++-
linux-user/syscall.c           |  29 +++++
target/mips/cpu.h              | 158 +++++++++++++----------
target/mips/helper.c           |   4 +-
target/mips/machine.c          |   5 +-
target/mips/op_helper.c        |  12 +-
target/mips/translate.c        | 279 +++++++++++++++++++++++++++++++++--------
12 files changed, 431 insertions(+), 137 deletions(-)
[Qemu-devel] [PATCH v7 00/10] Mips maintenance and misc fixes and improvements
Posted by Aleksandar Markovic 5 years, 9 months ago
From: Aleksandar Markovic <amarkovic@wavecomp.com>

v6->v7:

   - added two syscall in syscall list patch that were omitted by
     mistake
   - added commit message to the patch on some syscalls preprocessor
     availability control
   - in the same patch, provided #ifdefs for one more function
   - patch on workaround for checkpatch hang given up (checkpatch
     was updated with a fix that fixes the hang)
   - rebased to the latest code

v5->v6:

  - patch on updating CP0 register bit definitions expanded to include
    Config2, Config3, and Config4 registers   
  - added 4 patches:
      - elf: Remove duplicate preprocessor constant definition
      - elf: Add ELF flags for MIPS machine variants
      - linux-user: Update MIPS syscall numbers up to kernel 4.18
      - linux-user: Add availability control to some syscalls

v4->v5:

  - patch 5 (Add CP0 BadInstrX) corrected to work for both 32-bit and
    64-bit targets, and using correct tcg function
  - patch 7 (Amend CP0 WatchHi) was removed from the series until it
    is reimplemented in a better way

v3->v4:

  - accepted suggestion on better format of bit definitions in patch 3
  - fixed build errors caused by a mistake in patch 4
  - removed spurious comments in patch 4
  - added setting lower 16 bits to 0 in patch 5
  - used proper email address for a reviewer in patch 7 commit message

v2->v3:

  - replaced invalid @imgtec.com and @mips.com in "From:",,
    "Signed-off-by:", "Reviewed-by:" lines with the most current
    email addresses for a particular person
  - fixed build errors that appeared because of a mistake during
    integration

v1->v2:

  - fixed recipient's email addresses

Maintenance issues, fixes, and improvements collected during recent
development. Some of them are related to the upcoming nanoMIPS changes.

Aleksandar Markovic (7):
  target/mips: Update maintainer's email addresses
  target/mips: Avoid case statements formulated by ranges
  target/mips: Update some CP0 registers bit definitions
  elf: Remove duplicate preprocessor constant definition
  elf: Add ELF flags for MIPS machine variants
  linux-user: Update MIPS syscall numbers up to kernel 4.18 headers
  linux-user: Add preprocessor availability control to some syscalls

Stefan Markovic (1):
  target/mips: Add CP0 BadInstrX register

Yongbok Kim (2):
  target/mips: Don't update BadVAddr register in Debug Mode
  target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0

 .mailmap                       |   7 +-
 MAINTAINERS                    |   9 +-
 include/elf.h                  |  24 +++-
 linux-user/mips/syscall_nr.h   |   9 ++
 linux-user/mips64/syscall_nr.h |  18 +++
 linux-user/strace.c            |  14 ++-
 linux-user/syscall.c           |  29 +++++
 target/mips/cpu.h              | 158 +++++++++++++----------
 target/mips/helper.c           |   4 +-
 target/mips/machine.c          |   5 +-
 target/mips/op_helper.c        |  12 +-
 target/mips/translate.c        | 279 +++++++++++++++++++++++++++++++++--------
 12 files changed, 431 insertions(+), 137 deletions(-)

-- 
2.7.4


Re: [Qemu-devel] [PATCH v7 00/10] Mips maintenance and misc fixes and improvements
Posted by Peter Maydell 5 years, 9 months ago
On 24 July 2018 at 18:04, Aleksandar Markovic
<aleksandar.markovic@rt-rk.com> wrote:
> From: Aleksandar Markovic <amarkovic@wavecomp.com>

Are you trying to get these into 3.0 or aiming for 3.1?
Time is running out for the former (and at this point
in the release cycle "fixes" are OK but "improvements"
should be postponed til 3.1...)

thanks
-- PMM

Re: [Qemu-devel] [PATCH v7 00/10] Mips maintenance and misc fixes and improvements
Posted by Aleksandar Markovic 5 years, 9 months ago
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Tuesday, July 24, 2018 7:21 PM
> On 24 July 2018 at 18:04, Aleksandar Markovic
> <aleksandar.markovic@rt-rk.com> wrote:
> > From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> Are you trying to get these into 3.0 or aiming for 3.1?
> Time is running out for the former (and at this point
> in the release cycle "fixes" are OK but "improvements"
> should be postponed til 3.1...)
>
> thanks
> -- PMM

Hello, Peter.

This is all for 3.1, submitted now just for review. I guess review process can take place regardless of pending code freeze.

Regards,
Aleksandar

Re: [Qemu-devel] [PATCH v7 00/10] Mips maintenance and misc fixes and improvements
Posted by Peter Maydell 5 years, 9 months ago
On 24 July 2018 at 18:38, Aleksandar Markovic <amarkovic@wavecomp.com> wrote:
>> From: Peter Maydell <peter.maydell@linaro.org>
>> Sent: Tuesday, July 24, 2018 7:21 PM
>
>> On 24 July 2018 at 18:04, Aleksandar Markovic
>> <aleksandar.markovic@rt-rk.com> wrote:
>> > From: Aleksandar Markovic <amarkovic@wavecomp.com>
>>
>> Are you trying to get these into 3.0 or aiming for 3.1?
>> Time is running out for the former (and at this point
>> in the release cycle "fixes" are OK but "improvements"
>> should be postponed til 3.1...)

> This is all for 3.1, submitted now just for review. I guess
> review process can take place regardless of pending code freeze.

Yep, that's fine (looks like you've got review for most
of this, which is good).

thanks
-- PMM