On Wed, Apr 25, 2018 at 4:48 PM Michael Clark <mjc@sifive.com> wrote:
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Signed-off-by: Michael Clark <mjc@sifive.com>
> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/riscv/virt.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
> index 3a4f23e..91163d6 100644
> --- a/include/hw/riscv/virt.h
> +++ b/include/hw/riscv/virt.h
> @@ -1,5 +1,5 @@
> /*
> - * SiFive VirtIO Board
> + * QEMU RISC-V VirtIO machine interface
> *
> * Copyright (c) 2017 SiFive, Inc.
> *
> --
> 2.7.0