On 03/06/2018 05:43 PM, Michael Clark wrote:
> Signed-off-by: Michael Clark <mjc@sifive.com>
> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> target/riscv/op_helper.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index dd3e417..f79716a 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -240,7 +240,7 @@ void csr_write_helper(CPURISCVState *env, target_ulong val_to_write,
> csr_write_helper(env, next_mie, CSR_MIE);
> break;
> }
> - case CSR_SATP: /* CSR_SPTBR */ {
> + case CSR_SATP: /* CSR_SPTBR */
> if (!riscv_feature(env, RISCV_FEATURE_MMU)) {
> break;
> }
> @@ -258,7 +258,6 @@ void csr_write_helper(CPURISCVState *env, target_ulong val_to_write,
> env->satp = val_to_write;
> }
> break;
> - }
> case CSR_SEPC:
> env->sepc = val_to_write;
> break;
>