RISC-V QEMU Port Submission v1

[Qemu-devel] [PATCH v1 02/21] RISC-V ELF Machine Definition

Posted by Michael Clark 7 years, 9 months ago

Define RISC-V ELF machine EM_RISCV 243

Signed-off-by: Michael Clark <mjc@sifive.com>
---
 include/elf.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/elf.h b/include/elf.h
index e8a515c..8e457fc 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -112,6 +112,8 @@ typedef int64_t  Elf64_Sxword;
 
 #define EM_UNICORE32    110     /* UniCore32 */
 
+#define EM_RISCV        243     /* RISC-V */
+
 /*
  * This is an interim value that we will use until the committee comes
  * up with a final number.
-- 
2.7.0

Re: [Qemu-devel] [PATCH v1 02/21] RISC-V ELF Machine Definition

Posted by Richard Henderson 7 years, 9 months ago

On 01/02/2018 04:44 PM, Michael Clark wrote:
> Define RISC-V ELF machine EM_RISCV 243
> 
> Signed-off-by: Michael Clark <mjc@sifive.com>
> ---
>  include/elf.h | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

Re: [Qemu-devel] [PATCH v1 02/21] RISC-V ELF Machine Definition

Posted by Alistair Francis 7 years, 9 months ago

On Tue, Jan 2, 2018 at 4:44 PM, Michael Clark <mjc@sifive.com> wrote:
> Define RISC-V ELF machine EM_RISCV 243
>
> Signed-off-by: Michael Clark <mjc@sifive.com>

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>

Alistair

> ---
>  include/elf.h | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/include/elf.h b/include/elf.h
> index e8a515c..8e457fc 100644
> --- a/include/elf.h
> +++ b/include/elf.h
> @@ -112,6 +112,8 @@ typedef int64_t  Elf64_Sxword;
>
>  #define EM_UNICORE32    110     /* UniCore32 */
>
> +#define EM_RISCV        243     /* RISC-V */
> +
>  /*
>   * This is an interim value that we will use until the committee comes
>   * up with a final number.
> --
> 2.7.0
>
>