[Qemu-devel] [PATCH] target/mips: fix msa copy_[s|u]_df rd = 0 corner case

Miodrag Dinic posted 1 patch 8 years, 4 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/1497536433-28009-1-git-send-email-miodrag.dinic@rt-rk.com
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target/mips/translate.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
[Qemu-devel] [PATCH] target/mips: fix msa copy_[s|u]_df rd = 0 corner case
Posted by Miodrag Dinic 8 years, 4 months ago
From: Miodrag Dinic <miodrag.dinic@imgtec.com>

This patch fixes the msa copy_[s|u]_df instruction emulation when
the destination register rd is zero. Without this patch the zero
register would get clobbered, which should never happen because it
is supposed to be hardwired to 0.

Fix this corner case by explicitly checking rd = 0 and effectively
making these instructions emulation no-op in that case.

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
---
 target/mips/translate.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 559f8fe..befb87f 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -18712,10 +18712,14 @@ static void gen_msa_elm_df(CPUMIPSState *env, DisasContext *ctx, uint32_t df,
 #endif
         switch (MASK_MSA_ELM(ctx->opcode)) {
         case OPC_COPY_S_df:
-            gen_helper_msa_copy_s_df(cpu_env, tdf, twd, tws, tn);
+            if (likely(wd != 0)) {
+                gen_helper_msa_copy_s_df(cpu_env, tdf, twd, tws, tn);
+            }
             break;
         case OPC_COPY_U_df:
-            gen_helper_msa_copy_u_df(cpu_env, tdf, twd, tws, tn);
+            if (likely(wd != 0)) {
+                gen_helper_msa_copy_u_df(cpu_env, tdf, twd, tws, tn);
+            }
             break;
         case OPC_INSERT_df:
             gen_helper_msa_insert_df(cpu_env, tdf, twd, tws, tn);
-- 
1.9.1


Re: [Qemu-devel] [PATCH] target/mips: fix msa copy_[s|u]_df rd = 0 corner case
Posted by Aurelien Jarno 8 years, 4 months ago
On 2017-06-15 16:20, Miodrag Dinic wrote:
> From: Miodrag Dinic <miodrag.dinic@imgtec.com>
> 
> This patch fixes the msa copy_[s|u]_df instruction emulation when
> the destination register rd is zero. Without this patch the zero
> register would get clobbered, which should never happen because it
> is supposed to be hardwired to 0.
> 
> Fix this corner case by explicitly checking rd = 0 and effectively
> making these instructions emulation no-op in that case.
> 
> Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
> ---
>  target/mips/translate.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net