Target-arm queue...

The following changes since commit 735286a4f88255e1463d42ce28d8d14181fd32d4:

Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170613' into staging (2017-06-13 13:51:29 +0100)

are available in the git repository at:

git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170613

for you to fetch changes up to 252a7a6a968c279a4636a86b0559ba3a930a90b5:

hw/intc/arm_gicv3_its: Allow save/restore (2017-06-13 14:57:01 +0100)

* vITS: Support save/restore

* timer/aspeed: Fix timer enablement when reload is not set

* aspped: add temperature sensor device

* timer.h: Provide better monotonic time on ARM hosts

* exynos4210: various cleanups

* exynos4210: support system poweroff

Cédric Le Goater (3):

hw/misc: add a TMP42{1, 2, 3} device model

aspeed: add a temp sensor device on I2C bus 3

timer/aspeed: fix timer enablement when a reload is not set

Eric Auger (4):

kvm-all: Pass an error object to kvm_device_access

hw/intc/arm_gicv3_its: Implement state save/restore

hw/intc/arm_gicv3_kvm: Implement pending table save

hw/intc/arm_gicv3_its: Allow save/restore

Krzysztof Kozlowski (9):

hw/intc/exynos4210_gic: Use more meaningful name for local variable

hw/timer/exynos4210_mct: Fix checkpatch style errors

hw/timer/exynos4210_mct: Cleanup indentation and empty new lines

hw/timer/exynos4210_mct: Remove unused defines

hw/arm/exynos: Move DRAM initialization next boards

hw/arm/exynos: Declare local variables in some order

hw/arm/exynos: Use type define instead of hard-coded a9mpcore_priv string

hw/intc/exynos4210_gic: Constify array of combiner interrupts

hw/misc/exynos4210_pmu: Add support for system poweroff

Pranith Kumar (1):

timer.h: Provide better monotonic time

hw/misc/Makefile.objs | 1 +

include/hw/arm/exynos4210.h | 5 +-

include/hw/intc/arm_gicv3_its_common.h | 8 +

include/migration/vmstate.h | 2 +

include/qemu/timer.h | 5 +-

include/sysemu/kvm.h | 11 +-

hw/arm/aspeed.c | 9 +

hw/arm/exynos4210.c | 27 +--

hw/arm/exynos4_boards.c | 50 +++-

hw/intc/arm_gic_kvm.c | 9 +-

hw/intc/arm_gicv3_common.c | 1 +

hw/intc/arm_gicv3_its_common.c | 12 +-

hw/intc/arm_gicv3_its_kvm.c | 131 +++++++++--

hw/intc/arm_gicv3_kvm.c | 48 +++-

hw/intc/exynos4210_gic.c | 14 +-

hw/misc/exynos4210_pmu.c | 20 +-

hw/misc/tmp421.c | 402 +++++++++++++++++++++++++++++++++

hw/timer/aspeed_timer.c | 37 ++-

hw/timer/exynos4210_mct.c | 50 ++--

kvm-all.c | 14 +-

default-configs/arm-softmmu.mak | 1 +

21 files changed, 741 insertions(+), 116 deletions(-)

create mode 100644 hw/misc/tmp421.c

From: Krzysztof Kozlowski <krzk@kernel.org>

Remove defines not used anywhere.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

hw/timer/exynos4210_mct.c | 3 ---

1 file changed, 3 deletions(-)

diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c

--- a/hw/timer/exynos4210_mct.c

+++ b/hw/timer/exynos4210_mct.c

@@ -XXX,XX +XXX,XX @@ enum LocalTimerRegCntIndexes {

L_REG_CNT_AMOUNT

};

-#define MCT_NIRQ 6

#define MCT_SFR_SIZE 0x444

#define MCT_GT_CMP_NUM 4

-#define MCT_GT_MAX_VAL UINT64_MAX

-

#define MCT_GT_COUNTER_STEP 0x100000000ULL

#define MCT_LT_COUNTER_STEP 0x100000000ULL

#define MCT_LT_CNT_LOW_LIMIT 0x100

2.7.4

From: Eric Auger <eric.auger@redhat.com>

We change the restoration priority of both the GICv3 and ITS. The

GICv3 must be restored before the ITS and the ITS needs to be restored

before PCIe devices since it translates their MSI transactions.

include/migration/vmstate.h | 2 ++

hw/intc/arm_gicv3_common.c | 1 +

hw/intc/arm_gicv3_its_common.c | 2 +-

hw/intc/arm_gicv3_its_kvm.c | 24 ++++++++++++------------

4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h

--- a/include/migration/vmstate.h

+++ b/include/migration/vmstate.h

@@ -XXX,XX +XXX,XX @@ enum VMStateFlags {

typedef enum {

MIG_PRI_DEFAULT = 0,

MIG_PRI_IOMMU, /* Must happen before PCI devices */

+ MIG_PRI_GICV3_ITS, /* Must happen before PCI devices */

+ MIG_PRI_GICV3, /* Must happen before the ITS */

MIG_PRI_MAX,

} MigrationPriority;

diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_common.c

+++ b/hw/intc/arm_gicv3_common.c

@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_gicv3 = {

.minimum_version_id = 1,

.pre_save = gicv3_pre_save,

.post_load = gicv3_post_load,

+ .priority = MIG_PRI_GICV3,

.fields = (VMStateField[]) {

VMSTATE_UINT32(gicd_ctlr, GICv3State),

VMSTATE_UINT32_ARRAY(gicd_statusr, GICv3State, 2),

diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_common.c

+++ b/hw/intc/arm_gicv3_its_common.c

@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_its = {

.name = "arm_gicv3_its",

.pre_save = gicv3_its_pre_save,

.post_load = gicv3_its_post_load,

- .unmigratable = true,

+ .priority = MIG_PRI_GICV3_ITS,

.fields = (VMStateField[]) {

VMSTATE_UINT32(ctlr, GICv3ITSState),

VMSTATE_UINT32(iidr, GICv3ITSState),

diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_kvm.c

+++ b/hw/intc/arm_gicv3_its_kvm.c

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);

Error *local_err = NULL;

- /*

- * Block migration of a KVM GICv3 ITS device: the API for saving and

- * restoring the state in the kernel is not yet available

- */

- error_setg(&s->migration_blocker, "vITS migration is not implemented");

- migrate_add_blocker(s->migration_blocker, &local_err);

- if (local_err) {

- error_propagate(errp, local_err);

- error_free(s->migration_blocker);

- return;

- }

-

s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_ITS, false);

if (s->dev_fd < 0) {

error_setg_errno(errp, -s->dev_fd, "error creating in-kernel ITS");

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

gicv3_its_init_mmio(s, NULL);

+ if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CTLR)) {

+ error_setg(&s->migration_blocker, "This operating system kernel "

+ "does not support vITS migration");

+ migrate_add_blocker(s->migration_blocker, &local_err);

+ if (local_err) {

+ error_propagate(errp, local_err);

+ error_free(s->migration_blocker);

+ return;

+ }

+ }

kvm_msi_use_devid = true;

kvm_gsi_direct_mapping = false;

kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();

2.7.4

From: Cédric Le Goater <clg@kaod.org>

When a timer is enabled before a reload value is set, the controller

waits for a reload value to be set before starting decrementing. This

fix tries to cover that case by changing the timer expiry only when

a reload value is valid.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>

Message-id: 1496739312-32304-1-git-send-email-clg@kaod.org

hw/timer/aspeed_timer.c | 37 +++++++++++++++++++++++++++++--------

1 file changed, 29 insertions(+), 8 deletions(-)

diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c

--- a/hw/timer/aspeed_timer.c

+++ b/hw/timer/aspeed_timer.c

@@ -XXX,XX +XXX,XX @@ static uint64_t calculate_next(struct AspeedTimer *t)

next = seq[1];

} else if (now < seq[2]) {

next = seq[2];

- } else {

+ } else if (t->reload) {

reload_ns = muldiv64(t->reload, NANOSECONDS_PER_SECOND, rate);

t->start = now - ((now - t->start) % reload_ns);

+ } else {

+ /* no reload value, return 0 */

+ break;

}

return next;

}

+static void aspeed_timer_mod(AspeedTimer *t)

+{

+ uint64_t next = calculate_next(t);

+ if (next) {

+ timer_mod(&t->timer, next);

+ }

+}

static void aspeed_timer_expire(void *opaque)

{

AspeedTimer *t = opaque;

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_expire(void *opaque)

qemu_set_irq(t->irq, t->level);

}

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

}

static uint64_t aspeed_timer_get_value(AspeedTimer *t, int reg)

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,

uint32_t value)

{

AspeedTimer *t;

+ uint32_t old_reload;

trace_aspeed_timer_set_value(timer, reg, value);

t = &s->timers[timer];

switch (reg) {

+ case TIMER_REG_RELOAD:

+ old_reload = t->reload;

+ t->reload = value;

+

+ /* If the reload value was not previously set, or zero, and

+ * the current value is valid, try to start the timer if it is

+ * enabled.

+ */

+ if (old_reload || !t->reload) {

+ break;

+ }

+

case TIMER_REG_STATUS:

if (timer_enabled(t)) {

uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,

uint32_t rate = calculate_rate(t);

t->start += muldiv64(delta, NANOSECONDS_PER_SECOND, rate);

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

- case TIMER_REG_RELOAD:

- t->reload = value;

- break;

case TIMER_REG_MATCH_FIRST:

case TIMER_REG_MATCH_SECOND:

t->match[reg - 2] = value;

if (timer_enabled(t)) {

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

default:

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_ctrl_enable(AspeedTimer *t, bool enable)

trace_aspeed_timer_ctrl_enable(t->id, enable);

if (enable) {

t->start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

} else {

timer_del(&t->timer);

2.7.4

From: Eric Auger <eric.auger@redhat.com>

In some circumstances, we don't want to abort if the

kvm_device_access fails. This will be the case during ITS

migration, in case the ITS table save/restore fails because

the guest did not program the vITS correctly. So let's pass an

error object to the function and return the ioctl value. New

callers will be able to make a decision upon this returned

value.

Existing callers pass &error_abort which will cause the

function to abort on failure.

include/sysemu/kvm.h | 11 +++++++----

hw/intc/arm_gic_kvm.c | 9 +++++----

hw/intc/arm_gicv3_its_kvm.c | 2 +-

hw/intc/arm_gicv3_kvm.c | 14 +++++++-------

kvm-all.c | 14 ++++++++------

5 files changed, 28 insertions(+), 22 deletions(-)

diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h

--- a/include/sysemu/kvm.h

+++ b/include/sysemu/kvm.h

@@ -XXX,XX +XXX,XX @@ int kvm_device_check_attr(int fd, uint32_t group, uint64_t attr);

* @attr: the attribute of that group to set or get

* @val: pointer to a storage area for the value

* @write: true for set and false for get operation

+ * @errp: error object handle

*

- * This function is not allowed to fail. Use kvm_device_check_attr()

- * in order to check for the availability of optional attributes.

+ * Returns: 0 on success

+ * < 0 on error

+ * Use kvm_device_check_attr() in order to check for the availability

+ * of optional attributes.

*/

-void kvm_device_access(int fd, int group, uint64_t attr,

- void *val, bool write);

+int kvm_device_access(int fd, int group, uint64_t attr,

+ void *val, bool write, Error **errp);

/**

* kvm_create_device - create a KVM device for the device control API

diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gic_kvm.c

+++ b/hw/intc/arm_gic_kvm.c

@@ -XXX,XX +XXX,XX @@ static void kvm_gicd_access(GICState *s, int offset, int cpu,

uint32_t *val, bool write)

{

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_DIST_REGS,

- KVM_VGIC_ATTR(offset, cpu), val, write);

+ KVM_VGIC_ATTR(offset, cpu), val, write, &error_abort);

}

static void kvm_gicc_access(GICState *s, int offset, int cpu,

uint32_t *val, bool write)

{

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_REGS,

- KVM_VGIC_ATTR(offset, cpu), val, write);

+ KVM_VGIC_ATTR(offset, cpu), val, write, &error_abort);

}

#define for_each_irq_reg(_ctr, _max_irq, _field_width) \

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)

if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 0)) {

uint32_t numirqs = s->num_irq;

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 0,

- &numirqs, true);

+ &numirqs, true, &error_abort);

}

/* Tell the kernel to complete VGIC initialization now */

if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,

KVM_DEV_ARM_VGIC_CTRL_INIT)) {

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,

- KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);

+ KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true,

+ &error_abort);

}

} else if (ret != -ENODEV && ret != -ENOTSUP) {

error_setg_errno(errp, -ret, "error creating in-kernel VGIC");

diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_kvm.c

+++ b/hw/intc/arm_gicv3_its_kvm.c

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

/* explicit init of the ITS */

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,

- KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);

+ KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort);

/* register the base address */

kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,

diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_kvm.c

+++ b/hw/intc/arm_gicv3_kvm.c

@@ -XXX,XX +XXX,XX @@ static inline void kvm_gicd_access(GICv3State *s, int offset,

{

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_DIST_REGS,

KVM_VGIC_ATTR(offset, 0),

- val, write);

+ val, write, &error_abort);

}

static inline void kvm_gicr_access(GICv3State *s, int offset, int cpu,

@@ -XXX,XX +XXX,XX @@ static inline void kvm_gicr_access(GICv3State *s, int offset, int cpu,

{

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_REDIST_REGS,

KVM_VGIC_ATTR(offset, s->cpu[cpu].gicr_typer),

- val, write);

+ val, write, &error_abort);

}

static inline void kvm_gicc_access(GICv3State *s, uint64_t reg, int cpu,

@@ -XXX,XX +XXX,XX @@ static inline void kvm_gicc_access(GICv3State *s, uint64_t reg, int cpu,

{

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS,

KVM_VGIC_ATTR(reg, s->cpu[cpu].gicr_typer),

- val, write);

+ val, write, &error_abort);

}

static inline void kvm_gic_line_level_access(GICv3State *s, int irq, int cpu,

@@ -XXX,XX +XXX,XX @@ static inline void kvm_gic_line_level_access(GICv3State *s, int irq, int cpu,

KVM_VGIC_ATTR(irq, s->cpu[cpu].gicr_typer) |

(VGIC_LEVEL_INFO_LINE_LEVEL <<

KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT),

- val, write);

+ val, write, &error_abort);

}

/* Loop through each distributor IRQ related register; since bits

@@ -XXX,XX +XXX,XX @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri)

/* Initialize to actual HW supported configuration */

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS,

KVM_VGIC_ATTR(ICC_CTLR_EL1, cpu->mp_affinity),

- &c->icc_ctlr_el1[GICV3_NS], false);

+ &c->icc_ctlr_el1[GICV3_NS], false, &error_abort);

c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS];

}

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)

}

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS,

- 0, &s->num_irq, true);

+ 0, &s->num_irq, true, &error_abort);

/* Tell the kernel to complete VGIC initialization now */

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,

- KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);

+ KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort);

kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,

KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd);

diff --git a/kvm-all.c b/kvm-all.c

index XXXXXXX..XXXXXXX 100644

--- a/kvm-all.c

+++ b/kvm-all.c

@@ -XXX,XX +XXX,XX @@

#include "qemu/option.h"

#include "qemu/config-file.h"

#include "qemu/error-report.h"

+#include "qapi/error.h"

#include "hw/hw.h"

#include "hw/pci/msi.h"

#include "hw/pci/msix.h"

@@ -XXX,XX +XXX,XX @@ int kvm_device_check_attr(int dev_fd, uint32_t group, uint64_t attr)

return kvm_device_ioctl(dev_fd, KVM_HAS_DEVICE_ATTR, &attribute) ? 0 : 1;

}

-void kvm_device_access(int fd, int group, uint64_t attr,

- void *val, bool write)

+int kvm_device_access(int fd, int group, uint64_t attr,

+ void *val, bool write, Error **errp)

{

struct kvm_device_attr kvmattr;

int err;

@@ -XXX,XX +XXX,XX @@ void kvm_device_access(int fd, int group, uint64_t attr,

write ? KVM_SET_DEVICE_ATTR : KVM_GET_DEVICE_ATTR,

&kvmattr);

if (err < 0) {

- error_report("KVM_%s_DEVICE_ATTR failed: %s",

- write ? "SET" : "GET", strerror(-err));

- error_printf("Group %d attr 0x%016" PRIx64 "\n", group, attr);

- abort();

+ error_setg_errno(errp, -err,

+ "KVM_%s_DEVICE_ATTR failed: Group %d "

+ "attr 0x%016" PRIx64,

+ write ? "SET" : "GET", group, attr);

}

+ return err;

}

/* Return 1 on success, 0 on failure */

2.7.4

From: Cédric Le Goater <clg@kaod.org>

Temperatures can be changed from the monitor with :

    (qemu) qom-set /machine/unattached/device[2] temperature0 12000

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Message-id: 1496739230-32109-3-git-send-email-clg@kaod.org

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/arm/aspeed.c | 9 +++++++++

1 file changed, 9 insertions(+)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c

--- a/hw/arm/aspeed.c

+++ b/hw/arm/aspeed.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_board_init(MachineState *machine,

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)

{

AspeedSoCState *soc = &bmc->soc;

+ DeviceState *dev;

/* The palmetto platform expects a ds3231 RTC but a ds1338 is

* enough to provide basic RTC features. Alarms will be missing */

i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);

+

+ /* add a TMP423 temperature sensor */

+ dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),

+ "tmp423", 0x4c);

+ object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);

+ object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);

+ object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);

+ object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);

}

static void palmetto_bmc_init(MachineState *machine)

2.7.4

From: Cédric Le Goater <clg@kaod.org>

Largely inspired by the TMP105 temperature sensor, here is a model for

the TMP42{1,2,3} temperature sensors.

Specs can be found here :

    http://www.ti.com/lit/gpn/tmp421

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Message-id: 1496739230-32109-2-git-send-email-clg@kaod.org

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/misc/Makefile.objs | 1 +

hw/misc/tmp421.c | 402 ++++++++++++++++++++++++++++++++++++++++

default-configs/arm-softmmu.mak | 1 +

3 files changed, 404 insertions(+)

create mode 100644 hw/misc/tmp421.c

diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs

--- a/hw/misc/Makefile.objs

+++ b/hw/misc/Makefile.objs

@@ -XXX,XX +XXX,XX @@

common-obj-$(CONFIG_APPLESMC) += applesmc.o

common-obj-$(CONFIG_MAX111X) += max111x.o

common-obj-$(CONFIG_TMP105) += tmp105.o

+common-obj-$(CONFIG_TMP421) += tmp421.o

common-obj-$(CONFIG_ISA_DEBUG) += debugexit.o

common-obj-$(CONFIG_SGA) += sga.o

common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o

diff --git a/hw/misc/tmp421.c b/hw/misc/tmp421.c

new file mode 100644

index XXXXXXX..XXXXXXX

--- /dev/null

+++ b/hw/misc/tmp421.c

@@ -XXX,XX +XXX,XX @@

+/*

+ * Texas Instruments TMP421 temperature sensor.

+ *

+ * Copyright (c) 2016 IBM Corporation.

+ *

+ * Largely inspired by :

+ *

+ * Texas Instruments TMP105 temperature sensor.

+ *

+ * Copyright (C) 2008 Nokia Corporation

+ * Written by Andrzej Zaborowski <andrew@openedhand.com>

+ *

+ * This program is free software; you can redistribute it and/or

+ * modify it under the terms of the GNU General Public License as

+ * published by the Free Software Foundation; either version 2 or

+ * (at your option) version 3 of the License.

+ *

+ * This program is distributed in the hope that it will be useful,

+ * but WITHOUT ANY WARRANTY; without even the implied warranty of

+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

+ * GNU General Public License for more details.

+ *

+ * You should have received a copy of the GNU General Public License along

+ * with this program; if not, see <http://www.gnu.org/licenses/>.

+ */

+

+#include "qemu/osdep.h"

+#include "hw/hw.h"

+#include "hw/i2c/i2c.h"

+#include "qapi/error.h"

+#include "qapi/visitor.h"

+

+/* Manufacturer / Device ID's */

+#define TMP421_MANUFACTURER_ID 0x55

+#define TMP421_DEVICE_ID 0x21

+#define TMP422_DEVICE_ID 0x22

+#define TMP423_DEVICE_ID 0x23

+

+typedef struct DeviceInfo {

+ int model;

+ const char *name;

+} DeviceInfo;

+

+static const DeviceInfo devices[] = {

+ { TMP421_DEVICE_ID, "tmp421" },

+ { TMP422_DEVICE_ID, "tmp422" },

+ { TMP423_DEVICE_ID, "tmp423" },

+};

+

+typedef struct TMP421State {

+ /*< private >*/

+ I2CSlave i2c;

+ /*< public >*/

+

+ int16_t temperature[4];

+

+ uint8_t status;

+ uint8_t config[2];

+ uint8_t rate;

+

+ uint8_t len;

+ uint8_t buf[2];

+ uint8_t pointer;

+

+} TMP421State;

+

+typedef struct TMP421Class {

+ I2CSlaveClass parent_class;

+ DeviceInfo *dev;

+} TMP421Class;

+

+#define TYPE_TMP421 "tmp421-generic"

+#define TMP421(obj) OBJECT_CHECK(TMP421State, (obj), TYPE_TMP421)

+

+#define TMP421_CLASS(klass) \

+ OBJECT_CLASS_CHECK(TMP421Class, (klass), TYPE_TMP421)

+#define TMP421_GET_CLASS(obj) \

+ OBJECT_GET_CLASS(TMP421Class, (obj), TYPE_TMP421)

+

+/* the TMP421 registers */

+#define TMP421_STATUS_REG 0x08

+#define TMP421_STATUS_BUSY (1 << 7)

+#define TMP421_CONFIG_REG_1 0x09

+#define TMP421_CONFIG_RANGE (1 << 2)

+#define TMP421_CONFIG_SHUTDOWN (1 << 6)

+#define TMP421_CONFIG_REG_2 0x0A

+#define TMP421_CONFIG_RC (1 << 2)

+#define TMP421_CONFIG_LEN (1 << 3)

+#define TMP421_CONFIG_REN (1 << 4)

+#define TMP421_CONFIG_REN2 (1 << 5)

+#define TMP421_CONFIG_REN3 (1 << 6)

+

+#define TMP421_CONVERSION_RATE_REG 0x0B

+#define TMP421_ONE_SHOT 0x0F

+

+#define TMP421_RESET 0xFC

+#define TMP421_MANUFACTURER_ID_REG 0xFE

+#define TMP421_DEVICE_ID_REG 0xFF

+

+#define TMP421_TEMP_MSB0 0x00

+#define TMP421_TEMP_MSB1 0x01

+#define TMP421_TEMP_MSB2 0x02

+#define TMP421_TEMP_MSB3 0x03

+#define TMP421_TEMP_LSB0 0x10

+#define TMP421_TEMP_LSB1 0x11

+#define TMP421_TEMP_LSB2 0x12

+#define TMP421_TEMP_LSB3 0x13

+

+static const int32_t mins[2] = { -40000, -55000 };

+static const int32_t maxs[2] = { 127000, 150000 };

+

+static void tmp421_get_temperature(Object *obj, Visitor *v, const char *name,

+ void *opaque, Error **errp)

+{

+ TMP421State *s = TMP421(obj);

+ bool ext_range = (s->config[0] & TMP421_CONFIG_RANGE);

+ int offset = ext_range * 64 * 256;

+ int64_t value;

+ int tempid;

+

+ if (sscanf(name, "temperature%d", &tempid) != 1) {

+ error_setg(errp, "error reading %s: %m", name);

+ return;

+ }

+

+ if (tempid >= 4 || tempid < 0) {

+ error_setg(errp, "error reading %s", name);

+ return;

+ }

+

+ value = ((s->temperature[tempid] - offset) * 1000 + 128) / 256;

+

+ visit_type_int(v, name, &value, errp);

+}

+

+/* Units are 0.001 centigrades relative to 0 C. s->temperature is 8.8

+ * fixed point, so units are 1/256 centigrades. A simple ratio will do.

+ */

+static void tmp421_set_temperature(Object *obj, Visitor *v, const char *name,

+ void *opaque, Error **errp)

+{

+ TMP421State *s = TMP421(obj);

+ Error *local_err = NULL;

+ int64_t temp;

+ bool ext_range = (s->config[0] & TMP421_CONFIG_RANGE);

+ int offset = ext_range * 64 * 256;

+ int tempid;

+

+ visit_type_int(v, name, &temp, &local_err);

+ if (local_err) {

+ error_propagate(errp, local_err);

+ return;

+ }

+

+ if (temp >= maxs[ext_range] || temp < mins[ext_range]) {

+ error_setg(errp, "value %" PRId64 ".%03" PRIu64 " °C is out of range",

+ temp / 1000, temp % 1000);

+ return;

+ }

+

+ if (sscanf(name, "temperature%d", &tempid) != 1) {

+ error_setg(errp, "error reading %s: %m", name);

+ return;

+ }

+

+ if (tempid >= 4 || tempid < 0) {

+ error_setg(errp, "error reading %s", name);

+ return;

+ }

+

+ s->temperature[tempid] = (int16_t) ((temp * 256 - 128) / 1000) + offset;

+}

+

+static void tmp421_read(TMP421State *s)

+{

+ TMP421Class *sc = TMP421_GET_CLASS(s);

+

+ s->len = 0;

+

+ switch (s->pointer) {

+ case TMP421_MANUFACTURER_ID_REG:

+ s->buf[s->len++] = TMP421_MANUFACTURER_ID;

+ break;

+ case TMP421_DEVICE_ID_REG:

+ s->buf[s->len++] = sc->dev->model;

+ break;

+ case TMP421_CONFIG_REG_1:

+ s->buf[s->len++] = s->config[0];

+ break;

+ case TMP421_CONFIG_REG_2:

+ s->buf[s->len++] = s->config[1];

+ break;

+ case TMP421_CONVERSION_RATE_REG:

+ s->buf[s->len++] = s->rate;

+ break;

+ case TMP421_STATUS_REG:

+ s->buf[s->len++] = s->status;

+ break;

+

+ /* FIXME: check for channel enablement in config registers */

+ case TMP421_TEMP_MSB0:

+ s->buf[s->len++] = (((uint16_t) s->temperature[0]) >> 8);

+ s->buf[s->len++] = (((uint16_t) s->temperature[0]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_MSB1:

+ s->buf[s->len++] = (((uint16_t) s->temperature[1]) >> 8);

+ s->buf[s->len++] = (((uint16_t) s->temperature[1]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_MSB2:

+ s->buf[s->len++] = (((uint16_t) s->temperature[2]) >> 8);

+ s->buf[s->len++] = (((uint16_t) s->temperature[2]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_MSB3:

+ s->buf[s->len++] = (((uint16_t) s->temperature[3]) >> 8);

+ s->buf[s->len++] = (((uint16_t) s->temperature[3]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_LSB0:

+ s->buf[s->len++] = (((uint16_t) s->temperature[0]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_LSB1:

+ s->buf[s->len++] = (((uint16_t) s->temperature[1]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_LSB2:

+ s->buf[s->len++] = (((uint16_t) s->temperature[2]) >> 0) & 0xf0;

+ break;

+ case TMP421_TEMP_LSB3:

+ s->buf[s->len++] = (((uint16_t) s->temperature[3]) >> 0) & 0xf0;

+ break;

+ }

+}

+

+static void tmp421_reset(I2CSlave *i2c);

+

+static void tmp421_write(TMP421State *s)

+{

+ switch (s->pointer) {

+ case TMP421_CONVERSION_RATE_REG:

+ s->rate = s->buf[0];

+ break;

+ case TMP421_CONFIG_REG_1:

+ s->config[0] = s->buf[0];

+ break;

+ case TMP421_CONFIG_REG_2:

+ s->config[1] = s->buf[0];

+ break;

+ case TMP421_RESET:

+ tmp421_reset(I2C_SLAVE(s));

+ break;

+ }

+}

+

+static int tmp421_rx(I2CSlave *i2c)

+{

+ TMP421State *s = TMP421(i2c);

+

+ if (s->len < 2) {

+ return s->buf[s->len++];

+ } else {

+ return 0xff;

+ }

+}

+

+static int tmp421_tx(I2CSlave *i2c, uint8_t data)

+{

+ TMP421State *s = TMP421(i2c);

+

+ if (s->len == 0) {

+ /* first byte is the register pointer for a read or write

+ * operation */

+ s->pointer = data;

+ s->len++;

+ } else if (s->len == 1) {

+ /* second byte is the data to write. The device only supports

+ * one byte writes */

+ s->buf[0] = data;

+ tmp421_write(s);

+ }

+

+ return 0;

+}

+

+static int tmp421_event(I2CSlave *i2c, enum i2c_event event)

+{

+ TMP421State *s = TMP421(i2c);

+

+ if (event == I2C_START_RECV) {

+ tmp421_read(s);

+ }

+

+ s->len = 0;

+ return 0;

+}

+

+static const VMStateDescription vmstate_tmp421 = {

+ .name = "TMP421",

+ .version_id = 0,

+ .minimum_version_id = 0,

+ .fields = (VMStateField[]) {

+ VMSTATE_UINT8(len, TMP421State),

+ VMSTATE_UINT8_ARRAY(buf, TMP421State, 2),

+ VMSTATE_UINT8(pointer, TMP421State),

+ VMSTATE_UINT8_ARRAY(config, TMP421State, 2),

+ VMSTATE_UINT8(status, TMP421State),

+ VMSTATE_UINT8(rate, TMP421State),

+ VMSTATE_INT16_ARRAY(temperature, TMP421State, 4),

+ VMSTATE_I2C_SLAVE(i2c, TMP421State),

+ VMSTATE_END_OF_LIST()

+ }

+};

+

+static void tmp421_reset(I2CSlave *i2c)

+{

+ TMP421State *s = TMP421(i2c);

+ TMP421Class *sc = TMP421_GET_CLASS(s);

+

+ memset(s->temperature, 0, sizeof(s->temperature));

+ s->pointer = 0;

+

+ s->config[0] = 0; /* TMP421_CONFIG_RANGE */

+

+ /* resistance correction and channel enablement */

+ switch (sc->dev->model) {

+ case TMP421_DEVICE_ID:

+ s->config[1] = 0x1c;

+ break;

+ case TMP422_DEVICE_ID:

+ s->config[1] = 0x3c;

+ break;

+ case TMP423_DEVICE_ID:

+ s->config[1] = 0x7c;

+ break;

+ }

+

+ s->rate = 0x7; /* 8Hz */

+ s->status = 0;

+}

+

+static int tmp421_init(I2CSlave *i2c)

+{

+ TMP421State *s = TMP421(i2c);

+

+ tmp421_reset(&s->i2c);

+

+ return 0;

+}

+

+static void tmp421_initfn(Object *obj)

+{

+ object_property_add(obj, "temperature0", "int",

+ tmp421_get_temperature,

+ tmp421_set_temperature, NULL, NULL, NULL);

+ object_property_add(obj, "temperature1", "int",

+ tmp421_get_temperature,

+ tmp421_set_temperature, NULL, NULL, NULL);

+ object_property_add(obj, "temperature2", "int",

+ tmp421_get_temperature,

+ tmp421_set_temperature, NULL, NULL, NULL);

+ object_property_add(obj, "temperature3", "int",

+ tmp421_get_temperature,

+ tmp421_set_temperature, NULL, NULL, NULL);

+}

+

+static void tmp421_class_init(ObjectClass *klass, void *data)

+{

+ DeviceClass *dc = DEVICE_CLASS(klass);

+ I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);

+ TMP421Class *sc = TMP421_CLASS(klass);

+

+ k->init = tmp421_init;

+ k->event = tmp421_event;

+ k->recv = tmp421_rx;

+ k->send = tmp421_tx;

+ dc->vmsd = &vmstate_tmp421;

+ sc->dev = (DeviceInfo *) data;

+}

+

+static const TypeInfo tmp421_info = {

+ .name = TYPE_TMP421,

+ .parent = TYPE_I2C_SLAVE,

+ .instance_size = sizeof(TMP421State),

+ .class_size = sizeof(TMP421Class),

+ .instance_init = tmp421_initfn,

+ .abstract = true,

+};

+

+static void tmp421_register_types(void)

+{

+ int i;

+

+ type_register_static(&tmp421_info);

+ for (i = 0; i < ARRAY_SIZE(devices); ++i) {

+ TypeInfo ti = {

+ .name = devices[i].name,

+ .parent = TYPE_TMP421,

+ .class_init = tmp421_class_init,