Target-arm queue...

The following changes since commit 735286a4f88255e1463d42ce28d8d14181fd32d4:

Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170613' into staging (2017-06-13 13:51:29 +0100)

are available in the git repository at:

git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170613

for you to fetch changes up to 252a7a6a968c279a4636a86b0559ba3a930a90b5:

hw/intc/arm_gicv3_its: Allow save/restore (2017-06-13 14:57:01 +0100)

* vITS: Support save/restore

* timer/aspeed: Fix timer enablement when reload is not set

* aspped: add temperature sensor device

* timer.h: Provide better monotonic time on ARM hosts

* exynos4210: various cleanups

* exynos4210: support system poweroff

Cédric Le Goater (3):

hw/misc: add a TMP42{1, 2, 3} device model

aspeed: add a temp sensor device on I2C bus 3

timer/aspeed: fix timer enablement when a reload is not set

Eric Auger (4):

kvm-all: Pass an error object to kvm_device_access

hw/intc/arm_gicv3_its: Implement state save/restore

hw/intc/arm_gicv3_kvm: Implement pending table save

hw/intc/arm_gicv3_its: Allow save/restore

Krzysztof Kozlowski (9):

hw/intc/exynos4210_gic: Use more meaningful name for local variable

hw/timer/exynos4210_mct: Fix checkpatch style errors

hw/timer/exynos4210_mct: Cleanup indentation and empty new lines

hw/timer/exynos4210_mct: Remove unused defines

hw/arm/exynos: Move DRAM initialization next boards

hw/arm/exynos: Declare local variables in some order

hw/arm/exynos: Use type define instead of hard-coded a9mpcore_priv string

hw/intc/exynos4210_gic: Constify array of combiner interrupts

hw/misc/exynos4210_pmu: Add support for system poweroff

Pranith Kumar (1):

timer.h: Provide better monotonic time

hw/misc/Makefile.objs | 1 +

include/hw/arm/exynos4210.h | 5 +-

include/hw/intc/arm_gicv3_its_common.h | 8 +

include/migration/vmstate.h | 2 +

include/qemu/timer.h | 5 +-

include/sysemu/kvm.h | 11 +-

hw/arm/aspeed.c | 9 +

hw/arm/exynos4210.c | 27 +--

hw/arm/exynos4_boards.c | 50 +++-

hw/intc/arm_gic_kvm.c | 9 +-

hw/intc/arm_gicv3_common.c | 1 +

hw/intc/arm_gicv3_its_common.c | 12 +-

hw/intc/arm_gicv3_its_kvm.c | 131 +++++++++--

hw/intc/arm_gicv3_kvm.c | 48 +++-

hw/intc/exynos4210_gic.c | 14 +-

hw/misc/exynos4210_pmu.c | 20 +-

hw/misc/tmp421.c | 402 +++++++++++++++++++++++++++++++++

hw/timer/aspeed_timer.c | 37 ++-

hw/timer/exynos4210_mct.c | 50 ++--

kvm-all.c | 14 +-

default-configs/arm-softmmu.mak | 1 +

21 files changed, 741 insertions(+), 116 deletions(-)

create mode 100644 hw/misc/tmp421.c

From: Eric Auger <eric.auger@redhat.com>

We change the restoration priority of both the GICv3 and ITS. The

GICv3 must be restored before the ITS and the ITS needs to be restored

before PCIe devices since it translates their MSI transactions.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Juan Quintela <quintela@redhat.com>

Message-id: 1497023553-18411-5-git-send-email-eric.auger@redhat.com

include/migration/vmstate.h | 2 ++

hw/intc/arm_gicv3_common.c | 1 +

hw/intc/arm_gicv3_its_common.c | 2 +-

hw/intc/arm_gicv3_its_kvm.c | 24 ++++++++++++------------

4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h

--- a/include/migration/vmstate.h

+++ b/include/migration/vmstate.h

@@ -XXX,XX +XXX,XX @@ enum VMStateFlags {

typedef enum {

MIG_PRI_DEFAULT = 0,

MIG_PRI_IOMMU, /* Must happen before PCI devices */

+ MIG_PRI_GICV3_ITS, /* Must happen before PCI devices */

+ MIG_PRI_GICV3, /* Must happen before the ITS */

MIG_PRI_MAX,

} MigrationPriority;

diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c

--- a/hw/intc/arm_gicv3_common.c

+++ b/hw/intc/arm_gicv3_common.c

@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_gicv3 = {

.minimum_version_id = 1,

.pre_save = gicv3_pre_save,

.post_load = gicv3_post_load,

+ .priority = MIG_PRI_GICV3,

.fields = (VMStateField[]) {

VMSTATE_UINT32(gicd_ctlr, GICv3State),

VMSTATE_UINT32_ARRAY(gicd_statusr, GICv3State, 2),

diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_common.c

+++ b/hw/intc/arm_gicv3_its_common.c

@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_its = {

.name = "arm_gicv3_its",

.pre_save = gicv3_its_pre_save,

.post_load = gicv3_its_post_load,

- .unmigratable = true,

+ .priority = MIG_PRI_GICV3_ITS,

.fields = (VMStateField[]) {

VMSTATE_UINT32(ctlr, GICv3ITSState),

VMSTATE_UINT32(iidr, GICv3ITSState),

diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_kvm.c

+++ b/hw/intc/arm_gicv3_its_kvm.c

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);

Error *local_err = NULL;

- /*

- * Block migration of a KVM GICv3 ITS device: the API for saving and

- * restoring the state in the kernel is not yet available

- */

- error_setg(&s->migration_blocker, "vITS migration is not implemented");

- migrate_add_blocker(s->migration_blocker, &local_err);

- if (local_err) {

- error_propagate(errp, local_err);

- error_free(s->migration_blocker);

- return;

- }

-

s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_ITS, false);

if (s->dev_fd < 0) {

error_setg_errno(errp, -s->dev_fd, "error creating in-kernel ITS");

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

gicv3_its_init_mmio(s, NULL);

+ if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CTLR)) {

+ error_setg(&s->migration_blocker, "This operating system kernel "

+ "does not support vITS migration");

+ migrate_add_blocker(s->migration_blocker, &local_err);

+ if (local_err) {

+ error_propagate(errp, local_err);

+ error_free(s->migration_blocker);

+ return;

+ }

+ }

+

kvm_msi_use_devid = true;

kvm_gsi_direct_mapping = false;

kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();

2.7.4

From: Cédric Le Goater <clg@kaod.org>

When a timer is enabled before a reload value is set, the controller

waits for a reload value to be set before starting decrementing. This

fix tries to cover that case by changing the timer expiry only when

a reload value is valid.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>

Message-id: 1496739312-32304-1-git-send-email-clg@kaod.org

hw/timer/aspeed_timer.c | 37 +++++++++++++++++++++++++++++--------

1 file changed, 29 insertions(+), 8 deletions(-)

diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c

--- a/hw/timer/aspeed_timer.c

+++ b/hw/timer/aspeed_timer.c

@@ -XXX,XX +XXX,XX @@ static uint64_t calculate_next(struct AspeedTimer *t)

next = seq[1];

} else if (now < seq[2]) {

next = seq[2];

- } else {

+ } else if (t->reload) {

reload_ns = muldiv64(t->reload, NANOSECONDS_PER_SECOND, rate);

t->start = now - ((now - t->start) % reload_ns);

+ } else {

+ /* no reload value, return 0 */

+ break;

}

}

return next;

}

+static void aspeed_timer_mod(AspeedTimer *t)

+{

+ uint64_t next = calculate_next(t);

+ if (next) {

+ timer_mod(&t->timer, next);

+ }

+}

static void aspeed_timer_expire(void *opaque)

{

AspeedTimer *t = opaque;

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_expire(void *opaque)

qemu_set_irq(t->irq, t->level);

}

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

}

static uint64_t aspeed_timer_get_value(AspeedTimer *t, int reg)

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,

uint32_t value)

{

AspeedTimer *t;

+ uint32_t old_reload;

trace_aspeed_timer_set_value(timer, reg, value);

t = &s->timers[timer];

switch (reg) {

+ case TIMER_REG_RELOAD:

+ old_reload = t->reload;

+ t->reload = value;

+

+ /* If the reload value was not previously set, or zero, and

+ * the current value is valid, try to start the timer if it is

+ * enabled.

+ */

+ if (old_reload || !t->reload) {

+ break;

case TIMER_REG_STATUS:

if (timer_enabled(t)) {

uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,

uint32_t rate = calculate_rate(t);

t->start += muldiv64(delta, NANOSECONDS_PER_SECOND, rate);

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

}

break;

- case TIMER_REG_RELOAD:

- t->reload = value;

- break;

case TIMER_REG_MATCH_FIRST:

case TIMER_REG_MATCH_SECOND:

t->match[reg - 2] = value;

if (timer_enabled(t)) {

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

}

break;

default:

@@ -XXX,XX +XXX,XX @@ static void aspeed_timer_ctrl_enable(AspeedTimer *t, bool enable)

trace_aspeed_timer_ctrl_enable(t->id, enable);

if (enable) {

t->start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);

- timer_mod(&t->timer, calculate_next(t));

+ aspeed_timer_mod(t);

} else {

timer_del(&t->timer);

}

2.7.4

From: Eric Auger <eric.auger@redhat.com>

We need to handle both registers and ITS tables. While

register handling is standard, ITS table handling is more

challenging since the kernel API is devised so that the

tables are flushed into guest RAM and not in vmstate buffers.

Flushing the ITS tables on device pre_save() is too late

since the guest RAM is already saved at this point.

Table flushing needs to happen when we are sure the vcpus

are stopped and before the last dirty page saving. The

right point is RUN_STATE_FINISH_MIGRATE but sometimes the

VM gets stopped before migration launch so let's simply

flush the tables each time the VM gets stopped.

For regular ITS registers we just can use vmstate pre_save()

and post_load() callbacks.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Message-id: 1497023553-18411-3-git-send-email-eric.auger@redhat.com

include/hw/intc/arm_gicv3_its_common.h | 8 +++

hw/intc/arm_gicv3_its_common.c | 10 ++++

hw/intc/arm_gicv3_its_kvm.c | 105 +++++++++++++++++++++++++++++++++

3 files changed, 123 insertions(+)

diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_gicv3_its_common.h

--- a/include/hw/intc/arm_gicv3_its_common.h

+++ b/include/hw/intc/arm_gicv3_its_common.h

@@ -XXX,XX +XXX,XX @@

#define ITS_TRANS_SIZE 0x10000

#define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE)

+#define GITS_CTLR 0x0

+#define GITS_IIDR 0x4

+#define GITS_CBASER 0x80

+#define GITS_CWRITER 0x88

+#define GITS_CREADR 0x90

+#define GITS_BASER 0x100

+

struct GICv3ITSState {

SysBusDevice parent_obj;

@@ -XXX,XX +XXX,XX @@ struct GICv3ITSState {

/* Registers */

uint32_t ctlr;

+ uint32_t iidr;

uint64_t cbaser;

uint64_t cwriter;

uint64_t creadr;

diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_common.c

+++ b/hw/intc/arm_gicv3_its_common.c

@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_its = {

.pre_save = gicv3_its_pre_save,

.post_load = gicv3_its_post_load,

.unmigratable = true,

+ .fields = (VMStateField[]) {

+ VMSTATE_UINT32(ctlr, GICv3ITSState),

+ VMSTATE_UINT32(iidr, GICv3ITSState),

+ VMSTATE_UINT64(cbaser, GICv3ITSState),

+ VMSTATE_UINT64(cwriter, GICv3ITSState),

+ VMSTATE_UINT64(creadr, GICv3ITSState),

+ VMSTATE_UINT64_ARRAY(baser, GICv3ITSState, 8),

+ VMSTATE_END_OF_LIST()

+ },

};

static MemTxResult gicv3_its_trans_read(void *opaque, hwaddr offset,

@@ -XXX,XX +XXX,XX @@ static void gicv3_its_common_reset(DeviceState *dev)

s->cbaser = 0;

s->cwriter = 0;

s->creadr = 0;

+ s->iidr = 0;

memset(&s->baser, 0, sizeof(s->baser));

gicv3_its_post_load(s, 0);

diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/intc/arm_gicv3_its_kvm.c

+++ b/hw/intc/arm_gicv3_its_kvm.c

@@ -XXX,XX +XXX,XX @@ static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid)

return kvm_vm_ioctl(kvm_state, KVM_SIGNAL_MSI, &msi);

+/**

+ * vm_change_state_handler - VM change state callback aiming at flushing

+ * ITS tables into guest RAM

+ *

+ * The tables get flushed to guest RAM whenever the VM gets stopped.

+ */

+static void vm_change_state_handler(void *opaque, int running,

+ RunState state)

+{

+ GICv3ITSState *s = (GICv3ITSState *)opaque;

+ Error *err = NULL;

+ int ret;

+

+ if (running) {

+ return;

+ }

+

+ ret = kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,

+ KVM_DEV_ARM_ITS_SAVE_TABLES, NULL, true, &err);

+ if (err) {

+ error_report_err(err);

+ }

+ if (ret < 0 && ret != -EFAULT) {

+ abort();

+ }

+}

+

static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

{

GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp)

kvm_msi_use_devid = true;

kvm_gsi_direct_mapping = false;

kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();

+

+ qemu_add_vm_change_state_handler(vm_change_state_handler, s);

}

static void kvm_arm_its_init(Object *obj)

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_init(Object *obj)

&error_abort);

}

+/**

+ * kvm_arm_its_pre_save - handles the saving of ITS registers.

+ * ITS tables are flushed into guest RAM separately and earlier,

+ * through the VM change state handler, since at the moment pre_save()

+ * is called, the guest RAM has already been saved.

+ */

+static void kvm_arm_its_pre_save(GICv3ITSState *s)

+{

+ int i;

+

+ for (i = 0; i < 8; i++) {

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_BASER + i * 8, &s->baser[i], false,

+ &error_abort);

+ }

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CTLR, &s->ctlr, false, &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CBASER, &s->cbaser, false, &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CREADR, &s->creadr, false, &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CWRITER, &s->cwriter, false, &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_IIDR, &s->iidr, false, &error_abort);

+}

+

+/**

+ * kvm_arm_its_post_load - Restore both the ITS registers and tables

+ */

+static void kvm_arm_its_post_load(GICv3ITSState *s)

+{

+ int i;

+

+ if (!s->iidr) {

+ return;

+ }

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_IIDR, &s->iidr, true, &error_abort);

+

+ /*

+ * must be written before GITS_CREADR since GITS_CBASER write

+ * access resets GITS_CREADR.

+ */

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CBASER, &s->cbaser, true, &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CREADR, &s->creadr, true, &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CWRITER, &s->cwriter, true, &error_abort);

+

+

+ for (i = 0; i < 8; i++) {

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_BASER + i * 8, &s->baser[i], true,

+ &error_abort);

+ }

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,

+ KVM_DEV_ARM_ITS_RESTORE_TABLES, NULL, true,

+ &error_abort);

+

+ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,

+ GITS_CTLR, &s->ctlr, true, &error_abort);

+}

+

static void kvm_arm_its_class_init(ObjectClass *klass, void *data)

{

DeviceClass *dc = DEVICE_CLASS(klass);

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_its_class_init(ObjectClass *klass, void *data)

dc->realize = kvm_arm_its_realize;

icc->send_msi = kvm_its_send_msi;

+ icc->pre_save = kvm_arm_its_pre_save;

+ icc->post_load = kvm_arm_its_post_load;

}

static const TypeInfo kvm_arm_its_info = {

2.7.4

From: Krzysztof Kozlowski <krzk@kernel.org>

Remove defines not used anywhere.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

hw/timer/exynos4210_mct.c | 3 ---

1 file changed, 3 deletions(-)

diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c

--- a/hw/timer/exynos4210_mct.c

+++ b/hw/timer/exynos4210_mct.c

@@ -XXX,XX +XXX,XX @@ enum LocalTimerRegCntIndexes {

L_REG_CNT_AMOUNT

-#define MCT_NIRQ 6

#define MCT_SFR_SIZE 0x444

#define MCT_GT_CMP_NUM 4

-#define MCT_GT_MAX_VAL UINT64_MAX

-

#define MCT_GT_COUNTER_STEP 0x100000000ULL

#define MCT_LT_COUNTER_STEP 0x100000000ULL

#define MCT_LT_CNT_LOW_LIMIT 0x100

2.7.4

From: Cédric Le Goater <clg@kaod.org>

Temperatures can be changed from the monitor with :

    (qemu) qom-set /machine/unattached/device[2] temperature0 12000

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Message-id: 1496739230-32109-3-git-send-email-clg@kaod.org

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/arm/aspeed.c | 9 +++++++++

1 file changed, 9 insertions(+)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c

--- a/hw/arm/aspeed.c

+++ b/hw/arm/aspeed.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_board_init(MachineState *machine,

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)

{

AspeedSoCState *soc = &bmc->soc;

+ DeviceState *dev;

/* The palmetto platform expects a ds3231 RTC but a ds1338 is

* enough to provide basic RTC features. Alarms will be missing */

i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);

+ /* add a TMP423 temperature sensor */

+ dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),

+ "tmp423", 0x4c);

+ object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);

+ object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);

+ object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);

+ object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);

}

static void palmetto_bmc_init(MachineState *machine)

2.7.4

From: Pranith Kumar <bobby.prani@gmail.com>

Tested and confirmed that the stretch i386 debian qcow2 image on a

raspberry pi 2 works.

include/qemu/timer.h | 5 ++---

1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/qemu/timer.h b/include/qemu/timer.h

--- a/include/qemu/timer.h

+++ b/include/qemu/timer.h

@@ -XXX,XX +XXX,XX @@ static inline int64_t cpu_get_host_ticks(void)

/* The host CPU doesn't have an easily accessible cycle counter.

Just return a monotonically increasing value. This will be

totally wrong, but hopefully better than nothing. */

-static inline int64_t cpu_get_host_ticks (void)

+static inline int64_t cpu_get_host_ticks(void)

{

- static int64_t ticks = 0;

- return ticks++;

+ return get_clock();

}

#endif

2.7.4

From: Krzysztof Kozlowski <krzk@kernel.org>

Use a define for a9mpcore_priv device type name instead of hard-coded

string.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/arm/exynos4210.c | 3 ++-

1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c

--- a/hw/arm/exynos4210.c

+++ b/hw/arm/exynos4210.c

@@ -XXX,XX +XXX,XX @@

#include "qemu-common.h"

#include "qemu/log.h"

#include "cpu.h"

+#include "hw/cpu/a9mpcore.h"

#include "hw/boards.h"

#include "sysemu/sysemu.h"

#include "hw/sysbus.h"

@@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)

}

/* Private memory region and Internal GIC */

- dev = qdev_create(NULL, "a9mpcore_priv");

+ dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV);

qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS);

qdev_init_nofail(dev);

busdev = SYS_BUS_DEVICE(dev);

2.7.4

From: Krzysztof Kozlowski <krzk@kernel.org>

The static array of interrupt combiner mappings is not modified so it

can be made const for code safeness.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

hw/intc/exynos4210_gic.c | 2 +-

diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c

--- a/hw/intc/exynos4210_gic.c

+++ b/hw/intc/exynos4210_gic.c

@@ -XXX,XX +XXX,XX @@ enum ExtInt {

* which is INTG16 in Internal Interrupt Combiner.

*/

-static uint32_t

+static const uint32_t

combiner_grp_to_gic_id[64-EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ][8] = {

/* int combiner groups 16-19 */

{ }, { }, { }, { },

2.7.4

From: Eric Auger <eric.auger@redhat.com>

In some circumstances, we don't want to abort if the

kvm_device_access fails. This will be the case during ITS

migration, in case the ITS table save/restore fails because

the guest did not program the vITS correctly. So let's pass an

error object to the function and return the ioctl value. New

callers will be able to make a decision upon this returned

value.

Existing callers pass &error_abort which will cause the

function to abort on failure.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Juan Quintela <quintela@redhat.com>

Reviewed-by: Peter Xu <peterx@redhat.com>

Message-id: 1497023553-18411-2-git-send-email-eric.auger@redhat.com

[PMM: wrapped long line]

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

include/sysemu/kvm.h | 11 +++++++----

hw/intc/arm_gic_kvm.c | 9 +++++----

hw/intc/arm_gicv3_its_kvm.c | 2 +-

hw/intc/arm_gicv3_kvm.c | 14 +++++++-------

kvm-all.c | 14 ++++++++------

5 files changed, 28 insertions(+), 22 deletions(-)

diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h

--- a/include/sysemu/kvm.h

+++ b/include/sysemu/kvm.h

@@ -XXX,XX +XXX,XX @@ int kvm_device_check_attr(int fd, uint32_t group, uint64_t attr);

* @attr: the attribute of that group to set or get

* @val: pointer to a storage area for the value

* @write: true for set and false for get operation

+ * @errp: error object handle

*

- * This function is not allowed to fail. Use kvm_device_check_attr()

- * in order to check for the availability of optional attributes.

+ * Returns: 0 on success

+ * < 0 on error

+ * Use kvm_device_check_attr() in order to check for the availability

+ * of optional attributes.

*/

-void kvm_device_access(int fd, int group, uint64_t attr,

- void *val, bool write);

+int kvm_device_access(int fd, int group, uint64_t attr,

+ void *val, bool write, Error **errp);

/**

* kvm_create_device - create a KVM device for the device control API

diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c

--- a/hw/intc/arm_gic_kvm.c

+++ b/hw/intc/arm_gic_kvm.c

@@ -XXX,XX +XXX,XX @@ static void kvm_gicd_access(GICState *s, int offset, int cpu,

uint32_t *val, bool write)

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_DIST_REGS,

- KVM_VGIC_ATTR(offset, cpu), val, write);

+ KVM_VGIC_ATTR(offset, cpu), val, write, &error_abort);

static void kvm_gicc_access(GICState *s, int offset, int cpu,

uint32_t *val, bool write)

{

kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_REGS,

- KVM_VGIC_ATTR(offset, cpu), val, write);

+ KVM_VGIC_ATTR(offset, cpu), val, write, &error_abort);

#define for_each_irq_reg(_ctr, _max_irq, _field_width) \

@@ -XXX,XX +XXX,XX @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)