1 | Dropped the tmp421 patch and the following patch that | 1 | Respin to fix some accidental wrong Author lines, no content |
---|---|---|---|
2 | depended on it; no other changes. | 2 | changes. |
3 | 3 | ||
4 | thanks | ||
5 | -- PMM | 4 | -- PMM |
6 | 5 | ||
7 | The following changes since commit 43771d5d92312504305c19abe29ec5bfabd55f01: | 6 | The following changes since commit 0bbba1665ca2e7f1c80d4797077fe57bad58898e: |
8 | 7 | ||
9 | Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-05-31' into staging (2017-06-01 16:39:16 +0100) | 8 | Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-october-2018-part-4' into staging (2018-10-30 10:45:49 +0000) |
10 | 9 | ||
11 | are available in the git repository at: | 10 | are available in the Git repository at: |
12 | 11 | ||
13 | git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170602 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181030 |
14 | 13 | ||
15 | for you to fetch changes up to c7637c04be257968e6df30de961a6a23a0ac3dd8: | 14 | for you to fetch changes up to 1f5a65a188210509bfb0c025fc91635c8436b98a: |
16 | 15 | ||
17 | hw/arm/virt: fdt: generate distance-map when needed (2017-06-02 11:51:49 +0100) | 16 | tests/boot-serial-test: Add microbit board testcase (2018-10-30 13:20:18 +0000) |
18 | 17 | ||
19 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
20 | target-arm queue: | 19 | target-arm queue: |
21 | * virt: numa: provide ACPI distance info when needed | 20 | * microbit: Add the UART to our nRF51 SoC model |
22 | * aspeed: fix i2c controller bugs | 21 | * Add a virtual Xilinx Versal board "xlnx-versal-virt" |
23 | * M profile: support MPU | 22 | * hw/arm/virt: Set VIRT_COMPAT_3_0 compat |
24 | * gicv3: fix mishandling of BPR1, VBPR1 | ||
25 | * load_uboot_image: don't assume a full header read | ||
26 | * libvixl: Correct build failures on NetBSD | ||
27 | 23 | ||
28 | ---------------------------------------------------------------- | 24 | ---------------------------------------------------------------- |
29 | Andrew Jones (3): | 25 | Edgar E. Iglesias (2): |
30 | load_uboot_image: don't assume a full header read | 26 | hw/arm: versal: Add a model of Xilinx Versal SoC |
31 | hw/arm/virt-acpi-build: build SLIT when needed | 27 | hw/arm: versal: Add a virtual Xilinx Versal board |
32 | hw/arm/virt: fdt: generate distance-map when needed | ||
33 | 28 | ||
34 | Cédric Le Goater (4): | 29 | Eric Auger (1): |
35 | aspeed/i2c: improve command handling | 30 | hw/arm/virt: Set VIRT_COMPAT_3_0 compat |
36 | aspeed/i2c: handle LAST command under the RX command | ||
37 | aspeed/i2c: introduce a state machine | ||
38 | aspeed: add some I2C devices to the Aspeed machines | ||
39 | 31 | ||
40 | Kamil Rytarowski (1): | 32 | Julia Suvorova (3): |
41 | libvixl: Correct build failures on NetBSD | 33 | hw/char: Implement nRF51 SoC UART |
34 | hw/arm/nrf51_soc: Connect UART to nRF51 SoC | ||
35 | tests/boot-serial-test: Add microbit board testcase | ||
42 | 36 | ||
43 | Michael Davidsaver (4): | 37 | hw/arm/Makefile.objs | 1 + |
44 | armv7m: Improve "-d mmu" tracing for PMSAv7 MPU | 38 | hw/char/Makefile.objs | 1 + |
45 | armv7m: Implement M profile default memory map | 39 | include/hw/arm/nrf51_soc.h | 3 + |
46 | armv7m: Classify faults as MemManage or BusFault | 40 | include/hw/arm/xlnx-versal.h | 122 +++++++++ |
47 | arm: add MPU support to M profile CPUs | 41 | include/hw/char/nrf51_uart.h | 78 ++++++ |
42 | hw/arm/microbit.c | 2 + | ||
43 | hw/arm/nrf51_soc.c | 20 ++ | ||
44 | hw/arm/virt.c | 4 + | ||
45 | hw/arm/xlnx-versal-virt.c | 493 ++++++++++++++++++++++++++++++++++++ | ||
46 | hw/arm/xlnx-versal.c | 323 +++++++++++++++++++++++ | ||
47 | hw/char/nrf51_uart.c | 330 ++++++++++++++++++++++++ | ||
48 | tests/boot-serial-test.c | 19 ++ | ||
49 | default-configs/aarch64-softmmu.mak | 1 + | ||
50 | hw/char/trace-events | 4 + | ||
51 | 14 files changed, 1401 insertions(+) | ||
52 | create mode 100644 include/hw/arm/xlnx-versal.h | ||
53 | create mode 100644 include/hw/char/nrf51_uart.h | ||
54 | create mode 100644 hw/arm/xlnx-versal-virt.c | ||
55 | create mode 100644 hw/arm/xlnx-versal.c | ||
56 | create mode 100644 hw/char/nrf51_uart.c | ||
48 | 57 | ||
49 | Peter Maydell (12): | ||
50 | hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1 | ||
51 | hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimum | ||
52 | hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1 | ||
53 | arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access() | ||
54 | arm: Add support for M profile CPUs having different MMU index semantics | ||
55 | arm: Use different ARMMMUIdx values for M profile | ||
56 | arm: Clean up handling of no-MPU PMSA CPUs | ||
57 | arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs | ||
58 | arm: Don't let no-MPU PMSA cores write to SCTLR.M | ||
59 | arm: Remove unnecessary check on cpu->pmsav7_dregion | ||
60 | arm: All M profile cores are PMSA | ||
61 | arm: Implement HFNMIENA support for M profile MPU | ||
62 | |||
63 | Wei Huang (1): | ||
64 | target/arm: clear PMUVER field of AA64DFR0 when vPMU=off | ||
65 | |||
66 | disas/libvixl/Makefile.objs | 3 + | ||
67 | target/arm/cpu.h | 118 ++++++++++++++-- | ||
68 | target/arm/translate.h | 2 +- | ||
69 | hw/arm/aspeed.c | 27 ++++ | ||
70 | hw/arm/virt-acpi-build.c | 4 + | ||
71 | hw/arm/virt.c | 21 +++ | ||
72 | hw/core/loader.c | 3 +- | ||
73 | hw/i2c/aspeed_i2c.c | 65 +++++++-- | ||
74 | hw/intc/arm_gicv3_cpuif.c | 50 ++++++- | ||
75 | hw/intc/armv7m_nvic.c | 104 ++++++++++++++ | ||
76 | target/arm/cpu.c | 28 +++- | ||
77 | target/arm/helper.c | 338 ++++++++++++++++++++++++++++++-------------- | ||
78 | target/arm/machine.c | 7 +- | ||
79 | target/arm/op_helper.c | 3 +- | ||
80 | target/arm/translate-a64.c | 18 ++- | ||
81 | target/arm/translate.c | 14 +- | ||
82 | 16 files changed, 648 insertions(+), 157 deletions(-) | ||
83 | diff view generated by jsdifflib |