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Dropped the tmp421 patch and the following patch that
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Respin to fix some accidental wrong Author lines, no content
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depended on it; no other changes.
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changes.
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thanks
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-- PMM
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-- PMM
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The following changes since commit 43771d5d92312504305c19abe29ec5bfabd55f01:
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The following changes since commit 0bbba1665ca2e7f1c80d4797077fe57bad58898e:
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Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-05-31' into staging (2017-06-01 16:39:16 +0100)
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Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-october-2018-part-4' into staging (2018-10-30 10:45:49 +0000)
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are available in the git repository at:
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are available in the Git repository at:
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git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170602
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181030
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for you to fetch changes up to c7637c04be257968e6df30de961a6a23a0ac3dd8:
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for you to fetch changes up to 1f5a65a188210509bfb0c025fc91635c8436b98a:
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hw/arm/virt: fdt: generate distance-map when needed (2017-06-02 11:51:49 +0100)
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tests/boot-serial-test: Add microbit board testcase (2018-10-30 13:20:18 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* virt: numa: provide ACPI distance info when needed
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* microbit: Add the UART to our nRF51 SoC model
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* aspeed: fix i2c controller bugs
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* Add a virtual Xilinx Versal board "xlnx-versal-virt"
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* M profile: support MPU
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* hw/arm/virt: Set VIRT_COMPAT_3_0 compat
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* gicv3: fix mishandling of BPR1, VBPR1
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* load_uboot_image: don't assume a full header read
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* libvixl: Correct build failures on NetBSD
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----------------------------------------------------------------
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----------------------------------------------------------------
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Andrew Jones (3):
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Edgar E. Iglesias (2):
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load_uboot_image: don't assume a full header read
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hw/arm: versal: Add a model of Xilinx Versal SoC
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hw/arm/virt-acpi-build: build SLIT when needed
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hw/arm: versal: Add a virtual Xilinx Versal board
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hw/arm/virt: fdt: generate distance-map when needed
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Cédric Le Goater (4):
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Eric Auger (1):
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aspeed/i2c: improve command handling
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hw/arm/virt: Set VIRT_COMPAT_3_0 compat
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aspeed/i2c: handle LAST command under the RX command
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aspeed/i2c: introduce a state machine
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aspeed: add some I2C devices to the Aspeed machines
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Kamil Rytarowski (1):
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Julia Suvorova (3):
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libvixl: Correct build failures on NetBSD
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hw/char: Implement nRF51 SoC UART
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hw/arm/nrf51_soc: Connect UART to nRF51 SoC
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tests/boot-serial-test: Add microbit board testcase
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Michael Davidsaver (4):
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hw/arm/Makefile.objs | 1 +
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armv7m: Improve "-d mmu" tracing for PMSAv7 MPU
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hw/char/Makefile.objs | 1 +
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armv7m: Implement M profile default memory map
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include/hw/arm/nrf51_soc.h | 3 +
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armv7m: Classify faults as MemManage or BusFault
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include/hw/arm/xlnx-versal.h | 122 +++++++++
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arm: add MPU support to M profile CPUs
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include/hw/char/nrf51_uart.h | 78 ++++++
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hw/arm/microbit.c | 2 +
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hw/arm/nrf51_soc.c | 20 ++
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hw/arm/virt.c | 4 +
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hw/arm/xlnx-versal-virt.c | 493 ++++++++++++++++++++++++++++++++++++
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hw/arm/xlnx-versal.c | 323 +++++++++++++++++++++++
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hw/char/nrf51_uart.c | 330 ++++++++++++++++++++++++
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tests/boot-serial-test.c | 19 ++
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default-configs/aarch64-softmmu.mak | 1 +
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hw/char/trace-events | 4 +
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14 files changed, 1401 insertions(+)
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create mode 100644 include/hw/arm/xlnx-versal.h
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create mode 100644 include/hw/char/nrf51_uart.h
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create mode 100644 hw/arm/xlnx-versal-virt.c
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create mode 100644 hw/arm/xlnx-versal.c
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create mode 100644 hw/char/nrf51_uart.c
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Peter Maydell (12):
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hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1
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hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimum
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hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1
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arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access()
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arm: Add support for M profile CPUs having different MMU index semantics
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arm: Use different ARMMMUIdx values for M profile
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arm: Clean up handling of no-MPU PMSA CPUs
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arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs
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arm: Don't let no-MPU PMSA cores write to SCTLR.M
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arm: Remove unnecessary check on cpu->pmsav7_dregion
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arm: All M profile cores are PMSA
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arm: Implement HFNMIENA support for M profile MPU
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Wei Huang (1):
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target/arm: clear PMUVER field of AA64DFR0 when vPMU=off
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disas/libvixl/Makefile.objs | 3 +
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target/arm/cpu.h | 118 ++++++++++++++--
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target/arm/translate.h | 2 +-
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hw/arm/aspeed.c | 27 ++++
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hw/arm/virt-acpi-build.c | 4 +
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hw/arm/virt.c | 21 +++
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hw/core/loader.c | 3 +-
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hw/i2c/aspeed_i2c.c | 65 +++++++--
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hw/intc/arm_gicv3_cpuif.c | 50 ++++++-
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hw/intc/armv7m_nvic.c | 104 ++++++++++++++
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target/arm/cpu.c | 28 +++-
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target/arm/helper.c | 338 ++++++++++++++++++++++++++++++--------------
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target/arm/machine.c | 7 +-
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target/arm/op_helper.c | 3 +-
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target/arm/translate-a64.c | 18 ++-
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target/arm/translate.c | 14 +-
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16 files changed, 648 insertions(+), 157 deletions(-)
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diff view generated by jsdifflib