Commit c10b97092 changed some field names in rldicr and rldimi patterns
but forgot to update the constraints to match the change. Since the
field (previously 'rb' and now 'sh') is an immediate rather than a
register number, the correct fix is to just delete the constraint
since we don't need to avoid particular values.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 ppc64.risu | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/ppc64.risu b/ppc64.risu
index dd304e2..e2fd4f6 100644
--- a/ppc64.risu
+++ b/ppc64.risu
@@ -1473,17 +1473,17 @@ RLDICLd PPC64LE 011110 rs:5 ra:5 sh:5 mb:6 000 sha:1 1 \
 
 # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate then Clear Right
 RLDICR PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 0 \
-!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
+!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
 # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate then Clear Right
 RLDICRd PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 1 \
-!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
+!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
 
 # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate then Mask Insert
 RLDIMI PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 0 \
-!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
+!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
 # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate then Mask Insert
 RLDIMId PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 1 \
-!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
+!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
 
 # format:M book:I page:102 v:P1 SR rlwimi[.] Rotate Left Word Immediate then Mask Insert
 RLWIMI PPC64LE 010100 rs:5 ra:5 sh:5 mb:5 me:5 0 \
-- 
2.7.4

Peter Maydell <peter.maydell@linaro.org> writes:

> Commit c10b97092 changed some field names in rldicr and rldimi patterns
> but forgot to update the constraints to match the change. Since the
> field (previously 'rb' and now 'sh') is an immediate rather than a
> register number, the correct fix is to just delete the constraint
> since we don't need to avoid particular values.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Thanks for fixing it.


> ---
>  ppc64.risu | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/ppc64.risu b/ppc64.risu
> index dd304e2..e2fd4f6 100644
> --- a/ppc64.risu
> +++ b/ppc64.risu
> @@ -1473,17 +1473,17 @@ RLDICLd PPC64LE 011110 rs:5 ra:5 sh:5 mb:6 000 sha:1 1 \
>
>  # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate then Clear Right
>  RLDICR PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 0 \
> -!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
> +!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
>  # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate then Clear Right
>  RLDICRd PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 1 \
> -!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
> +!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
>
>  # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate then Mask Insert
>  RLDIMI PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 0 \
> -!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
> +!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
>  # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate then Mask Insert
>  RLDIMId PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 1 \
> -!constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
> +!constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
>
>  # format:M book:I page:102 v:P1 SR rlwimi[.] Rotate Left Word Immediate then Mask Insert
>  RLWIMI PPC64LE 010100 rs:5 ra:5 sh:5 mb:5 me:5 0 \
> -- 
> 2.7.4