Second lot of ARM changes to sneak in before freeze:

* fixed version of the raspi2 sd controller patches

* GICv3 save/restore

* v7M QOMify

I've also included the Linux header update patches stolen

from Paolo's pullreq since it hasn't quite hit master yet.

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170228' into staging (2017-02-28 14:50:17 +0000)

are available in the git repository at:

git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170228-1

for you to fetch changes up to 1eeb5c7deacbfb4d4cad17590a16a99f3d85eabb:

bcm2835: add sdhost and gpio controllers (2017-02-28 17:10:00 +0000)

* raspi2: add gpio controller and sdhost controller, with

the wiring so the guest can switch which controller the

SD card is attached to

(this is sufficient to get raspbian kernels to boot)

* GICv3: support state save/restore from KVM

* update Linux headers to 4.11

* refactor and QOMify the ARMv7M container object

Clement Deschamps (3):

hw/sd: add card-reparenting function

bcm2835_gpio: add bcm2835 gpio controller

bcm2835: add sdhost and gpio controllers

Paolo Bonzini (2):

update-linux-headers: update for 4.11

update Linux headers to 4.11

Peter Maydell (12):

armv7m: Abstract out the "load kernel" code

armv7m: Move NVICState struct definition into header

armv7m: QOMify the armv7m container

armv7m: Use QOMified armv7m object in armv7m_init()

armv7m: Make ARMv7M object take memory region link

armv7m: Make NVIC expose a memory region rather than mapping itself

armv7m: Make bitband device take the address space to access

armv7m: Don't put core v7M devices under CONFIG_STELLARIS

armv7m: Split systick out from NVIC

stm32f205: Create armv7m object without using armv7m_init()

stm32f205: Rename 'nvic' local to 'armv7m'

qdev: Have qdev_set_parent_bus() handle devices already on a bus

Vijaya Kumar K (4):

hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate

hw/intc/arm_gicv3_kvm: Implement get/put functions

target-arm: Add GICv3CPUState in CPUARMState struct

hw/intc/arm_gicv3_kvm: Reset GICv3 cpu interface registers

From: Clement Deschamps <clement.deschamps@antfield.fr>

This adds the bcm2835_sdhost and bcm2835_gpio to the BCM2835 platform.

For supporting the SD controller selection (alternate function of GPIOs

48-53), the bcm2835_gpio now exposes an sdbus.

It also has a link to both the sdbus of sdhci and sdhost controllers,

and the card is reparented from one bus to another when the alternate

function of GPIOs 48-53 is modified.

Signed-off-by: Clement Deschamps <clement.deschamps@antfield.fr>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Message-id: 1488293711-14195-5-git-send-email-peter.maydell@linaro.org

Message-id: 20170224164021.9066-5-clement.deschamps@antfield.fr

include/hw/arm/bcm2835_peripherals.h | 4 ++++

hw/arm/bcm2835_peripherals.c | 43 ++++++++++++++++++++++++++++++++++--

2 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h

--- a/include/hw/arm/bcm2835_peripherals.h

+++ b/include/hw/arm/bcm2835_peripherals.h

@@ -XXX,XX +XXX,XX @@

#include "hw/misc/bcm2835_rng.h"

#include "hw/misc/bcm2835_mbox.h"

#include "hw/sd/sdhci.h"

+#include "hw/sd/bcm2835_sdhost.h"

+#include "hw/gpio/bcm2835_gpio.h"

#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"

#define BCM2835_PERIPHERALS(obj) \

@@ -XXX,XX +XXX,XX @@ typedef struct BCM2835PeripheralState {

BCM2835RngState rng;

BCM2835MboxState mboxes;

SDHCIState sdhci;

+ BCM2835SDHostState sdhost;

+ BCM2835GpioState gpio;

} BCM2835PeripheralState;

#endif /* BCM2835_PERIPHERALS_H */

diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/bcm2835_peripherals.c

+++ b/hw/arm/bcm2835_peripherals.c

@@ -XXX,XX +XXX,XX @@ static void bcm2835_peripherals_init(Object *obj)

object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL);

qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default());

+ /* SDHOST */

+ object_initialize(&s->sdhost, sizeof(s->sdhost), TYPE_BCM2835_SDHOST);

+ object_property_add_child(obj, "sdhost", OBJECT(&s->sdhost), NULL);

+ qdev_set_parent_bus(DEVICE(&s->sdhost), sysbus_get_default());

+

/* DMA Channels */

object_initialize(&s->dma, sizeof(s->dma), TYPE_BCM2835_DMA);

object_property_add_child(obj, "dma", OBJECT(&s->dma), NULL);

@@ -XXX,XX +XXX,XX @@ static void bcm2835_peripherals_init(Object *obj)

object_property_add_const_link(OBJECT(&s->dma), "dma-mr",

OBJECT(&s->gpu_bus_mr), &error_abort);

+

+ /* GPIO */

+ object_initialize(&s->gpio, sizeof(s->gpio), TYPE_BCM2835_GPIO);

+ object_property_add_child(obj, "gpio", OBJECT(&s->gpio), NULL);

+ qdev_set_parent_bus(DEVICE(&s->gpio), sysbus_get_default());

+

+ object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",

+ OBJECT(&s->sdhci.sdbus), &error_abort);

+ object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",

+ OBJECT(&s->sdhost.sdbus), &error_abort);

}

static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)

@@ -XXX,XX +XXX,XX @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)

sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,

qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,

INTERRUPT_ARASANSDIO));

- object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->sdhci), "sd-bus",

- &err);

+

+ /* SDHOST */

+ object_property_set_bool(OBJECT(&s->sdhost), true, "realized", &err);

if (err) {

error_propagate(errp, err);

return;

+ memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,

+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));

+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,

+ qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,

+ INTERRUPT_SDIO));

+

/* DMA Channels */

object_property_set_bool(OBJECT(&s->dma), true, "realized", &err);

if (err) {

@@ -XXX,XX +XXX,XX @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)

BCM2835_IC_GPU_IRQ,

INTERRUPT_DMA0 + n));

2.7.4

From: Clement Deschamps <clement.deschamps@antfield.fr>

Provide a new function sdbus_reparent_card() in sd core for reparenting

a card from a SDBus to another one.

This function is required by the raspi platform, where the two SD

controllers can be dynamically switched.

Signed-off-by: Clement Deschamps <clement.deschamps@antfield.fr>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Message-id: 1488293711-14195-3-git-send-email-peter.maydell@linaro.org

Message-id: 20170224164021.9066-3-clement.deschamps@antfield.fr

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

[PMM: added a doc comment to the header file; changed to

use new behaviour of qdev_set_parent_bus()]

include/hw/sd/sd.h | 11 +++++++++++

hw/sd/core.c | 27 +++++++++++++++++++++++++++

2 files changed, 38 insertions(+)

diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h

--- a/include/hw/sd/sd.h

+++ b/include/hw/sd/sd.h

@@ -XXX,XX +XXX,XX @@ uint8_t sdbus_read_data(SDBus *sd);

bool sdbus_data_ready(SDBus *sd);

bool sdbus_get_inserted(SDBus *sd);

bool sdbus_get_readonly(SDBus *sd);

+/**

+ * sdbus_reparent_card: Reparent an SD card from one controller to another

+ * @from: controller bus to remove card from

+ * @to: controller bus to move card to

+ *

+ * Reparent an SD card, effectively unplugging it from one controller

+ * and inserting it into another. This is useful for SoCs like the

+ * bcm2835 which have two SD controllers and connect a single SD card

+ * to them, selected by the guest reprogramming GPIO line routing.

+ */

+void sdbus_reparent_card(SDBus *from, SDBus *to);

/* Functions to be used by SD devices to report back to qdevified controllers */

void sdbus_set_inserted(SDBus *sd, bool inserted);

diff --git a/hw/sd/core.c b/hw/sd/core.c

--- a/hw/sd/core.c

+++ b/hw/sd/core.c

@@ -XXX,XX +XXX,XX @@ void sdbus_set_readonly(SDBus *sdbus, bool readonly)

}

}

+void sdbus_reparent_card(SDBus *from, SDBus *to)

+{

+ SDState *card = get_card(from);

+ SDCardClass *sc;

+ bool readonly;

+

+ /* We directly reparent the card object rather than implementing this

+ * as a hotpluggable connection because we don't want to expose SD cards

+ * to users as being hotpluggable, and we can get away with it in this

+ * limited use case. This could perhaps be implemented more cleanly in

+ * future by adding support to the hotplug infrastructure for "device

+ * can be hotplugged only via code, not by user".

+ */

+

+ if (!card) {

+ return;

+ }

+

+ sc = SD_CARD_GET_CLASS(card);

+ readonly = sc->get_readonly(card);

+

+ sdbus_set_inserted(from, false);

+ qdev_set_parent_bus(DEVICE(card), &to->qbus);

+ sdbus_set_inserted(to, true);

+ sdbus_set_readonly(to, readonly);

+}

+

static const TypeInfo sd_bus_info = {

.name = TYPE_SD_BUS,

.parent = TYPE_BUS,

2.7.4

Abstract the "load kernel" code out of armv7m_init() into its own

function. This includes the registration of the CPU reset function,

to parallel how we handle this for A profile cores.

We make the function public so that boards which choose to

directly instantiate an ARMv7M device object can call it.

include/hw/arm/arm.h | 12 ++++++++++++

hw/arm/armv7m.c | 23 ++++++++++++++++++-----

2 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h

--- a/include/hw/arm/arm.h

+++ b/include/hw/arm/arm.h

@@ -XXX,XX +XXX,XX @@ typedef enum {

/* armv7m.c */

DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,

const char *kernel_filename, const char *cpu_model);

+/**

+ * armv7m_load_kernel:

+ * @cpu: CPU

+ * @kernel_filename: file to load

+ * @mem_size: mem_size: maximum image size to load

+ *

+ * Load the guest image for an ARMv7M system. This must be called by

+ * any ARMv7M board, either directly or via armv7m_init(). (This is

+ * necessary to ensure that the CPU resets correctly on system reset,

+ * as well as for kernel loading.)

+ */

+void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size);

/*

* struct used as a parameter of the arm_load_kernel machine init

diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/armv7m.c

+++ b/hw/arm/armv7m.c

@@ -XXX,XX +XXX,XX @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,

ARMCPU *cpu;

CPUARMState *env;

DeviceState *nvic;

- int image_size;

- uint64_t entry;

- uint64_t lowaddr;

- int big_endian;

if (cpu_model == NULL) {

    cpu_model = "cortex-m3";

@@ -XXX,XX +XXX,XX @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,

qdev_init_nofail(nvic);

sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0,

qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));

+ armv7m_load_kernel(cpu, kernel_filename, mem_size);

+ return nvic;

+}

+

+void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)

+{

+ int image_size;

+ uint64_t entry;

+ uint64_t lowaddr;

+ int big_endian;

#ifdef TARGET_WORDS_BIGENDIAN

big_endian = 1;

@@ -XXX,XX +XXX,XX @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,

+ /* CPU objects (unlike devices) are not automatically reset on system

+ * reset, so we must always register a handler to do so. Unlike

+ * A-profile CPUs, we don't need to do anything special in the

+ * handler to arrange that it starts correctly.

+ * This is arguably the wrong place to do this, but it matches the

+ * way A-profile does it. Note that this means that every M profile

+ * board must call this function!

+ */

qemu_register_reset(armv7m_reset, cpu);

- return nvic;

}

static Property bitband_properties[] = {

2.7.4