[Qemu-devel] [PULL 00/27] target-arm queue
[PULL v2 00/57] target-arm queue
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v1->v2 changes: drop the sd card-reparenting patch
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Squashed in a trivial fix for 32-bit hosts:
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and the 2 raspi2 patches that depend on it.
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--- a/target/arm/mve_helper.c
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+++ b/target/arm/mve_helper.c
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@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
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acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
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m[H##ESIZE(e)])); \
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} \
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- acc = int128_add(acc, 1 << 7); \
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+ acc = int128_add(acc, int128_make64(1 << 7)); \
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} \
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} \
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mve_advance_vpt(env); \
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-- PMM
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-- PMM
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The following changes since commit 6181478f6395cdd9d6ffd99623d0c9f39ea53606:
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The following changes since commit 53f306f316549d20c76886903181413d20842423:
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Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging (2017-02-28 08:46:03 +0000)
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Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
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are available in the git repository at:
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are available in the Git repository at:
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git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170228
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
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for you to fetch changes up to f3a6339a5bbc160d327299c67bb68c6d07fa4a61:
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for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
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hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-28 12:08:20 +0000)
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docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* raspi2: implement RNG module
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* Don't require 'virt' board to be compiled in for ACPI GHES code
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* raspi2: implement new SD card controller (but don't wire it up)
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* docs: Document which architecture extensions we emulate
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* sdhci: bugfixes for block transfers
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* Fix bugs in M-profile FPCXT_NS accesses
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* virt: fix cpu object reference leak
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* First slice of MVE patches
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* Add missing fp_access_check() to aarch64 crypto instructions
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* Implement MTE3
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* cputlb: Don't assume do_unassigned_access() never returns
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* docs/system: arm: Add nRF boards description
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* virt: Add a user option to disallow ITS instantiation
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* i.MX timers: fix reset handling
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* ARMv7M NVIC: rewrite to fix broken priority handling and masking
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* exynos: Fix proper mapping of CPUs by providing real cluster ID
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* exynos: Fix Linux kernel division by zero for PLLs
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----------------------------------------------------------------
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----------------------------------------------------------------
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Clement Deschamps (1):
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Alexandre Iooss (1):
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bcm2835_sdhost: add bcm2835 sdhost controller
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docs/system: arm: Add nRF boards description
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Eric Auger (1):
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Peter Collingbourne (1):
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hw/arm/virt: Add a user option to disallow ITS instantiation
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target/arm: Implement MTE3
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Igor Mammedov (1):
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Peter Maydell (55):
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hw/arm/virt: fix cpu object reference leak
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hw/acpi: Provide stub version of acpi_ghes_record_errors()
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hw/acpi: Provide function acpi_ghes_present()
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target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
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docs/system/arm: Document which architecture extensions we emulate
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target/arm/translate-vfp.c: Whitespace fixes
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target/arm: Handle FPU being disabled in FPCXT_NS accesses
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target/arm: Don't NOCP fault for FPCXT_NS accesses
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target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
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target/arm: Factor FP context update code out into helper function
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target/arm: Split vfp_access_check() into A and M versions
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target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
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target/arm: Implement MVE VLDR/VSTR (non-widening forms)
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target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
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target/arm: Implement MVE VCLZ
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target/arm: Implement MVE VCLS
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target/arm: Implement MVE VREV16, VREV32, VREV64
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target/arm: Implement MVE VMVN (register)
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target/arm: Implement MVE VABS
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target/arm: Implement MVE VNEG
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tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
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target/arm: Implement MVE VDUP
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target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
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target/arm: Implement MVE VADD, VSUB, VMUL
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target/arm: Implement MVE VMULH
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target/arm: Implement MVE VRMULH
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target/arm: Implement MVE VMAX, VMIN
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target/arm: Implement MVE VABD
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target/arm: Implement MVE VHADD, VHSUB
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target/arm: Implement MVE VMULL
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target/arm: Implement MVE VMLALDAV
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target/arm: Implement MVE VMLSLDAV
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target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
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target/arm: Implement MVE VADD (scalar)
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target/arm: Implement MVE VSUB, VMUL (scalar)
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target/arm: Implement MVE VHADD, VHSUB (scalar)
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target/arm: Implement MVE VBRSR
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target/arm: Implement MVE VPST
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target/arm: Implement MVE VQADD and VQSUB
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target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
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target/arm: Implement MVE VQDMULL scalar
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target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
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target/arm: Implement MVE VQADD, VQSUB (vector)
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target/arm: Implement MVE VQSHL (vector)
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target/arm: Implement MVE VQRSHL
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target/arm: Implement MVE VSHL insn
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target/arm: Implement MVE VRSHL
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target/arm: Implement MVE VQDMLADH and VQRDMLADH
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target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
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target/arm: Implement MVE VQDMULL (vector)
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target/arm: Implement MVE VRHADD
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target/arm: Implement MVE VADC, VSBC
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target/arm: Implement MVE VCADD
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target/arm: Implement MVE VHCADD
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target/arm: Implement MVE VADDV
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target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
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Krzysztof Kozlowski (2):
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docs/system/arm/emulation.rst | 103 ++++
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hw/arm/exynos: Fix Linux kernel division by zero for PLLs
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docs/system/arm/nrf.rst | 51 ++
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hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
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docs/system/target-arm.rst | 7 +
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include/hw/acpi/ghes.h | 9 +
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include/tcg/tcg-op.h | 8 +
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include/tcg/tcg.h | 1 -
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target/arm/helper-mve.h | 357 +++++++++++++
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target/arm/helper.h | 2 +
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target/arm/internals.h | 11 +
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target/arm/translate-a32.h | 3 +
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target/arm/translate.h | 10 +
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target/arm/m-nocp.decode | 24 +
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target/arm/mve.decode | 240 +++++++++
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target/arm/vfp.decode | 14 -
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hw/acpi/ghes-stub.c | 22 +
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hw/acpi/ghes.c | 17 +
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target/arm/cpu64.c | 2 +-
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target/arm/kvm64.c | 6 +-
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target/arm/mte_helper.c | 82 +--
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target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
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target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
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target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
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target/arm/translate-vfp.c | 741 +++++++-------------------
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tcg/tcg-op-gvec.c | 20 +-
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MAINTAINERS | 1 +
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hw/acpi/meson.build | 6 +-
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target/arm/meson.build | 1 +
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27 files changed, 3578 insertions(+), 629 deletions(-)
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create mode 100644 docs/system/arm/emulation.rst
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create mode 100644 docs/system/arm/nrf.rst
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create mode 100644 target/arm/helper-mve.h
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create mode 100644 hw/acpi/ghes-stub.c
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create mode 100644 target/arm/mve_helper.c
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135
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Kurban Mallachiev (1):
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ARM i.MX timers: fix reset handling
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Marcin Chojnacki (1):
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target-arm: Implement BCM2835 hardware RNG
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Michael Davidsaver (5):
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armv7m: Rewrite NVIC to not use any GIC code
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arm: gic: Remove references to NVIC
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armv7m: Escalate exceptions to HardFault if necessary
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armv7m: Simpler and faster exception start
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armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
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Nick Reilly (1):
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Add missing fp_access_check() to aarch64 crypto instructions
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Peter Maydell (10):
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bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
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cputlb: Don't assume do_unassigned_access() never returns
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armv7m: Rename nvic_state to NVICState
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armv7m: Implement reading and writing of PRIGROUP
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armv7m: Fix condition check for taking exceptions
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armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
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armv7m: Extract "exception taken" code into functions
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armv7m: Check exception return consistency
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armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
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armv7m: Allow SHCSR writes to change pending and active bits
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Prasad J Pandit (4):
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sd: sdhci: mask transfer mode register value
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sd: sdhci: check transfer mode register in multi block transfer
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sd: sdhci: conditionally invoke multi block transfer
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sd: sdhci: Remove block count enable check in single block transfers
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hw/misc/Makefile.objs | 3 +-
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hw/sd/Makefile.objs | 1 +
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hw/intc/gic_internal.h | 7 +-
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include/hw/arm/bcm2835_peripherals.h | 2 +
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include/hw/arm/virt.h | 1 +
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include/hw/misc/bcm2835_rng.h | 27 ++
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include/hw/sd/bcm2835_sdhost.h | 48 ++
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target/arm/cpu.h | 23 +-
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cputlb.c | 15 +-
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hw/arm/bcm2835_peripherals.c | 15 +
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hw/arm/exynos4210.c | 18 +
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hw/arm/virt.c | 32 +-
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hw/intc/arm_gic.c | 31 +-
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hw/intc/arm_gic_common.c | 23 +-
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hw/intc/armv7m_nvic.c | 885 ++++++++++++++++++++++++++++-------
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hw/misc/bcm2835_rng.c | 149 ++++++
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hw/misc/exynos4210_clk.c | 164 +++++++
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hw/sd/bcm2835_sdhost.c | 429 +++++++++++++++++
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hw/sd/sdhci.c | 25 +-
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hw/timer/imx_gpt.c | 33 +-
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linux-user/main.c | 1 +
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target/arm/cpu.c | 16 +-
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target/arm/helper.c | 245 +++++++---
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target/arm/translate-a64.c | 12 +
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target/arm/translate.c | 8 +-
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hw/intc/trace-events | 15 +
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26 files changed, 1897 insertions(+), 331 deletions(-)
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create mode 100644 include/hw/misc/bcm2835_rng.h
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create mode 100644 include/hw/sd/bcm2835_sdhost.h
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create mode 100644 hw/misc/bcm2835_rng.c
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create mode 100644 hw/misc/exynos4210_clk.c
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create mode 100644 hw/sd/bcm2835_sdhost.c
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diff view generated by jsdifflib

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