[Qemu-devel] [PULL v2 00/13] target-arm queue
[PULL v2 00/11] target-arm queue
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A random mix of items here, nothing very major. v2 is just
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Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx
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squashing in the fix for the clang unused-function error.
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ethernet device failed 'make check' on big-endian hosts.
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thanks
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-- PMM
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-- PMM
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The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf:
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The following changes since commit d0dff238a87fa81393ed72754d4dc8b09e50b08b:
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Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000)
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Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170206' into staging (2017-02-07 15:29:26 +0000)
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are available in the Git repository at:
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are available in the git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1
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git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170207-1
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for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621:
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for you to fetch changes up to aecfbbc97a2e52bbee34a53c32f961a182046a95:
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target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000)
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stellaris: Use the 'unimplemented' device for parts we don't implement (2017-02-07 18:55:15 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm:
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target-arm queue:
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* new "unimplemented" device for stubbing out devices in a
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* Correctly initialize MDCR_EL2.HPMN
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system model so accesses can be logged
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* versal: Use nr_apu_cpus in favor of hard coding 2
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* stellaris: document the SoC memory map
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* accel/tcg: Add URL of clang bug to comment about our workaround
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* arm: create instruction syndromes for AArch32 data aborts
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* Add support for FEAT_DIT, Data Independent Timing
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* arm: Correctly handle watchpoints for BE32 CPUs
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* Remove GPIO from unimplemented NPCM7XX
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* Fix Thumb-1 BE32 execution and disassembly
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* Fix SCR RES1 handling
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* arm: Add cfgend parameter for ARM CPU selection
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* Don't migrate CPUARMState.features
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* sd: sdhci: check data length during dma_memory_read
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* aspeed: add a watchdog controller
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* integratorcp: adding vmstate for save/restore
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----------------------------------------------------------------
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----------------------------------------------------------------
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Cédric Le Goater (2):
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Aaron Lindsay (1):
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wdt: Add Aspeed watchdog device model
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target/arm: Don't migrate CPUARMState.features
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aspeed: add a watchdog controller
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Julian Brown (4):
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Daniel Müller (1):
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hw/arm/integratorcp: Support specifying features via -cpu
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target/arm: Correctly initialize MDCR_EL2.HPMN
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target/arm: Add cfgend parameter for ARM CPU selection.
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Fix Thumb-1 BE32 execution and disassembly.
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arm: Correctly handle watchpoints for BE32 CPUs
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Pavel Dovgalyuk (1):
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Edgar E. Iglesias (1):
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integratorcp: adding vmstate for save/restore
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hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2
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Peter Maydell (5):
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Hao Wu (1):
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target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode
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hw/arm: Remove GPIO from unimplemented NPCM7XX
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target/arm: A32, T32: Create Instruction Syndromes for Data Aborts
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stellaris: Document memory map and which SoC devices are unimplemented
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hw/misc: New "unimplemented" sysbus device
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stellaris: Use the 'unimplemented' device for parts we don't implement
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Prasad J Pandit (1):
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Mike Nawrocki (1):
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sd: sdhci: check data length during dma_memory_read
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target/arm: Fix SCR RES1 handling
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hw/misc/Makefile.objs | 2 +
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Peter Maydell (2):
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hw/watchdog/Makefile.objs | 1 +
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arm: Update infocenter.arm.com URLs
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include/disas/bfd.h | 7 ++
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accel/tcg: Add URL of clang bug to comment about our workaround
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include/hw/arm/aspeed_soc.h | 2 +
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include/hw/misc/unimp.h | 39 +++++++
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include/hw/watchdog/wdt_aspeed.h | 32 ++++++
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include/qom/cpu.h | 3 +
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target/arm/arm_ldst.h | 10 +-
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target/arm/cpu.h | 7 ++
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target/arm/internals.h | 5 +
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target/arm/translate.h | 14 +++
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disas.c | 1 +
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exec.c | 1 +
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hw/arm/aspeed_soc.c | 13 +++
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hw/arm/integratorcp.c | 78 +++++++++++++-
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hw/arm/stellaris.c | 48 +++++++++
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hw/misc/unimp.c | 107 +++++++++++++++++++
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hw/sd/sdhci.c | 2 +-
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hw/watchdog/wdt_aspeed.c | 225 +++++++++++++++++++++++++++++++++++++++
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qom/cpu.c | 6 ++
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target/arm/cpu.c | 39 +++++++
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target/arm/op_helper.c | 22 ++++
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target/arm/translate-a64.c | 14 ---
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target/arm/translate.c | 193 ++++++++++++++++++++++++---------
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24 files changed, 801 insertions(+), 70 deletions(-)
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create mode 100644 include/hw/misc/unimp.h
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create mode 100644 include/hw/watchdog/wdt_aspeed.h
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create mode 100644 hw/misc/unimp.c
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create mode 100644 hw/watchdog/wdt_aspeed.c
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Rebecca Cran (4):
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target/arm: Add support for FEAT_DIT, Data Independent Timing
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target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate
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target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU
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target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU
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include/hw/dma/pl080.h | 7 ++--
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include/hw/misc/arm_integrator_debug.h | 2 +-
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include/hw/ssi/pl022.h | 5 ++-
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target/arm/cpu.h | 17 ++++++++
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target/arm/internals.h | 6 +++
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accel/tcg/cpu-exec.c | 25 +++++++++---
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hw/arm/aspeed_ast2600.c | 2 +-
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hw/arm/musca.c | 4 +-
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hw/arm/npcm7xx.c | 8 ----
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hw/arm/xlnx-versal.c | 4 +-
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hw/misc/arm_integrator_debug.c | 2 +-
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hw/timer/arm_timer.c | 7 ++--
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target/arm/cpu.c | 4 ++
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target/arm/cpu64.c | 5 +++
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target/arm/helper-a64.c | 27 +++++++++++--
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target/arm/helper.c | 71 +++++++++++++++++++++++++++-------
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target/arm/machine.c | 2 +-
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target/arm/op_helper.c | 9 +----
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target/arm/translate-a64.c | 12 ++++++
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19 files changed, 164 insertions(+), 55 deletions(-)
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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