> -----Original Message----- > From: Nicolin Chen <nicolinc@nvidia.com> > Sent: Tuesday, November 12, 2024 11:00 PM > To: Shameerali Kolothum Thodi > <shameerali.kolothum.thodi@huawei.com>; nathanc@nvidia.com > Cc: qemu-arm@nongnu.org; qemu-devel@nongnu.org; > eric.auger@redhat.com; peter.maydell@linaro.org; jgg@nvidia.com; > ddutile@redhat.com; Linuxarm <linuxarm@huawei.com>; Wangzhou (B) > <wangzhou1@hisilicon.com>; jiangkunkun <jiangkunkun@huawei.com>; > Jonathan Cameron <jonathan.cameron@huawei.com>; > zhangfei.gao@linaro.org > Subject: Re: [RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable > nested SMMUv3 > > On Fri, Nov 08, 2024 at 12:52:37PM +0000, Shameer Kolothum wrote: > > Few ToDos to note, > > 1. At present default-bus-bypass-iommu=on should be set when > > arm-smmuv3-nested dev is specified. Otherwise you may get an IORT > > related boot error. Requires fixing. > > 2. Hot adding a device is not working at the moment. Looks like pcihp irq > issue. > > Could be a bug in IORT id mappings. > > Do we have enough bus number space for each pbx bus in IORT? > > The bus range is defined by min_/max_bus in hort_host_bridges(), > where the pci_bus_range() function call might not leave enough > space in the range for hotplugs IIRC. Ok. Thanks for the pointer. I will debug that. > > ./qemu-system-aarch64 -machine virt,gic-version=3,default-bus-bypass- > iommu=on \ > > -enable-kvm -cpu host -m 4G -smp cpus=8,maxcpus=8 \ > > -object iommufd,id=iommufd0 \ > > -bios QEMU_EFI.fd \ > > -kernel Image \ > > -device virtio-blk-device,drive=fs \ > > -drive if=none,file=rootfs.qcow2,id=fs \ > > -device pxb-pcie,id=pcie.1,bus_nr=8,bus=pcie.0 \ > > -device pcie-root-port,id=pcie.port1,bus=pcie.1,chassis=1 \ > > -device arm-smmuv3-nested,id=smmuv1,pci-bus=pcie.1 \ > > -device vfio-pci,host=0000:7d:02.1,bus=pcie.port1,iommufd=iommufd0 \ > > -device pxb-pcie,id=pcie.2,bus_nr=16,bus=pcie.0 \ > > -device pcie-root-port,id=pcie.port2,bus=pcie.2,chassis=2 \ > > -device arm-smmuv3-nested,id=smmuv2,pci-bus=pcie.2 \ > > -device vfio-pci,host=0000:75:00.1,bus=pcie.port2,iommufd=iommufd0 \ > > -append "rdinit=init console=ttyAMA0 root=/dev/vda2 rw > earlycon=pl011,0x9000000" \ > > -device virtio-9p-pci,fsdev=p9fs2,mount_tag=p9,bus=pcie.0 \ > > -fsdev local,id=p9fs2,path=p9root,security_model=mapped \ > > -net none \ > > -nographic > .. > > With a pci topology like below, > > [root@localhost ~]# lspci -tv > > -+-[0000:00]-+-00.0 Red Hat, Inc. QEMU PCIe Host bridge > > | +-01.0 Red Hat, Inc. QEMU PCIe Expander bridge > > | +-02.0 Red Hat, Inc. QEMU PCIe Expander bridge > > | \-03.0 Virtio: Virtio filesystem > > +-[0000:08]---00.0-[09]----00.0 Huawei Technologies Co., Ltd. HNS > Network Controller (Virtual Function) > > \-[0000:10]---00.0-[11]----00.0 Huawei Technologies Co., Ltd. HiSilicon ZIP > Engine(Virtual Function) > > [root@localhost ~]# > > > > And if you want to add another HNS VF, it should be added to the same > SMMUv3 > > as of the first HNS dev, > > > > -device pcie-root-port,id=pcie.port3,bus=pcie.1,chassis=3 \ > > -device vfio-pci,host=0000:7d:02.2,bus=pcie.port3,iommufd=iommufd0 \ > .. > > At present Qemu is not doing any extra validation other than the above > > failure to make sure the user configuration is correct or not. The > > assumption is libvirt will take care of this. > > Nathan from NVIDIA side is working on the libvirt. And he already > did some prototype coding in libvirt that could generate required > PCI topology. I think he can take this patches for a combined test. Cool. That's good to know. Thanks, SHameer
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