>-----Original Message-----
>From: Peter Krempa <pkrempa@redhat.com>
>Subject: Re: [PATCH v2 00/12] conf, qemu: Add scalable_mode, fsts, pasid_bits, and
>svm support for intel-iommu
>
>On Wed, Sep 09, 2026 at 16:29:47 +0800, Zhenzhong Duan wrote:
>> Hi,
>>
>> This series adds support for configuring Intel vIOMMU (VT-d) in domain XML
>> and formatting them onto the QEMU command line:
>
>I've got couple of high-level questions:
>
>>
>>   * scalable_mode: Configures scalable mode support ('on'/'off').
>>   * fsts: Enables First-Stage Translation support ('on'/'off').
>>   * pasid_bits: Sets the number of supported PASID bits.
>>   * svm: Enables Shared Virtual Memory (SVM) / PRQ support ('on'/'off').
>
>Are users actually expected to set these? The libvirt documentation that
>is added by this series doesn't really describe what the feature does,
>just names them.
>
>So ...
>
>> With these attributes, users can configure advanced vIOMMU features for both
>> emulated devices and assigned host devices (e.g., vSVA / nested translation via
>> iommufd and first-stage translation).
>
>... can users meaningfully influence what they get? Arent't the defaults
>enough?

The default of value of pasid_bits is 0, default of other three properties are 'off' in qemu.
So these properties need to be set explicitly to use the advanced vIOMMU
features. To summarize:

- `scalable_mode='on'`:
  Required whenever a guest wants to use Intel Scalable Mode (VT-d 3.0+). Legacy
  mode only supports single address spaces per PCI device; scalable mode allows
  multiple process address spaces (via PASIDs) and 1st-stage/2nd-stage translation.

- `fsts='on'`:
  Enables first-stage (GVA -> GPA) translation in vIOMMU. This is mandatory for
  nested translation (FLPT - First Level Page Table) when assigning devices via
  IOMMUFD and allowing the guest kernel to manage its own stage-1 page tables.

- `pasid_bits`:
  Configures the PASID width supported by the virtual IOMMU (1 to 20 bits). Users
  need to tune this depending on the guest OS scalability requirements or match
  the physical host device capabilities during device assignment (e.g., if a host
  accelerator or physical IOMMU only supports a specific PASID width).

- `svm='on'`:
  Enables Shared Virtual Memory (SVM), which advertises Page Request Interface (PRI)
  and Page Request Queue (PRQ) capabilities. This allows user-space applications inside
  the guest to directly submit work to physical/emulated devices using virtual
  addresses without explicit pinning (shared virtual addressing / SVA).

Thanks
Zhenzhong