src/cpu_map/arm_Neoverse-N1.xml | 6 ++++++ src/cpu_map/arm_Neoverse-N2.xml | 6 ++++++ src/cpu_map/arm_Neoverse-V1.xml | 6 ++++++ src/cpu_map/index.xml | 3 +++ src/cpu_map/meson.build | 3 +++ 5 files changed, 24 insertions(+) create mode 100644 src/cpu_map/arm_Neoverse-N1.xml create mode 100644 src/cpu_map/arm_Neoverse-N2.xml create mode 100644 src/cpu_map/arm_Neoverse-V1.xml
Add Neoverse N1/N2/V1 as a supported cpu model.
Signed-off-by: Zhenyu Zhang <zhenyzha@redhat.com>
v2: https://listman.redhat.com/archives/libvir-list/2022-September/234512.html
v1: https://listman.redhat.com/archives/libvir-list/2022-September/234294.html
Changelog
=========
v3:
* Remove the Ampere vendor from arm_vendors (Martin)
* Change Neoverse N1/N2/V1 vendor from Ampere to ARM (Martin)
v2:
* Introduce Neoverse N1/N2/V1 (Martin)
* Corrected ampere vendor value (Martin)
---
src/cpu_map/arm_Neoverse-N1.xml | 6 ++++++
src/cpu_map/arm_Neoverse-N2.xml | 6 ++++++
src/cpu_map/arm_Neoverse-V1.xml | 6 ++++++
src/cpu_map/index.xml | 3 +++
src/cpu_map/meson.build | 3 +++
5 files changed, 24 insertions(+)
create mode 100644 src/cpu_map/arm_Neoverse-N1.xml
create mode 100644 src/cpu_map/arm_Neoverse-N2.xml
create mode 100644 src/cpu_map/arm_Neoverse-V1.xml
diff --git a/src/cpu_map/arm_Neoverse-N1.xml b/src/cpu_map/arm_Neoverse-N1.xml
new file mode 100644
index 0000000000..b83b8af8cc
--- /dev/null
+++ b/src/cpu_map/arm_Neoverse-N1.xml
@@ -0,0 +1,6 @@
+<cpus>
+ <model name='Neoverse-N1'>
+ <vendor name='ARM'/>
+ <pvr value='0xd0c'/>
+ </model>
+</cpus>
diff --git a/src/cpu_map/arm_Neoverse-N2.xml b/src/cpu_map/arm_Neoverse-N2.xml
new file mode 100644
index 0000000000..cba2c6ca16
--- /dev/null
+++ b/src/cpu_map/arm_Neoverse-N2.xml
@@ -0,0 +1,6 @@
+<cpus>
+ <model name='Neoverse-N2'>
+ <vendor name='ARM'/>
+ <pvr value='0xd49'/>
+ </model>
+</cpus>
diff --git a/src/cpu_map/arm_Neoverse-V1.xml b/src/cpu_map/arm_Neoverse-V1.xml
new file mode 100644
index 0000000000..a449322952
--- /dev/null
+++ b/src/cpu_map/arm_Neoverse-V1.xml
@@ -0,0 +1,6 @@
+<cpus>
+ <model name='Neoverse-V1'>
+ <vendor name='ARM'/>
+ <pvr value='0xd40'/>
+ </model>
+</cpus>
diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index d533a28865..deae92552f 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -97,6 +97,9 @@
<include filename='arm_cortex-a53.xml'/>
<include filename='arm_cortex-a57.xml'/>
<include filename='arm_cortex-a72.xml'/>
+ <include filename='arm_Neoverse-N1.xml'/>
+ <include filename='arm_Neoverse-N2.xml'/>
+ <include filename='arm_Neoverse-V1.xml'/>
<!-- Qualcomm-based CPU models -->
<include filename='arm_Falkor.xml'/>
diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build
index 99264289e2..55c3703006 100644
--- a/src/cpu_map/meson.build
+++ b/src/cpu_map/meson.build
@@ -7,6 +7,9 @@ cpumap_data = [
'arm_FT-2000plus.xml',
'arm_features.xml',
'arm_Kunpeng-920.xml',
+ 'arm_Neoverse-N1.xml',
+ 'arm_Neoverse-N2.xml',
+ 'arm_Neoverse-V1.xml',
'arm_Tengyun-S2500.xml',
'arm_ThunderX299xx.xml',
'arm_vendors.xml',
--
2.31.1
On Wed, Sep 28, 2022 at 10:27:38PM -0400, Zhenyu Zhang wrote: >Add Neoverse N1/N2/V1 as a supported cpu model. > >Signed-off-by: Zhenyu Zhang <zhenyzha@redhat.com> > All of the below can be put under the --- line, that way it does not end up in the commit message. I fixed that before pushing. Thanks for the patch and patience. Reviewed-by: Martin Kletzander <mkletzan@redhat.com> >v2: https://listman.redhat.com/archives/libvir-list/2022-September/234512.html >v1: https://listman.redhat.com/archives/libvir-list/2022-September/234294.html > >Changelog >========= >v3: > * Remove the Ampere vendor from arm_vendors (Martin) > * Change Neoverse N1/N2/V1 vendor from Ampere to ARM (Martin) >v2: > * Introduce Neoverse N1/N2/V1 (Martin) > * Corrected ampere vendor value (Martin) >--- > src/cpu_map/arm_Neoverse-N1.xml | 6 ++++++ > src/cpu_map/arm_Neoverse-N2.xml | 6 ++++++ > src/cpu_map/arm_Neoverse-V1.xml | 6 ++++++ > src/cpu_map/index.xml | 3 +++ > src/cpu_map/meson.build | 3 +++ > 5 files changed, 24 insertions(+) > create mode 100644 src/cpu_map/arm_Neoverse-N1.xml > create mode 100644 src/cpu_map/arm_Neoverse-N2.xml > create mode 100644 src/cpu_map/arm_Neoverse-V1.xml > >diff --git a/src/cpu_map/arm_Neoverse-N1.xml b/src/cpu_map/arm_Neoverse-N1.xml >new file mode 100644 >index 0000000000..b83b8af8cc >--- /dev/null >+++ b/src/cpu_map/arm_Neoverse-N1.xml >@@ -0,0 +1,6 @@ >+<cpus> >+ <model name='Neoverse-N1'> >+ <vendor name='ARM'/> >+ <pvr value='0xd0c'/> >+ </model> >+</cpus> >diff --git a/src/cpu_map/arm_Neoverse-N2.xml b/src/cpu_map/arm_Neoverse-N2.xml >new file mode 100644 >index 0000000000..cba2c6ca16 >--- /dev/null >+++ b/src/cpu_map/arm_Neoverse-N2.xml >@@ -0,0 +1,6 @@ >+<cpus> >+ <model name='Neoverse-N2'> >+ <vendor name='ARM'/> >+ <pvr value='0xd49'/> >+ </model> >+</cpus> >diff --git a/src/cpu_map/arm_Neoverse-V1.xml b/src/cpu_map/arm_Neoverse-V1.xml >new file mode 100644 >index 0000000000..a449322952 >--- /dev/null >+++ b/src/cpu_map/arm_Neoverse-V1.xml >@@ -0,0 +1,6 @@ >+<cpus> >+ <model name='Neoverse-V1'> >+ <vendor name='ARM'/> >+ <pvr value='0xd40'/> >+ </model> >+</cpus> >diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml >index d533a28865..deae92552f 100644 >--- a/src/cpu_map/index.xml >+++ b/src/cpu_map/index.xml >@@ -97,6 +97,9 @@ > <include filename='arm_cortex-a53.xml'/> > <include filename='arm_cortex-a57.xml'/> > <include filename='arm_cortex-a72.xml'/> >+ <include filename='arm_Neoverse-N1.xml'/> >+ <include filename='arm_Neoverse-N2.xml'/> >+ <include filename='arm_Neoverse-V1.xml'/> > > <!-- Qualcomm-based CPU models --> > <include filename='arm_Falkor.xml'/> >diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build >index 99264289e2..55c3703006 100644 >--- a/src/cpu_map/meson.build >+++ b/src/cpu_map/meson.build >@@ -7,6 +7,9 @@ cpumap_data = [ > 'arm_FT-2000plus.xml', > 'arm_features.xml', > 'arm_Kunpeng-920.xml', >+ 'arm_Neoverse-N1.xml', >+ 'arm_Neoverse-N2.xml', >+ 'arm_Neoverse-V1.xml', > 'arm_Tengyun-S2500.xml', > 'arm_ThunderX299xx.xml', > 'arm_vendors.xml', >-- >2.31.1 >
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