Adding SetExceptionBaseAddress and SetTlbRebaseAddress functions
for LoongArch64.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
---
MdePkg/Include/Library/BaseLib.h | 20 +++++++++
MdePkg/Library/BaseLib/BaseLib.inf | 1 +
.../BaseLib/LoongArch64/ExceptionBase.S | 41 +++++++++++++++++++
3 files changed, 62 insertions(+)
create mode 100644 MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index ca0d06c7f3..7117c4288f 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -287,6 +287,26 @@ typedef struct {
#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+/*
+ * Set the exception base address for LoongArch.
+ *
+ * @param ExceptionBaseAddress The exception base address, must be aligned greater than or qeual to 4K .
+ */
+VOID
+SetExceptionBaseAddress (
+ IN UINT64
+ );
+
+/*
+ * Set the TlbRebase address for LoongArch.
+ *
+ * @param TlbRebaseAddress The TlbRebase address, must be aligned greater than or qeual to 4K .
+ */
+VOID
+SetTlbRebaseAddress (
+ IN UINT64
+ );
+
#endif // defined (MDE_CPU_LOONGARCH64)
//
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 6b46949be3..22b38b59e7 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -420,6 +420,7 @@
LoongArch64/CpuPause.S | GCC
LoongArch64/SetJumpLongJump.S | GCC
LoongArch64/SwitchStack.S | GCC
+ LoongArch64/ExceptionBase.S | GCC
[Packages]
MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S b/MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S
new file mode 100644
index 0000000000..b6e90a8f28
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/ExceptionBase.S
@@ -0,0 +1,41 @@
+#------------------------------------------------------------------------------
+#
+# LoongArch set exception base address operations
+#
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <Base.h>
+#include <Register/LoongArch64/Csr.h>
+
+ASM_GLOBAL ASM_PFX(SetExceptionBaseAddress)
+ASM_GLOBAL ASM_PFX(SetTlbRebaseAddress)
+
+#/**
+# Set the exception base address for LoongArch.
+#
+# @param ExceptionBaseAddress The exception base address, must be aligned greater than or qeual to 4K .
+#**/
+ASM_PFX(SetExceptionBaseAddress):
+ csrrd $t0, LOONGARCH_CSR_ECFG
+ li.d $t1, ~(BIT16 | BIT17 | BIT18)
+ and $t0, $t0, $t1
+ csrwr $t0, LOONGARCH_CSR_ECFG
+
+ move $t0, $a0
+ csrwr $t0, LOONGARCH_CSR_EBASE
+ jirl $zero, $ra, 0
+
+#/**
+# Set the TlbRebase address for LoongArch.
+#
+# @param TlbRebaseAddress The TlbRebase address, must be aligned greater than or qeual to 4K .
+#**/
+ASM_PFX(SetTlbRebaseAddress):
+ move $t0, $a0
+ csrwr $t0, LOONGARCH_CSR_TLBREBASE
+ jirl $zero, $ra, 0
+.end
--
2.27.0
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