N1SDP uses an emulated variable storage on DDR memory for the variable
storage. But this emulated variable storage is a volatile memory and so
the values of variable cant persist on next reboot or in power cycle. In
N1SDP platform, the SoC is connected to IOFPGA which has a Cadence Quad
SPI (QSPI) controller. This QSPI controller manages the flash chip
device (NOR Flash with 32 MB memory capacity, 4KB block size) via QSPI
bus. With these changes we use this NOR flash device for persistent
variable storage.


Link to branch with the patches in this series -
https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage

sahil (5):
  Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region
  Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp
  Platform/ARM/N1Sdp: NOR flash Dxe Driver for N1Sdp
  Platform/ARM/N1Sdp: Persistent storage for N1Sdp
  Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

 Platform/ARM/N1Sdp/N1SdpPlatform.dec                           |    5 +-
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc                           |   25 +-
 Platform/ARM/N1Sdp/N1SdpPlatform.fdf                           |    5 +-
 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf   |   72 ++
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf  |   36 +
 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiReg.h     |   33 +
 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h           |  491 +++++++++
 Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h              |    6 +-
 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.c     |  409 ++++++++
 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c           | 1100 ++++++++++++++++++++
 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlashFvb.c        |  647 ++++++++++++
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c    |   52 +
 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c |   10 +-
 13 files changed, 2880 insertions(+), 11 deletions(-)
 create mode 100644 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.inf
 create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
 create mode 100644 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiReg.h
 create mode 100644 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.h
 create mode 100644 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/CadenceQspiDxe.c
 create mode 100644 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlash.c
 create mode 100644 Platform/ARM/N1Sdp/Drivers/CadenceQspiDxe/NorFlashFvb.c
 create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c

-- 
2.25.1



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