Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Cc: Tan Dun <dun.tan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
MdePkg/Include/Cet.inc | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
create mode 100644 MdePkg/Include/Cet.inc
diff --git a/MdePkg/Include/Cet.inc b/MdePkg/Include/Cet.inc
new file mode 100644
index 0000000000..a4038a0682
--- /dev/null
+++ b/MdePkg/Include/Cet.inc
@@ -0,0 +1,26 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; This file provides macro definitions for CET feature for NASM files.
+;
+;------------------------------------------------------------------------------
+
+%define MSR_IA32_U_CET 0x6A0
+%define MSR_IA32_S_CET 0x6A2
+%define MSR_IA32_CET_SH_STK_EN 0x1
+%define MSR_IA32_CET_WR_SHSTK_EN 0x2
+%define MSR_IA32_CET_ENDBR_EN 0x4
+%define MSR_IA32_CET_LEG_IW_EN 0x8
+%define MSR_IA32_CET_NO_TRACK_EN 0x10
+%define MSR_IA32_CET_SUPPRESS_DIS 0x20
+%define MSR_IA32_CET_SUPPRESS 0x400
+%define MSR_IA32_CET_TRACKER 0x800
+%define MSR_IA32_PL0_SSP 0x6A4
+%define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
+
+%define CR4_CET_BIT 23
+%define CR4_CET 0x800000
--
2.26.2.windows.1
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-=-=-=-=-=-=-=-=-=-=-=-> --- > MdePkg/Include/Cet.inc | 26 ++++++++++++++++++++++++++ 1. I am not sure adding "Cet.inc" in MdePkg/Include is ok as Cet.inc only contains definitions for x86 CPU. Is it better to add the macros to existing Ia32/Nasm.inc, X64/Nasm.inc? But that would cause duplicated macro definitions in the two INC files. So I am not sure which way is better. @Kinney, Michael D, comments? > > +%define MSR_IA32_U_CET 0x6A0 > > +%define MSR_IA32_S_CET 0x6A2 > > +%define MSR_IA32_CET_SH_STK_EN 0x1 2. can you use "<<" such as: %define MSR_IA32_CET_SH_STK_EN (1<<0) > > +%define MSR_IA32_CET_WR_SHSTK_EN 0x2 > > +%define MSR_IA32_CET_ENDBR_EN 0x4 > > +%define MSR_IA32_CET_LEG_IW_EN 0x8 > > +%define MSR_IA32_CET_NO_TRACK_EN 0x10 > > +%define MSR_IA32_CET_SUPPRESS_DIS 0x20 > > +%define MSR_IA32_CET_SUPPRESS 0x400 > > +%define MSR_IA32_CET_TRACKER 0x800 > > +%define MSR_IA32_PL0_SSP 0x6A4 > > +%define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8 > > + > > +%define CR4_CET_BIT 23 > > +%define CR4_CET 0x800000 3. %define CR4_CET (1<<CR4_CET_BIT) > > -- > 2.26.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111512): https://edk2.groups.io/g/devel/message/111512 Mute This Topic: https://groups.io/mt/102599349/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076/xyzzy [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
On 11/15/23 05:12, Sheng Wei wrote: > Signed-off-by: Sheng Wei <w.sheng@intel.com> > Cc: Eric Dong <eric.dong@intel.com> > Cc: Ray Ni <ray.ni@intel.com> > Cc: Laszlo Ersek <lersek@redhat.com> > Cc: Wu Jiaxin <jiaxin.wu@intel.com> > Cc: Tan Dun <dun.tan@intel.com> > Reviewed-by: Laszlo Ersek <lersek@redhat.com> > --- > MdePkg/Include/Cet.inc | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > create mode 100644 MdePkg/Include/Cet.inc > > diff --git a/MdePkg/Include/Cet.inc b/MdePkg/Include/Cet.inc > new file mode 100644 > index 0000000000..a4038a0682 > --- /dev/null > +++ b/MdePkg/Include/Cet.inc > @@ -0,0 +1,26 @@ > +;------------------------------------------------------------------------------ > +; > +; Copyright (c) 2023, Intel Corporation. All rights reserved.<BR> > +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Abstract: > +; > +; This file provides macro definitions for CET feature for NASM files. > +; > +;------------------------------------------------------------------------------ > + > +%define MSR_IA32_U_CET 0x6A0 > +%define MSR_IA32_S_CET 0x6A2 > +%define MSR_IA32_CET_SH_STK_EN 0x1 > +%define MSR_IA32_CET_WR_SHSTK_EN 0x2 > +%define MSR_IA32_CET_ENDBR_EN 0x4 > +%define MSR_IA32_CET_LEG_IW_EN 0x8 > +%define MSR_IA32_CET_NO_TRACK_EN 0x10 > +%define MSR_IA32_CET_SUPPRESS_DIS 0x20 > +%define MSR_IA32_CET_SUPPRESS 0x400 > +%define MSR_IA32_CET_TRACKER 0x800 > +%define MSR_IA32_PL0_SSP 0x6A4 > +%define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8 > + > +%define CR4_CET_BIT 23 > +%define CR4_CET 0x800000 Works for me; it also solves the question of "where exactly put this under UefiCpuPkg" -- well, put it under MdePkg. :) Laszlo -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111252): https://edk2.groups.io/g/devel/message/111252 Mute This Topic: https://groups.io/mt/102599349/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076/xyzzy [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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