If firmware is used with QEMU 8.0 or older then there will be no GIC ITS
support.
In such case we would not add information about it into MADT and IORT
tables.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
.../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 -
.../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 1 +
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 226 +++++++++++++++++-
Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc | 135 -----------
4 files changed, 216 insertions(+), 147 deletions(-)
delete mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
index 554c5e4b6f9e..97021f7971c7 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
@@ -22,7 +22,6 @@ [Sources]
Gtdt.aslc
Mcfg.aslc
Spcr.aslc
- Iort.aslc
[Packages]
ArmPlatformPkg/ArmPlatformPkg.dec
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 3ec7ffd8dd5c..14d760b36400 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -49,6 +49,7 @@ [Pcd]
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase
[Depex]
gEfiAcpiTableProtocolGuid ## CONSUMES
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 961482269678..17d47f56d611 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -8,6 +8,7 @@
**/
#include <IndustryStandard/Acpi.h>
#include <IndustryStandard/AcpiAml.h>
+#include <IndustryStandard/IoRemappingTable.h>
#include <IndustryStandard/SbsaQemuAcpi.h>
#include <Library/AcpiLib.h>
#include <Library/BaseMemoryLib.h>
@@ -21,6 +22,34 @@
#include <Library/UefiLib.h>
#include <Protocol/AcpiTable.h>
+#pragma pack(1)
+
+typedef struct {
+ EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node;
+ UINT32 Identifiers;
+} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
+
+typedef struct
+{
+ EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode;
+ EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap;
+} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
+
+typedef struct
+{
+ EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode;
+ EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap;
+} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
+
+typedef struct {
+ EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort;
+ SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode;
+ SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode;
+ SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode;
+} SBSA_IO_REMAPPING_STRUCTURE;
+
+#pragma pack ()
+
/*
* A Function to Compute the ACPI Table Checksum
*/
@@ -40,6 +69,169 @@ AcpiPlatformChecksum (
Buffer[ChecksumOffset] = CalculateCheckSum8(Buffer, Size);
}
+/*
+ * A function that add the IORT ACPI table.
+ IN EFI_ACPI_COMMON_HEADER *CurrentTable
+ */
+EFI_STATUS
+AddIortTable (
+ IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN TableHandle;
+ UINT32 TableSize;
+ EFI_PHYSICAL_ADDRESS PageAddress;
+ UINT8 *New;
+ UINTN GicItsBase;
+
+ // Initialize IORT ACPI Header
+ EFI_ACPI_6_0_IO_REMAPPING_TABLE Header = {
+ SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
+ SBSA_IO_REMAPPING_STRUCTURE,
+ EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00),
+ 2,
+ sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset
+ 0 };
+
+ // Initialize SMMU3 Structure
+ SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE Smmu3 = {
+ {
+ {
+ EFI_ACPI_IORT_TYPE_SMMUv3,
+ sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE),
+ 2, // Revision
+ 0, // Reserved
+ 1, // NumIdMapping
+ OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap) // IdReference
+ },
+ PcdGet64 (PcdSmmuBase), // Base address
+ EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags
+ 0, // Reserved
+ 0, // VATOS address
+ EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model
+ 0, // Event
+ 0, // Pri
+ 0, // Gerror
+ 0, // Sync
+ 0, // Proximity domain
+ 1 // DevIDMappingIndex
+ },
+ {
+ 0x0000, // InputBase
+ 0xffff, // NumIds
+ 0x0000, // OutputBase
+ OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReference
+ 0 // Flags
+ }
+ };
+
+ SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE Rc = {
+ {
+ {
+ EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type
+ sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length
+ 0, // Revision
+ 0, // Reserved
+ 1, // NumIdMappings
+ OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // IdReference
+ },
+ 1, // CacheCoherent
+ 0, // AllocationHints
+ 0, // Reserved
+ 0, // MemoryAccessFlags
+ EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute
+ 0x0, // PciSegmentNumber
+ //0, //MemoryAddressSizeLimit
+ },
+ {
+ 0x0000, // InputBase
+ 0xffff, // NumIds
+ 0x0000, // OutputBase
+ OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReference
+ 0, // Flags
+ }
+ };
+
+ SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Its = {
+ // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
+ {
+ // EFI_ACPI_6_0_IO_REMAPPING_NODE
+ {
+ EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type
+ sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
+ 0, // Revision
+ 0, // Identifier
+ 0, // NumIdMappings
+ 0, // IdReference
+ },
+ 0, // ITS count
+ },
+ 0, // GIC ITS Identifiers
+ };
+
+ // Calculate the new table size based on the number of cores
+ TableSize = sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE) +
+ sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE) +
+ sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE) +
+ sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE) ;
+
+ Status = gBS->AllocatePages (
+ AllocateAnyPages,
+ EfiACPIReclaimMemory,
+ EFI_SIZE_TO_PAGES (TableSize),
+ &PageAddress
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to allocate pages for IORT table\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ New = (UINT8 *)(UINTN) PageAddress;
+ ZeroMem (New, TableSize);
+
+ GicItsBase = PcdGet64 (PcdGicItsBase);
+
+ if (GicItsBase > 0) {
+ Header.NumNodes = 3;
+ }
+
+ // Add the ACPI Description table header
+ CopyMem (New, &Header, sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE));
+ ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize;
+ New += sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE);
+
+ // SMMUv3 Node
+ CopyMem (New, &Smmu3, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE));
+ New += sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE);
+
+ // RC Node
+ CopyMem (New, &Rc, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE));
+ New += sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE);
+
+ if (GicItsBase > 0) {
+ Its.Node.NumItsIdentifiers = 1;
+
+ // ITS Node
+ CopyMem (New, &Its, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE));
+ New += sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE);
+ }
+
+ AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize);
+
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ (EFI_ACPI_COMMON_HEADER *)PageAddress,
+ TableSize,
+ &TableHandle
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to install IORT table\n"));
+ }
+
+ return Status;
+}
+
/*
* A function that add the MADT ACPI table.
IN EFI_ACPI_COMMON_HEADER *CurrentTable
@@ -56,6 +248,7 @@ AddMadtTable (
UINT8 *New;
UINT32 NumCores;
UINT32 CoreIndex;
+ UINTN GicItsBase;
// Initialize MADT ACPI Header
EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header = {
@@ -91,11 +284,6 @@ AddMadtTable (
// Initialize GIC Redistributor Structure
EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
- // Initialize GIC ITS Structure
- EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its = SBSAQEMU_MADT_GIC_ITS_INIT(0);
-
- DEBUG ((DEBUG_ERROR, "itsBaseAddr is 0x%4x\n", PcdGet64 (PcdGicItsBase)));
-
// Get CoreCount which was determined eariler after parsing device tree
NumCores = PcdGet32 (PcdCoreCount);
@@ -103,8 +291,17 @@ AddMadtTable (
TableSize = sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER) +
(sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) +
sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) +
- sizeof (EFI_ACPI_6_0_GICR_STRUCTURE) +
- sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE);
+ sizeof (EFI_ACPI_6_0_GICR_STRUCTURE);
+
+ // Initialize GIC ITS Structure
+ EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its = SBSAQEMU_MADT_GIC_ITS_INIT(0);
+
+ GicItsBase = PcdGet64 (PcdGicItsBase);
+ DEBUG ((DEBUG_ERROR, "itsBaseAddr is 0x%8x\n", GicItsBase));
+
+ if (GicItsBase > 0) {
+ TableSize += sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE);
+ }
Status = gBS->AllocatePages (
AllocateAnyPages,
@@ -144,9 +341,11 @@ AddMadtTable (
CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE));
New += sizeof (EFI_ACPI_6_0_GICR_STRUCTURE);
- // GIC ITS Structure
- CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE));
- New += sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE);
+ if (GicItsBase > 0) {
+ // GIC ITS Structure
+ CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE));
+ New += sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE);
+ }
AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize);
@@ -317,7 +516,7 @@ AddSsdtTable (
}
/*
- * A function that adds the SSDT ACPI table.
+ * A function that adds the PPTT ACPI table.
*/
EFI_STATUS
AddPpttTable (
@@ -448,6 +647,11 @@ InitializeSbsaQemuAcpiDxe (
return Status;
}
+ Status = AddIortTable (AcpiTable);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to add IORT table\n"));
+ }
+
Status = AddMadtTable (AcpiTable);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "Failed to add MADT table\n"));
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc
deleted file mode 100644
index ec4ce504efd1..000000000000
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc
+++ /dev/null
@@ -1,135 +0,0 @@
-/** @file
-
- Copyright (c) 2023, Linaro Ltd. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <IndustryStandard/IoRemappingTable.h>
-#include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/SbsaQemuAcpi.h>
-
-#pragma pack(1)
-
-typedef struct {
- EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node;
- UINT32 Identifiers;
-} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
-
-typedef struct
-{
- EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode;
- EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap;
-} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
-
-typedef struct
-{
- EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode;
- EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap;
-} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
-
-typedef struct {
- EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort;
- SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode;
- SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode;
- SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode;
-} SBSA_IO_REMAPPING_STRUCTURE;
-
-#pragma pack ()
-
-STATIC SBSA_IO_REMAPPING_STRUCTURE Iort = {
- {
- SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
- SBSA_IO_REMAPPING_STRUCTURE,
- EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00),
- 3, // NumNodes
- sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset
- 0 // Reserved
- },
- // SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
- {
- // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
- {
- // EFI_ACPI_6_0_IO_REMAPPING_NODE
- {
- EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type
- sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
- 0, // Revision
- 0, // Reserved
- 0, // NumIdMappings
- 0, // IdReference
- },
- 1, // ITS count
- },
- 0, // GIC ITS Identifiers
- },
- // SMMU
- {
- // EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE
- {
- // EFI_ACPI_6_0_IO_REMAPPING_NODE
- {
- EFI_ACPI_IORT_TYPE_SMMUv3, // Type
- sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE), // Length
- 2, // Revision
- 0, // Reserved
- 1, // NumIdMapping
- OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap), // IdReference
- },
- 0x60050000, // Base address
- EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags
- 0, // Reserved
- 0, // VATOS address
- EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model
- 74, // Event
- 75, // Pri
- 77, // Gerror
- 76, // Sync
- 0, // Proximity domain
- 1, // DevIDMappingIndex
- },
- // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
- {
- 0x0000, // InputBase
- 0xffff, // NumIds
- 0x0000, // OutputBase
- OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReference
- 0, // Flags
- },
- },
- // SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
- {
- // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
- {
- // EFI_ACPI_6_0_IO_REMAPPING_NODE
- {
- EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type
- sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length
- 0, // Revision
- 0, // Reserved
- 1, // NumIdMappings
- OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // IdReference
- },
- 1, // CacheCoherent
- 0, // AllocationHints
- 0, // Reserved
- 0, // MemoryAccessFlags
- EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute
- 0x0, // PciSegmentNumber
- //0, //MemoryAddressSizeLimit
- },
- // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
- {
- 0x0000, // InputBase
- 0xffff, // NumIds
- 0x0000, // OutputBase
- OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReference
- 0, // Flags
- }
- }
-};
-
-#pragma pack()
-
-VOID* CONST ReferenceAcpiTable = &Iort;
\ No newline at end of file
--
2.41.0
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-=-=-=-=-=-=-=-=-=-=-=-Hi Marcin, Sorry to disturb you but I would like to consult you a little question about this patch because of my lack of engineering experience: Q: It seems like that the third patch will delete Iort.aslc file and moving the creation of IORT into SbsaQemuAcpiDxe driver, so the firmware can dynamically create a suitable MADT & IORT ? By the way, dose this means part of Shashi's code in the first patch (add GIC ITS support) will be covered/removed? Many thanks Yuquan -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106626): https://edk2.groups.io/g/devel/message/106626 Mute This Topic: https://groups.io/mt/99854681/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
W dniu 4.07.2023 o 09:20, Yuquan Wang pisze: > Sorry to disturb you but I would like to consult you a little question > about this patch because of my lack of engineering experience: > > Q: It seems like that the third patch will delete Iort.aslc file and > moving the creation of IORT into SbsaQemuAcpiDxe driver, so the firmware > can dynamically create a suitable MADT & IORT ? Yes. > By the way, dose this means part of Shashi's code in the first patch > (add GIC ITS support) will be covered/removed? This series is work in progress. Shashi wrote GIC ITS code over year ago but it was waiting for versioning of the platform. His code works if QEMU has GIC ITS support built-in. But had address hardcoded. I added export of GIC ITS address into DeviceTree exported by QEMU. Then TF-A exports it. EDK2 uses SMC call to get address from TF-A and initialize GIC ITS properly. I added code for it to Shashi's patch so it can be tested how it is supposed to work on platform with GIC ITS present. Then I started working on getting EDK2 working on system where GIC ITS is not present (like QEMU 8.0.0 release). On such platform we cannot export ITS node in neither MADT nor IORT because there is no (virtual) hardware for it. I lack skills to handle .aslc files so moved creation of tables to C code and added some checks so ITS nodes are created only when there is ITS hardware present. QEMU HEAD (with GIC ITS) boots fine to Linux and complex PCI Express setups work (my test config has PCIe switch, PCIe-to-PCI bridge, PCIe root ports and extra PCIe root complex). The problem is with QEMU 8.0.0 (no GIC ITS) where I get some kernel complaints about interrupts. And this is what I am working on right now. https://github.com/hrw/fork-edk2-platforms/commits/submit/0628-its has my work-in-progress tree. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106628): https://edk2.groups.io/g/devel/message/106628 Mute This Topic: https://groups.io/mt/99854681/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
Hi, Marcin On 2023-07-04 15:36, marcin.juszkiewicz wrote: The problem is with QEMU 8.0.0 (no GIC ITS) where I get some kernel complaints about interrupts. And this is what I am working on right now. https://github.com/hrw/fork-edk2-platforms/commits/submit/0628-its has my work-in-progress tree. Thanks for your patient explanation and sharing. Many thanks Yuquan -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106630): https://edk2.groups.io/g/devel/message/106630 Mute This Topic: https://groups.io/mt/99854681/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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