The satp mode bits shift is used cross modules. It should be defined
in one place.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
---
 MdePkg/Include/Register/RiscV64/RiscVEncoding.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
index 5c2989b797bf..2bde8db478ff 100644
--- a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
+++ b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
@@ -58,9 +58,10 @@
 #define PRV_S  1UL
 #define PRV_M  3UL
 
-#define SATP64_MODE  0xF000000000000000ULL
-#define SATP64_ASID  0x0FFFF00000000000ULL
-#define SATP64_PPN   0x00000FFFFFFFFFFFULL
+#define SATP64_MODE        0xF000000000000000ULL
+#define SATP64_MODE_SHIFT  60
+#define SATP64_ASID        0x0FFFF00000000000ULL
+#define SATP64_PPN         0x00000FFFFFFFFFFFULL
 
 #define SATP_MODE_OFF   0UL
 #define SATP_MODE_SV32  1UL
-- 
2.25.1



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On Fri, May 26, 2023 at 04:17:28PM -0700, Tuan Phan wrote:
> The satp mode bits shift is used cross modules. It should be defined
> in one place.
> 
> Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
> ---

LGTM.

Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>


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