Currently, the implementation starts link training and put device
out-of-reset right away. This make LinkStat and BlockEventStat registers
indicate that link is not up yet (LinkStat: 0x300 and BlockEventStat: 0x0).
This fix will start link training after putting device out-of-reset.
The values of LinkStat and BlockEventStat registers after this fix are
respectively 0x1103 and 0x1 (Link is up).

Signed-off-by: Minh Nguyen <minhnguyen1@os.amperecomputing.com>
---
 Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c
index f7c8defc1906..d797442d9fbc 100644
--- a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c
+++ b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c
@@ -1177,12 +1177,12 @@ Ac01PcieCoreSetupRC (
     // Assert PERST low to reset endpoint
     BoardPcieAssertPerst (RootComplex, PcieIndex, FALSE);
 
+    // Complete the PERST pulse
+    BoardPcieAssertPerst (RootComplex, PcieIndex, TRUE);
+
     // Start link training
     StartLinkTraining (RootComplex, PcieIndex, TRUE);
 
-    // Complete the PERST pulse
-    BoardPcieAssertPerst (RootComplex, PcieIndex, TRUE);
-
     // Lock programming of config space
     EnableDbiAccess  (RootComplex, PcieIndex, FALSE);
 
-- 
2.39.0



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Reviewed-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com>


@Leif, @Ard, Please help us to merge this series

Thanks,

- Tinh

On 11/05/2023 14:51, Minh Nguyen wrote:
> Currently, the implementation starts link training and put device
> out-of-reset right away. This make LinkStat and BlockEventStat registers
> indicate that link is not up yet (LinkStat: 0x300 and BlockEventStat: 0x0).
> This fix will start link training after putting device out-of-reset.
> The values of LinkStat and BlockEventStat registers after this fix are
> respectively 0x1103 and 0x1 (Link is up).
>
> Signed-off-by: Minh Nguyen <minhnguyen1@os.amperecomputing.com>
> ---
>   Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c
> index f7c8defc1906..d797442d9fbc 100644
> --- a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c
> +++ b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c
> @@ -1177,12 +1177,12 @@ Ac01PcieCoreSetupRC (
>       // Assert PERST low to reset endpoint
>       BoardPcieAssertPerst (RootComplex, PcieIndex, FALSE);
>   
> +    // Complete the PERST pulse
> +    BoardPcieAssertPerst (RootComplex, PcieIndex, TRUE);
> +
>       // Start link training
>       StartLinkTraining (RootComplex, PcieIndex, TRUE);
>   
> -    // Complete the PERST pulse
> -    BoardPcieAssertPerst (RootComplex, PcieIndex, TRUE);
> -
>       // Lock programming of config space
>       EnableDbiAccess  (RootComplex, PcieIndex, FALSE);
>   


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