[edk2-devel] [PATCH 4/6] UefiCpuPkg/CpuDxe: Refactor to use CPUID definitions

Ni, Ray posted 6 patches 1 year, 7 months ago
[edk2-devel] [PATCH 4/6] UefiCpuPkg/CpuDxe: Refactor to use CPUID definitions
Posted by Ni, Ray 1 year, 7 months ago
The patch does not change any code behavior but only refactors by:
* replaces the hardcode 0x80000000 with CPUID_EXTENDED_FUNCTION
* replaces the hardcode 0x80000008 with CPUID_VIR_PHY_ADDRESS_SIZE
* replace "UINT32 Eax" with
   "CPUID_VIR_PHY_ADDRESS_SIZE_EAX  VirPhyAddressSize"

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ahmad Anadani <ahmad.anadani@intel.com>
---
 UefiCpuPkg/CpuDxe/CpuDxe.c | 18 ++++++++----------
 UefiCpuPkg/CpuDxe/CpuDxe.h |  3 ++-
 2 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index a6a91507f6..920976c576 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -1,7 +1,7 @@
 /** @file
   CPU DXE Module to produce CPU ARCH Protocol.
 
-  Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -505,20 +505,18 @@ InitializeMtrrMask (
   VOID
   )
 {
-  UINT32  RegEax;
-  UINT8   PhysicalAddressBits;
+  UINT32                          MaxExtendedFunction;
+  CPUID_VIR_PHY_ADDRESS_SIZE_EAX  VirPhyAddressSize;
 
-  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
 
-  if (RegEax >= 0x80000008) {
-    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-
-    PhysicalAddressBits = (UINT8)RegEax;
+  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
   } else {
-    PhysicalAddressBits = 36;
+    VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
   }
 
-  mValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;
+  mValidMtrrBitsMask    = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
   mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;
 }
 
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h
index 49a390b4c4..0e7d88dd35 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.h
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.h
@@ -1,7 +1,7 @@
 /** @file
   CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
 
-  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -13,6 +13,7 @@
 
 #include <Protocol/Cpu.h>
 #include <Protocol/MpService.h>
+#include <Register/Intel/Cpuid.h>
 #include <Register/Intel/Msr.h>
 
 #include <Ppi/SecPlatformInformation.h>
-- 
2.39.1.windows.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#101522): https://edk2.groups.io/g/devel/message/101522
Mute This Topic: https://groups.io/mt/97767969/1787277
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076/xyzzy [importer@patchew.org]
-=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 4/6] UefiCpuPkg/CpuDxe: Refactor to use CPUID definitions
Posted by Michael D Kinney 1 year, 6 months ago
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>

> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Tuesday, March 21, 2023 4:57 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Kumar, Rahul R <rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>; Kinney,
> Michael D <michael.d.kinney@intel.com>; Anadani, Ahmad <ahmad.anadani@intel.com>
> Subject: [PATCH 4/6] UefiCpuPkg/CpuDxe: Refactor to use CPUID definitions
> 
> The patch does not change any code behavior but only refactors by:
> * replaces the hardcode 0x80000000 with CPUID_EXTENDED_FUNCTION
> * replaces the hardcode 0x80000008 with CPUID_VIR_PHY_ADDRESS_SIZE
> * replace "UINT32 Eax" with
>    "CPUID_VIR_PHY_ADDRESS_SIZE_EAX  VirPhyAddressSize"
> 
> Signed-off-by: Ray Ni <ray.ni@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Ahmad Anadani <ahmad.anadani@intel.com>
> ---
>  UefiCpuPkg/CpuDxe/CpuDxe.c | 18 ++++++++----------
>  UefiCpuPkg/CpuDxe/CpuDxe.h |  3 ++-
>  2 files changed, 10 insertions(+), 11 deletions(-)
> 
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
> index a6a91507f6..920976c576 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.c
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
> @@ -1,7 +1,7 @@
>  /** @file
> 
>    CPU DXE Module to produce CPU ARCH Protocol.
> 
> 
> 
> -  Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.<BR>
> 
> +  Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
> 
>    SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> 
>  **/
> 
> @@ -505,20 +505,18 @@ InitializeMtrrMask (
>    VOID
> 
>    )
> 
>  {
> 
> -  UINT32  RegEax;
> 
> -  UINT8   PhysicalAddressBits;
> 
> +  UINT32                          MaxExtendedFunction;
> 
> +  CPUID_VIR_PHY_ADDRESS_SIZE_EAX  VirPhyAddressSize;
> 
> 
> 
> -  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
> 
> +  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
> 
> 
> 
> -  if (RegEax >= 0x80000008) {
> 
> -    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
> 
> -
> 
> -    PhysicalAddressBits = (UINT8)RegEax;
> 
> +  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
> 
> +    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
> 
>    } else {
> 
> -    PhysicalAddressBits = 36;
> 
> +    VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
> 
>    }
> 
> 
> 
> -  mValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;
> 
> +  mValidMtrrBitsMask    = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
> 
>    mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;
> 
>  }
> 
> 
> 
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h
> index 49a390b4c4..0e7d88dd35 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.h
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.h
> @@ -1,7 +1,7 @@
>  /** @file
> 
>    CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
> 
> 
> 
> -  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
> 
> +  Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
> 
>    SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> 
>  **/
> 
> @@ -13,6 +13,7 @@
> 
> 
>  #include <Protocol/Cpu.h>
> 
>  #include <Protocol/MpService.h>
> 
> +#include <Register/Intel/Cpuid.h>
> 
>  #include <Register/Intel/Msr.h>
> 
> 
> 
>  #include <Ppi/SecPlatformInformation.h>
> 
> --
> 2.39.1.windows.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#102138): https://edk2.groups.io/g/devel/message/102138
Mute This Topic: https://groups.io/mt/97767969/1787277
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076/xyzzy [importer@patchew.org]
-=-=-=-=-=-=-=-=-=-=-=-