REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076
This library is required to make SBI ecalls from the S-mode EDK2.
This is mostly copied from
edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
---
MdePkg/MdePkg.dec | 4 +
MdePkg/MdePkg.dsc | 3 +
MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf | 26 +++
MdePkg/Include/Library/BaseRiscVSbiLib.h | 154 +++++++++++++
MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c | 231 ++++++++++++++++++++
MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S | 42 ++++
6 files changed, 460 insertions(+)
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index 3d08f20d15b0..ca2e4dcf815c 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -316,6 +316,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
## @libraryclass Provides function to support TDX processing.
TdxLib|Include/Library/TdxLib.h
+[LibraryClasses.RISCV64]
+ ## @libraryclass Provides function to make ecalls to SBI
+ BaseRiscVSbiLib|Include/Library/BaseRiscVSbiLib.h
+
[Guids]
#
# GUID defined in UEFI2.1/UEFI2.0/EFI1.1
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 32a852dc466e..0ac7618b4623 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -190,4 +190,7 @@ [Components.ARM, Components.AARCH64]
MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+[Components.RISCV64]
+ MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
+
[BuildOptions]
diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
new file mode 100644
index 000000000000..d6fd3f663af1
--- /dev/null
+++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
@@ -0,0 +1,26 @@
+## @file
+# RISC-V Library to call SBI ecalls
+#
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = BaseRiscVSbiLib
+ FILE_GUID = D742CF3D-E600-4009-8FB5-318073008508
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVSbiLib
+
+[Sources]
+ BaseRiscVSbiLib.c
+ RiscVSbiEcall.S
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ BaseLib
diff --git a/MdePkg/Include/Library/BaseRiscVSbiLib.h b/MdePkg/Include/Library/BaseRiscVSbiLib.h
new file mode 100644
index 000000000000..e75520b4b888
--- /dev/null
+++ b/MdePkg/Include/Library/BaseRiscVSbiLib.h
@@ -0,0 +1,154 @@
+/** @file
+ Library to call the RISC-V SBI ecalls
+
+ Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Glossary:
+ - Hart - Hardware Thread, similar to a CPU core
+
+ Currently, EDK2 needs to call SBI only to set the time and to do system reset.
+
+**/
+
+#ifndef RISCV_SBI_LIB_H_
+#define RISCV_SBI_LIB_H_
+
+#include <Uefi.h>
+
+/* SBI Extension IDs */
+#define SBI_EXT_TIME 0x54494D45
+#define SBI_EXT_SRST 0x53525354
+
+/* SBI function IDs for TIME extension*/
+#define SBI_EXT_TIME_SET_TIMER 0x0
+
+/* SBI function IDs for SRST extension */
+#define SBI_EXT_SRST_RESET 0x0
+
+#define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+#define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+#define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+
+#define SBI_SRST_RESET_REASON_NONE 0x0
+#define SBI_SRST_RESET_REASON_SYSFAIL 0x1
+
+/* SBI return error codes */
+#define SBI_SUCCESS 0
+#define SBI_ERR_FAILED -1
+#define SBI_ERR_NOT_SUPPORTED -2
+#define SBI_ERR_INVALID_PARAM -3
+#define SBI_ERR_DENIED -4
+#define SBI_ERR_INVALID_ADDRESS -5
+#define SBI_ERR_ALREADY_AVAILABLE -6
+#define SBI_ERR_ALREADY_STARTED -7
+#define SBI_ERR_ALREADY_STOPPED -8
+
+#define SBI_LAST_ERR SBI_ERR_ALREADY_STOPPED
+
+typedef struct {
+ UINT64 BootHartId;
+ VOID *PeiServiceTable; // PEI Service table
+ VOID *PrePiHobList; // Pre PI Hob List
+ UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
+} EFI_RISCV_FIRMWARE_CONTEXT;
+
+//
+// EDK2 OpenSBI firmware extension return status.
+//
+typedef struct {
+ UINTN Error; ///< SBI status code
+ UINTN Value; ///< Value returned
+} SBI_RET;
+
+VOID
+EFIAPI
+SbiSetTimer (
+ IN UINT64 Time
+ );
+
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+ IN UINTN ResetType,
+ IN UINTN ResetReason
+ );
+
+/**
+ Get firmware context of the calling hart.
+
+ @param[out] FirmwareContext The firmware context pointer.
+**/
+VOID
+EFIAPI
+GetFirmwareContext (
+ OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
+ );
+
+/**
+ Set firmware context of the calling hart.
+
+ @param[in] FirmwareContext The firmware context pointer.
+**/
+VOID
+EFIAPI
+SetFirmwareContext (
+ IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
+ );
+
+/**
+ Get pointer to OpenSBI Firmware Context
+
+ Get the pointer of firmware context.
+
+ @param FirmwareContextPtr Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+ IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
+ );
+
+/**
+ Set pointer to OpenSBI Firmware Context
+
+ Set the pointer of firmware context.
+
+ @param FirmwareContextPtr Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+ IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
+ );
+
+/**
+ Make ECALL in assembly
+
+ Switch to M-mode
+
+ @param[in,out] Arg0
+ @param[in,out] Arg1
+ @param[in] Arg2
+ @param[in] Arg3
+ @param[in] Arg4
+ @param[in] Arg5
+ @param[in] FID
+ @param[in] EXT
+**/
+VOID
+EFIAPI
+RiscVSbiEcall (
+ IN OUT UINTN *Arg0,
+ IN OUT UINTN *Arg1,
+ IN UINTN Arg2,
+ IN UINTN Arg3,
+ IN UINTN Arg4,
+ IN UINTN Arg5,
+ IN UINTN Fid,
+ IN UINTN Ext
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c
new file mode 100644
index 000000000000..2ba8f5ed366a
--- /dev/null
+++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c
@@ -0,0 +1,231 @@
+/** @file
+ Instance of the SBI ecall library.
+
+ It allows calling an SBI function via an ecall from S-Mode.
+
+ Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseRiscVSbiLib.h>
+
+//
+// Maximum arguments for SBI ecall
+#define SBI_CALL_MAX_ARGS 6
+
+/**
+ Call SBI call using ecall instruction.
+
+ Asserts when NumArgs exceeds SBI_CALL_MAX_ARGS.
+
+ @param[in] ExtId SBI extension ID.
+ @param[in] FuncId SBI function ID.
+ @param[in] NumArgs Number of arguments to pass to the ecall.
+ @param[in] ... Argument list for the ecall.
+
+ @retval Returns SBI_RET structure with value and error code.
+
+**/
+STATIC
+SBI_RET
+EFIAPI
+SbiCall (
+ IN UINTN ExtId,
+ IN UINTN FuncId,
+ IN UINTN NumArgs,
+ ...
+ )
+{
+ UINTN I;
+ SBI_RET Ret;
+ UINTN Args[SBI_CALL_MAX_ARGS];
+ VA_LIST ArgList;
+
+ VA_START (ArgList, NumArgs);
+
+ if (NumArgs > SBI_CALL_MAX_ARGS) {
+ Ret.Error = SBI_ERR_INVALID_PARAM;
+ Ret.Value = -1;
+ return Ret;
+ }
+
+ for (I = 0; I < SBI_CALL_MAX_ARGS; I++) {
+ if (I < NumArgs) {
+ Args[I] = VA_ARG (ArgList, UINTN);
+ } else {
+ // Default to 0 for all arguments that are not given
+ Args[I] = 0;
+ }
+ }
+
+ VA_END (ArgList);
+
+ // ECALL updates the a0 and a1 registers as return values.
+ RiscVSbiEcall (
+ &Args[0],
+ &Args[1],
+ Args[2],
+ Args[3],
+ Args[4],
+ Args[5],
+ (UINTN)(FuncId),
+ (UINTN)(ExtId)
+ );
+
+ Ret.Error = Args[0];
+ Ret.Value = Args[1];
+ return Ret;
+}
+
+/**
+ Translate SBI error code to EFI status.
+
+ @param[in] SbiError SBI error code
+ @retval EFI_STATUS
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+TranslateError (
+ IN UINTN SbiError
+ )
+{
+ switch (SbiError) {
+ case SBI_SUCCESS:
+ return EFI_SUCCESS;
+ case SBI_ERR_FAILED:
+ return EFI_DEVICE_ERROR;
+ break;
+ case SBI_ERR_NOT_SUPPORTED:
+ return EFI_UNSUPPORTED;
+ break;
+ case SBI_ERR_INVALID_PARAM:
+ return EFI_INVALID_PARAMETER;
+ break;
+ case SBI_ERR_DENIED:
+ return EFI_ACCESS_DENIED;
+ break;
+ case SBI_ERR_INVALID_ADDRESS:
+ return EFI_LOAD_ERROR;
+ break;
+ case SBI_ERR_ALREADY_AVAILABLE:
+ return EFI_ALREADY_STARTED;
+ break;
+ default:
+ //
+ // Reaches here only if SBI has defined a new error type
+ //
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ break;
+ }
+}
+
+/**
+ Clear pending timer interrupt bit and set timer for next event after Time.
+
+ To clear the timer without scheduling a timer event, set Time to a
+ practically infinite value or mask the timer interrupt by clearing sie.STIE.
+
+ @param[in] Time The time offset to the next scheduled timer interrupt.
+**/
+VOID
+EFIAPI
+SbiSetTimer (
+ IN UINT64 Time
+ )
+{
+ SbiCall (SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, 1, Time);
+}
+
+/**
+ Reset the system using SRST SBI extenion
+
+ @param[in] ResetType The SRST System Reset Type.
+ @param[in] ResetReason The SRST System Reset Reason.
+**/
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+ IN UINTN ResetType,
+ IN UINTN ResetReason
+ )
+{
+ SBI_RET Ret;
+
+ Ret = SbiCall (
+ SBI_EXT_SRST,
+ SBI_EXT_SRST_RESET,
+ 2,
+ ResetType,
+ ResetReason
+ );
+
+ return TranslateError (Ret.Error);
+}
+
+/**
+ Get firmware context of the calling hart.
+
+ @param[out] FirmwareContext The firmware context pointer.
+**/
+VOID
+EFIAPI
+GetFirmwareContext (
+ OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
+ )
+{
+ *FirmwareContext = (EFI_RISCV_FIRMWARE_CONTEXT *)RiscVGetSupervisorScratch ();
+}
+
+/**
+ Set firmware context of the calling hart.
+
+ @param[in] FirmwareContext The firmware context pointer.
+**/
+VOID
+EFIAPI
+SetFirmwareContext (
+ IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
+ )
+{
+ RiscVSetSupervisorScratch ((UINT64)FirmwareContext);
+}
+
+/**
+ Get pointer to OpenSBI Firmware Context
+
+ Get the pointer of firmware context through OpenSBI FW Extension SBI.
+
+ @param FirmwareContextPtr Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+ IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
+ )
+{
+ GetFirmwareContext (FirmwareContextPtr);
+}
+
+/**
+ Set the pointer to OpenSBI Firmware Context
+
+ Set the pointer of firmware context through OpenSBI FW Extension SBI.
+
+ @param FirmwareContextPtr Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+ IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
+ )
+{
+ SetFirmwareContext (FirmwareContextPtr);
+}
diff --git a/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S b/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S
new file mode 100644
index 000000000000..8ba69f8512a5
--- /dev/null
+++ b/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S
@@ -0,0 +1,42 @@
+//------------------------------------------------------------------------------
+//
+// Make ECALL to SBI
+//
+// Copyright (c) 2023, Ventana Micro Systems Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#include <Register/RiscV64/RiscVImpl.h>
+
+.data
+.align 3
+.section .text
+
+//
+// Make ECALL to SBI
+// ecall updates the same a0 and a1 registers with
+// return values. Hence, the C function which calls
+// this should pass the address of Arg0 and Arg1.
+// This routine saves the address and updates it
+// with a0 and a1 once ecall returns.
+//
+// @param a0 : Pointer to Arg0
+// @param a1 : Pointer to Arg1
+// @param a2 : Arg2
+// @param a3 : Arg3
+// @param a4 : Arg4
+// @param a5 : Arg5
+// @param a6 : FunctionID
+// @param a7 : ExtensionId
+//
+ASM_FUNC (RiscVSbiEcall)
+ mv t0, a0
+ mv t1, a1
+ ld a0, 0(a0)
+ ld a1, 0(a1)
+ ecall
+ sd a0, 0(t0)
+ sd a1, 0(t1)
+ ret
--
2.34.1
-=-=-=-=-=-=-=-=-=-=-=-
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-=-=-=-=-=-=-=-=-=-=-=-Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
> -----Original Message-----
> From: Sunil V L <sunilvl@ventanamicro.com>
> Sent: Friday, February 10, 2023 4:30 AM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang
> <zhiguang.liu@intel.com>; Abner Chang <abner.chang@amd.com>; Warkentin, Andrei <andrei.warkentin@intel.com>
> Subject: [edk2-staging/RiscV64QemuVirt PATCH V8 03/19] MdePkg: Add BaseRiscVSbiLib Library for RISC-V
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076
>
> This library is required to make SBI ecalls from the S-mode EDK2.
> This is mostly copied from
> edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib
>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Abner Chang <abner.chang@amd.com>
> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
> ---
> MdePkg/MdePkg.dec | 4 +
> MdePkg/MdePkg.dsc | 3 +
> MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf | 26 +++
> MdePkg/Include/Library/BaseRiscVSbiLib.h | 154 +++++++++++++
> MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c | 231 ++++++++++++++++++++
> MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S | 42 ++++
> 6 files changed, 460 insertions(+)
>
> diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
> index 3d08f20d15b0..ca2e4dcf815c 100644
> --- a/MdePkg/MdePkg.dec
> +++ b/MdePkg/MdePkg.dec
> @@ -316,6 +316,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
> ## @libraryclass Provides function to support TDX processing.
> TdxLib|Include/Library/TdxLib.h
>
> +[LibraryClasses.RISCV64]
> + ## @libraryclass Provides function to make ecalls to SBI
> + BaseRiscVSbiLib|Include/Library/BaseRiscVSbiLib.h
> +
> [Guids]
> #
> # GUID defined in UEFI2.1/UEFI2.0/EFI1.1
> diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
> index 32a852dc466e..0ac7618b4623 100644
> --- a/MdePkg/MdePkg.dsc
> +++ b/MdePkg/MdePkg.dsc
> @@ -190,4 +190,7 @@ [Components.ARM, Components.AARCH64]
> MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
> MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
>
> +[Components.RISCV64]
> + MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
> +
> [BuildOptions]
> diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
> new file mode 100644
> index 000000000000..d6fd3f663af1
> --- /dev/null
> +++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
> @@ -0,0 +1,26 @@
> +## @file
> +# RISC-V Library to call SBI ecalls
> +#
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001b
> + BASE_NAME = BaseRiscVSbiLib
> + FILE_GUID = D742CF3D-E600-4009-8FB5-318073008508
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = RiscVSbiLib
> +
> +[Sources]
> + BaseRiscVSbiLib.c
> + RiscVSbiEcall.S
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> diff --git a/MdePkg/Include/Library/BaseRiscVSbiLib.h b/MdePkg/Include/Library/BaseRiscVSbiLib.h
> new file mode 100644
> index 000000000000..e75520b4b888
> --- /dev/null
> +++ b/MdePkg/Include/Library/BaseRiscVSbiLib.h
> @@ -0,0 +1,154 @@
> +/** @file
> + Library to call the RISC-V SBI ecalls
> +
> + Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Glossary:
> + - Hart - Hardware Thread, similar to a CPU core
> +
> + Currently, EDK2 needs to call SBI only to set the time and to do system reset.
> +
> +**/
> +
> +#ifndef RISCV_SBI_LIB_H_
> +#define RISCV_SBI_LIB_H_
> +
> +#include <Uefi.h>
> +
> +/* SBI Extension IDs */
> +#define SBI_EXT_TIME 0x54494D45
> +#define SBI_EXT_SRST 0x53525354
> +
> +/* SBI function IDs for TIME extension*/
> +#define SBI_EXT_TIME_SET_TIMER 0x0
> +
> +/* SBI function IDs for SRST extension */
> +#define SBI_EXT_SRST_RESET 0x0
> +
> +#define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
> +#define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
> +#define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
> +
> +#define SBI_SRST_RESET_REASON_NONE 0x0
> +#define SBI_SRST_RESET_REASON_SYSFAIL 0x1
> +
> +/* SBI return error codes */
> +#define SBI_SUCCESS 0
> +#define SBI_ERR_FAILED -1
> +#define SBI_ERR_NOT_SUPPORTED -2
> +#define SBI_ERR_INVALID_PARAM -3
> +#define SBI_ERR_DENIED -4
> +#define SBI_ERR_INVALID_ADDRESS -5
> +#define SBI_ERR_ALREADY_AVAILABLE -6
> +#define SBI_ERR_ALREADY_STARTED -7
> +#define SBI_ERR_ALREADY_STOPPED -8
> +
> +#define SBI_LAST_ERR SBI_ERR_ALREADY_STOPPED
> +
> +typedef struct {
> + UINT64 BootHartId;
> + VOID *PeiServiceTable; // PEI Service table
> + VOID *PrePiHobList; // Pre PI Hob List
> + UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
> +} EFI_RISCV_FIRMWARE_CONTEXT;
> +
> +//
> +// EDK2 OpenSBI firmware extension return status.
> +//
> +typedef struct {
> + UINTN Error; ///< SBI status code
> + UINTN Value; ///< Value returned
> +} SBI_RET;
> +
> +VOID
> +EFIAPI
> +SbiSetTimer (
> + IN UINT64 Time
> + );
> +
> +EFI_STATUS
> +EFIAPI
> +SbiSystemReset (
> + IN UINTN ResetType,
> + IN UINTN ResetReason
> + );
> +
> +/**
> + Get firmware context of the calling hart.
> +
> + @param[out] FirmwareContext The firmware context pointer.
> +**/
> +VOID
> +EFIAPI
> +GetFirmwareContext (
> + OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
> + );
> +
> +/**
> + Set firmware context of the calling hart.
> +
> + @param[in] FirmwareContext The firmware context pointer.
> +**/
> +VOID
> +EFIAPI
> +SetFirmwareContext (
> + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
> + );
> +
> +/**
> + Get pointer to OpenSBI Firmware Context
> +
> + Get the pointer of firmware context.
> +
> + @param FirmwareContextPtr Pointer to retrieve pointer to the
> + Firmware Context.
> +**/
> +VOID
> +EFIAPI
> +GetFirmwareContextPointer (
> + IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
> + );
> +
> +/**
> + Set pointer to OpenSBI Firmware Context
> +
> + Set the pointer of firmware context.
> +
> + @param FirmwareContextPtr Pointer to Firmware Context.
> +**/
> +VOID
> +EFIAPI
> +SetFirmwareContextPointer (
> + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
> + );
> +
> +/**
> + Make ECALL in assembly
> +
> + Switch to M-mode
> +
> + @param[in,out] Arg0
> + @param[in,out] Arg1
> + @param[in] Arg2
> + @param[in] Arg3
> + @param[in] Arg4
> + @param[in] Arg5
> + @param[in] FID
> + @param[in] EXT
> +**/
> +VOID
> +EFIAPI
> +RiscVSbiEcall (
> + IN OUT UINTN *Arg0,
> + IN OUT UINTN *Arg1,
> + IN UINTN Arg2,
> + IN UINTN Arg3,
> + IN UINTN Arg4,
> + IN UINTN Arg5,
> + IN UINTN Fid,
> + IN UINTN Ext
> + );
> +
> +#endif
> diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c
> new file mode 100644
> index 000000000000..2ba8f5ed366a
> --- /dev/null
> +++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c
> @@ -0,0 +1,231 @@
> +/** @file
> + Instance of the SBI ecall library.
> +
> + It allows calling an SBI function via an ecall from S-Mode.
> +
> + Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/BaseRiscVSbiLib.h>
> +
> +//
> +// Maximum arguments for SBI ecall
> +#define SBI_CALL_MAX_ARGS 6
> +
> +/**
> + Call SBI call using ecall instruction.
> +
> + Asserts when NumArgs exceeds SBI_CALL_MAX_ARGS.
> +
> + @param[in] ExtId SBI extension ID.
> + @param[in] FuncId SBI function ID.
> + @param[in] NumArgs Number of arguments to pass to the ecall.
> + @param[in] ... Argument list for the ecall.
> +
> + @retval Returns SBI_RET structure with value and error code.
> +
> +**/
> +STATIC
> +SBI_RET
> +EFIAPI
> +SbiCall (
> + IN UINTN ExtId,
> + IN UINTN FuncId,
> + IN UINTN NumArgs,
> + ...
> + )
> +{
> + UINTN I;
> + SBI_RET Ret;
> + UINTN Args[SBI_CALL_MAX_ARGS];
> + VA_LIST ArgList;
> +
> + VA_START (ArgList, NumArgs);
> +
> + if (NumArgs > SBI_CALL_MAX_ARGS) {
> + Ret.Error = SBI_ERR_INVALID_PARAM;
> + Ret.Value = -1;
> + return Ret;
> + }
> +
> + for (I = 0; I < SBI_CALL_MAX_ARGS; I++) {
> + if (I < NumArgs) {
> + Args[I] = VA_ARG (ArgList, UINTN);
> + } else {
> + // Default to 0 for all arguments that are not given
> + Args[I] = 0;
> + }
> + }
> +
> + VA_END (ArgList);
> +
> + // ECALL updates the a0 and a1 registers as return values.
> + RiscVSbiEcall (
> + &Args[0],
> + &Args[1],
> + Args[2],
> + Args[3],
> + Args[4],
> + Args[5],
> + (UINTN)(FuncId),
> + (UINTN)(ExtId)
> + );
> +
> + Ret.Error = Args[0];
> + Ret.Value = Args[1];
> + return Ret;
> +}
> +
> +/**
> + Translate SBI error code to EFI status.
> +
> + @param[in] SbiError SBI error code
> + @retval EFI_STATUS
> +**/
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +TranslateError (
> + IN UINTN SbiError
> + )
> +{
> + switch (SbiError) {
> + case SBI_SUCCESS:
> + return EFI_SUCCESS;
> + case SBI_ERR_FAILED:
> + return EFI_DEVICE_ERROR;
> + break;
> + case SBI_ERR_NOT_SUPPORTED:
> + return EFI_UNSUPPORTED;
> + break;
> + case SBI_ERR_INVALID_PARAM:
> + return EFI_INVALID_PARAMETER;
> + break;
> + case SBI_ERR_DENIED:
> + return EFI_ACCESS_DENIED;
> + break;
> + case SBI_ERR_INVALID_ADDRESS:
> + return EFI_LOAD_ERROR;
> + break;
> + case SBI_ERR_ALREADY_AVAILABLE:
> + return EFI_ALREADY_STARTED;
> + break;
> + default:
> + //
> + // Reaches here only if SBI has defined a new error type
> + //
> + ASSERT (FALSE);
> + return EFI_UNSUPPORTED;
> + break;
> + }
> +}
> +
> +/**
> + Clear pending timer interrupt bit and set timer for next event after Time.
> +
> + To clear the timer without scheduling a timer event, set Time to a
> + practically infinite value or mask the timer interrupt by clearing sie.STIE.
> +
> + @param[in] Time The time offset to the next scheduled timer interrupt.
> +**/
> +VOID
> +EFIAPI
> +SbiSetTimer (
> + IN UINT64 Time
> + )
> +{
> + SbiCall (SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, 1, Time);
> +}
> +
> +/**
> + Reset the system using SRST SBI extenion
> +
> + @param[in] ResetType The SRST System Reset Type.
> + @param[in] ResetReason The SRST System Reset Reason.
> +**/
> +EFI_STATUS
> +EFIAPI
> +SbiSystemReset (
> + IN UINTN ResetType,
> + IN UINTN ResetReason
> + )
> +{
> + SBI_RET Ret;
> +
> + Ret = SbiCall (
> + SBI_EXT_SRST,
> + SBI_EXT_SRST_RESET,
> + 2,
> + ResetType,
> + ResetReason
> + );
> +
> + return TranslateError (Ret.Error);
> +}
> +
> +/**
> + Get firmware context of the calling hart.
> +
> + @param[out] FirmwareContext The firmware context pointer.
> +**/
> +VOID
> +EFIAPI
> +GetFirmwareContext (
> + OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
> + )
> +{
> + *FirmwareContext = (EFI_RISCV_FIRMWARE_CONTEXT *)RiscVGetSupervisorScratch ();
> +}
> +
> +/**
> + Set firmware context of the calling hart.
> +
> + @param[in] FirmwareContext The firmware context pointer.
> +**/
> +VOID
> +EFIAPI
> +SetFirmwareContext (
> + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
> + )
> +{
> + RiscVSetSupervisorScratch ((UINT64)FirmwareContext);
> +}
> +
> +/**
> + Get pointer to OpenSBI Firmware Context
> +
> + Get the pointer of firmware context through OpenSBI FW Extension SBI.
> +
> + @param FirmwareContextPtr Pointer to retrieve pointer to the
> + Firmware Context.
> +**/
> +VOID
> +EFIAPI
> +GetFirmwareContextPointer (
> + IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
> + )
> +{
> + GetFirmwareContext (FirmwareContextPtr);
> +}
> +
> +/**
> + Set the pointer to OpenSBI Firmware Context
> +
> + Set the pointer of firmware context through OpenSBI FW Extension SBI.
> +
> + @param FirmwareContextPtr Pointer to Firmware Context.
> +**/
> +VOID
> +EFIAPI
> +SetFirmwareContextPointer (
> + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
> + )
> +{
> + SetFirmwareContext (FirmwareContextPtr);
> +}
> diff --git a/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S b/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S
> new file mode 100644
> index 000000000000..8ba69f8512a5
> --- /dev/null
> +++ b/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S
> @@ -0,0 +1,42 @@
> +//------------------------------------------------------------------------------
> +//
> +// Make ECALL to SBI
> +//
> +// Copyright (c) 2023, Ventana Micro Systems Inc. All rights reserved.<BR>
> +//
> +// SPDX-License-Identifier: BSD-2-Clause-Patent
> +//
> +//------------------------------------------------------------------------------
> +
> +#include <Register/RiscV64/RiscVImpl.h>
> +
> +.data
> +.align 3
> +.section .text
> +
> +//
> +// Make ECALL to SBI
> +// ecall updates the same a0 and a1 registers with
> +// return values. Hence, the C function which calls
> +// this should pass the address of Arg0 and Arg1.
> +// This routine saves the address and updates it
> +// with a0 and a1 once ecall returns.
> +//
> +// @param a0 : Pointer to Arg0
> +// @param a1 : Pointer to Arg1
> +// @param a2 : Arg2
> +// @param a3 : Arg3
> +// @param a4 : Arg4
> +// @param a5 : Arg5
> +// @param a6 : FunctionID
> +// @param a7 : ExtensionId
> +//
> +ASM_FUNC (RiscVSbiEcall)
> + mv t0, a0
> + mv t1, a1
> + ld a0, 0(a0)
> + ld a1, 0(a1)
> + ecall
> + sd a0, 0(t0)
> + sd a1, 0(t1)
> + ret
> --
> 2.34.1
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Hi Sunil,
Is this the correct PR with all commit messages updated with all Rb/Ab tags?
https://github.com/tianocore/edk2/pull/4023
Thanks,
Mike
> -----Original Message-----
> From: Kinney, Michael D <michael.d.kinney@intel.com>
> Sent: Friday, February 10, 2023 10:22 AM
> To: Sunil V L <sunilvl@ventanamicro.com>; devel@edk2.groups.io
> Cc: Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Abner Chang <abner.chang@amd.com>;
> Warkentin, Andrei <andrei.warkentin@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>
> Subject: RE: [edk2-staging/RiscV64QemuVirt PATCH V8 03/19] MdePkg: Add BaseRiscVSbiLib Library for RISC-V
>
> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
>
> > -----Original Message-----
> > From: Sunil V L <sunilvl@ventanamicro.com>
> > Sent: Friday, February 10, 2023 4:30 AM
> > To: devel@edk2.groups.io
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang
> > <zhiguang.liu@intel.com>; Abner Chang <abner.chang@amd.com>; Warkentin, Andrei <andrei.warkentin@intel.com>
> > Subject: [edk2-staging/RiscV64QemuVirt PATCH V8 03/19] MdePkg: Add BaseRiscVSbiLib Library for RISC-V
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076
> >
> > This library is required to make SBI ecalls from the S-mode EDK2.
> > This is mostly copied from
> > edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib
> >
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > Acked-by: Abner Chang <abner.chang@amd.com>
> > Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
> > ---
> > MdePkg/MdePkg.dec | 4 +
> > MdePkg/MdePkg.dsc | 3 +
> > MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf | 26 +++
> > MdePkg/Include/Library/BaseRiscVSbiLib.h | 154 +++++++++++++
> > MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c | 231 ++++++++++++++++++++
> > MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S | 42 ++++
> > 6 files changed, 460 insertions(+)
> >
> > diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
> > index 3d08f20d15b0..ca2e4dcf815c 100644
> > --- a/MdePkg/MdePkg.dec
> > +++ b/MdePkg/MdePkg.dec
> > @@ -316,6 +316,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
> > ## @libraryclass Provides function to support TDX processing.
> > TdxLib|Include/Library/TdxLib.h
> >
> > +[LibraryClasses.RISCV64]
> > + ## @libraryclass Provides function to make ecalls to SBI
> > + BaseRiscVSbiLib|Include/Library/BaseRiscVSbiLib.h
> > +
> > [Guids]
> > #
> > # GUID defined in UEFI2.1/UEFI2.0/EFI1.1
> > diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
> > index 32a852dc466e..0ac7618b4623 100644
> > --- a/MdePkg/MdePkg.dsc
> > +++ b/MdePkg/MdePkg.dsc
> > @@ -190,4 +190,7 @@ [Components.ARM, Components.AARCH64]
> > MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
> > MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
> >
> > +[Components.RISCV64]
> > + MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
> > +
> > [BuildOptions]
> > diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
> > new file mode 100644
> > index 000000000000..d6fd3f663af1
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
> > @@ -0,0 +1,26 @@
> > +## @file
> > +# RISC-V Library to call SBI ecalls
> > +#
> > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> > +#
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +[Defines]
> > + INF_VERSION = 0x0001001b
> > + BASE_NAME = BaseRiscVSbiLib
> > + FILE_GUID = D742CF3D-E600-4009-8FB5-318073008508
> > + MODULE_TYPE = BASE
> > + VERSION_STRING = 1.0
> > + LIBRARY_CLASS = RiscVSbiLib
> > +
> > +[Sources]
> > + BaseRiscVSbiLib.c
> > + RiscVSbiEcall.S
> > +
> > +[Packages]
> > + MdePkg/MdePkg.dec
> > +
> > +[LibraryClasses]
> > + BaseLib
> > diff --git a/MdePkg/Include/Library/BaseRiscVSbiLib.h b/MdePkg/Include/Library/BaseRiscVSbiLib.h
> > new file mode 100644
> > index 000000000000..e75520b4b888
> > --- /dev/null
> > +++ b/MdePkg/Include/Library/BaseRiscVSbiLib.h
> > @@ -0,0 +1,154 @@
> > +/** @file
> > + Library to call the RISC-V SBI ecalls
> > +
> > + Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
> > +
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > + @par Glossary:
> > + - Hart - Hardware Thread, similar to a CPU core
> > +
> > + Currently, EDK2 needs to call SBI only to set the time and to do system reset.
> > +
> > +**/
> > +
> > +#ifndef RISCV_SBI_LIB_H_
> > +#define RISCV_SBI_LIB_H_
> > +
> > +#include <Uefi.h>
> > +
> > +/* SBI Extension IDs */
> > +#define SBI_EXT_TIME 0x54494D45
> > +#define SBI_EXT_SRST 0x53525354
> > +
> > +/* SBI function IDs for TIME extension*/
> > +#define SBI_EXT_TIME_SET_TIMER 0x0
> > +
> > +/* SBI function IDs for SRST extension */
> > +#define SBI_EXT_SRST_RESET 0x0
> > +
> > +#define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
> > +#define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
> > +#define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
> > +
> > +#define SBI_SRST_RESET_REASON_NONE 0x0
> > +#define SBI_SRST_RESET_REASON_SYSFAIL 0x1
> > +
> > +/* SBI return error codes */
> > +#define SBI_SUCCESS 0
> > +#define SBI_ERR_FAILED -1
> > +#define SBI_ERR_NOT_SUPPORTED -2
> > +#define SBI_ERR_INVALID_PARAM -3
> > +#define SBI_ERR_DENIED -4
> > +#define SBI_ERR_INVALID_ADDRESS -5
> > +#define SBI_ERR_ALREADY_AVAILABLE -6
> > +#define SBI_ERR_ALREADY_STARTED -7
> > +#define SBI_ERR_ALREADY_STOPPED -8
> > +
> > +#define SBI_LAST_ERR SBI_ERR_ALREADY_STOPPED
> > +
> > +typedef struct {
> > + UINT64 BootHartId;
> > + VOID *PeiServiceTable; // PEI Service table
> > + VOID *PrePiHobList; // Pre PI Hob List
> > + UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
> > +} EFI_RISCV_FIRMWARE_CONTEXT;
> > +
> > +//
> > +// EDK2 OpenSBI firmware extension return status.
> > +//
> > +typedef struct {
> > + UINTN Error; ///< SBI status code
> > + UINTN Value; ///< Value returned
> > +} SBI_RET;
> > +
> > +VOID
> > +EFIAPI
> > +SbiSetTimer (
> > + IN UINT64 Time
> > + );
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +SbiSystemReset (
> > + IN UINTN ResetType,
> > + IN UINTN ResetReason
> > + );
> > +
> > +/**
> > + Get firmware context of the calling hart.
> > +
> > + @param[out] FirmwareContext The firmware context pointer.
> > +**/
> > +VOID
> > +EFIAPI
> > +GetFirmwareContext (
> > + OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
> > + );
> > +
> > +/**
> > + Set firmware context of the calling hart.
> > +
> > + @param[in] FirmwareContext The firmware context pointer.
> > +**/
> > +VOID
> > +EFIAPI
> > +SetFirmwareContext (
> > + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
> > + );
> > +
> > +/**
> > + Get pointer to OpenSBI Firmware Context
> > +
> > + Get the pointer of firmware context.
> > +
> > + @param FirmwareContextPtr Pointer to retrieve pointer to the
> > + Firmware Context.
> > +**/
> > +VOID
> > +EFIAPI
> > +GetFirmwareContextPointer (
> > + IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
> > + );
> > +
> > +/**
> > + Set pointer to OpenSBI Firmware Context
> > +
> > + Set the pointer of firmware context.
> > +
> > + @param FirmwareContextPtr Pointer to Firmware Context.
> > +**/
> > +VOID
> > +EFIAPI
> > +SetFirmwareContextPointer (
> > + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
> > + );
> > +
> > +/**
> > + Make ECALL in assembly
> > +
> > + Switch to M-mode
> > +
> > + @param[in,out] Arg0
> > + @param[in,out] Arg1
> > + @param[in] Arg2
> > + @param[in] Arg3
> > + @param[in] Arg4
> > + @param[in] Arg5
> > + @param[in] FID
> > + @param[in] EXT
> > +**/
> > +VOID
> > +EFIAPI
> > +RiscVSbiEcall (
> > + IN OUT UINTN *Arg0,
> > + IN OUT UINTN *Arg1,
> > + IN UINTN Arg2,
> > + IN UINTN Arg3,
> > + IN UINTN Arg4,
> > + IN UINTN Arg5,
> > + IN UINTN Fid,
> > + IN UINTN Ext
> > + );
> > +
> > +#endif
> > diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c
> > new file mode 100644
> > index 000000000000..2ba8f5ed366a
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c
> > @@ -0,0 +1,231 @@
> > +/** @file
> > + Instance of the SBI ecall library.
> > +
> > + It allows calling an SBI function via an ecall from S-Mode.
> > +
> > + Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved.<BR>
> > +
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include <Library/BaseLib.h>
> > +#include <Library/BaseMemoryLib.h>
> > +#include <Library/DebugLib.h>
> > +#include <Library/BaseRiscVSbiLib.h>
> > +
> > +//
> > +// Maximum arguments for SBI ecall
> > +#define SBI_CALL_MAX_ARGS 6
> > +
> > +/**
> > + Call SBI call using ecall instruction.
> > +
> > + Asserts when NumArgs exceeds SBI_CALL_MAX_ARGS.
> > +
> > + @param[in] ExtId SBI extension ID.
> > + @param[in] FuncId SBI function ID.
> > + @param[in] NumArgs Number of arguments to pass to the ecall.
> > + @param[in] ... Argument list for the ecall.
> > +
> > + @retval Returns SBI_RET structure with value and error code.
> > +
> > +**/
> > +STATIC
> > +SBI_RET
> > +EFIAPI
> > +SbiCall (
> > + IN UINTN ExtId,
> > + IN UINTN FuncId,
> > + IN UINTN NumArgs,
> > + ...
> > + )
> > +{
> > + UINTN I;
> > + SBI_RET Ret;
> > + UINTN Args[SBI_CALL_MAX_ARGS];
> > + VA_LIST ArgList;
> > +
> > + VA_START (ArgList, NumArgs);
> > +
> > + if (NumArgs > SBI_CALL_MAX_ARGS) {
> > + Ret.Error = SBI_ERR_INVALID_PARAM;
> > + Ret.Value = -1;
> > + return Ret;
> > + }
> > +
> > + for (I = 0; I < SBI_CALL_MAX_ARGS; I++) {
> > + if (I < NumArgs) {
> > + Args[I] = VA_ARG (ArgList, UINTN);
> > + } else {
> > + // Default to 0 for all arguments that are not given
> > + Args[I] = 0;
> > + }
> > + }
> > +
> > + VA_END (ArgList);
> > +
> > + // ECALL updates the a0 and a1 registers as return values.
> > + RiscVSbiEcall (
> > + &Args[0],
> > + &Args[1],
> > + Args[2],
> > + Args[3],
> > + Args[4],
> > + Args[5],
> > + (UINTN)(FuncId),
> > + (UINTN)(ExtId)
> > + );
> > +
> > + Ret.Error = Args[0];
> > + Ret.Value = Args[1];
> > + return Ret;
> > +}
> > +
> > +/**
> > + Translate SBI error code to EFI status.
> > +
> > + @param[in] SbiError SBI error code
> > + @retval EFI_STATUS
> > +**/
> > +STATIC
> > +EFI_STATUS
> > +EFIAPI
> > +TranslateError (
> > + IN UINTN SbiError
> > + )
> > +{
> > + switch (SbiError) {
> > + case SBI_SUCCESS:
> > + return EFI_SUCCESS;
> > + case SBI_ERR_FAILED:
> > + return EFI_DEVICE_ERROR;
> > + break;
> > + case SBI_ERR_NOT_SUPPORTED:
> > + return EFI_UNSUPPORTED;
> > + break;
> > + case SBI_ERR_INVALID_PARAM:
> > + return EFI_INVALID_PARAMETER;
> > + break;
> > + case SBI_ERR_DENIED:
> > + return EFI_ACCESS_DENIED;
> > + break;
> > + case SBI_ERR_INVALID_ADDRESS:
> > + return EFI_LOAD_ERROR;
> > + break;
> > + case SBI_ERR_ALREADY_AVAILABLE:
> > + return EFI_ALREADY_STARTED;
> > + break;
> > + default:
> > + //
> > + // Reaches here only if SBI has defined a new error type
> > + //
> > + ASSERT (FALSE);
> > + return EFI_UNSUPPORTED;
> > + break;
> > + }
> > +}
> > +
> > +/**
> > + Clear pending timer interrupt bit and set timer for next event after Time.
> > +
> > + To clear the timer without scheduling a timer event, set Time to a
> > + practically infinite value or mask the timer interrupt by clearing sie.STIE.
> > +
> > + @param[in] Time The time offset to the next scheduled timer interrupt.
> > +**/
> > +VOID
> > +EFIAPI
> > +SbiSetTimer (
> > + IN UINT64 Time
> > + )
> > +{
> > + SbiCall (SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, 1, Time);
> > +}
> > +
> > +/**
> > + Reset the system using SRST SBI extenion
> > +
> > + @param[in] ResetType The SRST System Reset Type.
> > + @param[in] ResetReason The SRST System Reset Reason.
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +SbiSystemReset (
> > + IN UINTN ResetType,
> > + IN UINTN ResetReason
> > + )
> > +{
> > + SBI_RET Ret;
> > +
> > + Ret = SbiCall (
> > + SBI_EXT_SRST,
> > + SBI_EXT_SRST_RESET,
> > + 2,
> > + ResetType,
> > + ResetReason
> > + );
> > +
> > + return TranslateError (Ret.Error);
> > +}
> > +
> > +/**
> > + Get firmware context of the calling hart.
> > +
> > + @param[out] FirmwareContext The firmware context pointer.
> > +**/
> > +VOID
> > +EFIAPI
> > +GetFirmwareContext (
> > + OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
> > + )
> > +{
> > + *FirmwareContext = (EFI_RISCV_FIRMWARE_CONTEXT *)RiscVGetSupervisorScratch ();
> > +}
> > +
> > +/**
> > + Set firmware context of the calling hart.
> > +
> > + @param[in] FirmwareContext The firmware context pointer.
> > +**/
> > +VOID
> > +EFIAPI
> > +SetFirmwareContext (
> > + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
> > + )
> > +{
> > + RiscVSetSupervisorScratch ((UINT64)FirmwareContext);
> > +}
> > +
> > +/**
> > + Get pointer to OpenSBI Firmware Context
> > +
> > + Get the pointer of firmware context through OpenSBI FW Extension SBI.
> > +
> > + @param FirmwareContextPtr Pointer to retrieve pointer to the
> > + Firmware Context.
> > +**/
> > +VOID
> > +EFIAPI
> > +GetFirmwareContextPointer (
> > + IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
> > + )
> > +{
> > + GetFirmwareContext (FirmwareContextPtr);
> > +}
> > +
> > +/**
> > + Set the pointer to OpenSBI Firmware Context
> > +
> > + Set the pointer of firmware context through OpenSBI FW Extension SBI.
> > +
> > + @param FirmwareContextPtr Pointer to Firmware Context.
> > +**/
> > +VOID
> > +EFIAPI
> > +SetFirmwareContextPointer (
> > + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
> > + )
> > +{
> > + SetFirmwareContext (FirmwareContextPtr);
> > +}
> > diff --git a/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S b/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S
> > new file mode 100644
> > index 000000000000..8ba69f8512a5
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S
> > @@ -0,0 +1,42 @@
> > +//------------------------------------------------------------------------------
> > +//
> > +// Make ECALL to SBI
> > +//
> > +// Copyright (c) 2023, Ventana Micro Systems Inc. All rights reserved.<BR>
> > +//
> > +// SPDX-License-Identifier: BSD-2-Clause-Patent
> > +//
> > +//------------------------------------------------------------------------------
> > +
> > +#include <Register/RiscV64/RiscVImpl.h>
> > +
> > +.data
> > +.align 3
> > +.section .text
> > +
> > +//
> > +// Make ECALL to SBI
> > +// ecall updates the same a0 and a1 registers with
> > +// return values. Hence, the C function which calls
> > +// this should pass the address of Arg0 and Arg1.
> > +// This routine saves the address and updates it
> > +// with a0 and a1 once ecall returns.
> > +//
> > +// @param a0 : Pointer to Arg0
> > +// @param a1 : Pointer to Arg1
> > +// @param a2 : Arg2
> > +// @param a3 : Arg3
> > +// @param a4 : Arg4
> > +// @param a5 : Arg5
> > +// @param a6 : FunctionID
> > +// @param a7 : ExtensionId
> > +//
> > +ASM_FUNC (RiscVSbiEcall)
> > + mv t0, a0
> > + mv t1, a1
> > + ld a0, 0(a0)
> > + ld a1, 0(a1)
> > + ecall
> > + sd a0, 0(t0)
> > + sd a1, 0(t1)
> > + ret
> > --
> > 2.34.1
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On Wed, Feb 15, 2023 at 11:18:43PM +0000, Michael D Kinney wrote: > Hi Sunil, > > Is this the correct PR with all commit messages updated with all Rb/Ab tags? > > https://github.com/tianocore/edk2/pull/4023 > Hi Mike, This PR is ready to merge with all tags updated and CI tests passed. Thanks! Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100268): https://edk2.groups.io/g/devel/message/100268 Mute This Topic: https://groups.io/mt/96874981/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
Merged https://github.com/tianocore/edk2/pull/4023 > -----Original Message----- > From: Sunil V L <sunilvl@ventanamicro.com> > Sent: Wednesday, February 15, 2023 7:46 PM > To: devel@edk2.groups.io; Kinney, Michael D <michael.d.kinney@intel.com> > Cc: Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Abner Chang <abner.chang@amd.com>; > Warkentin, Andrei <andrei.warkentin@intel.com> > Subject: Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V8 03/19] MdePkg: Add BaseRiscVSbiLib Library for RISC-V > > On Wed, Feb 15, 2023 at 11:18:43PM +0000, Michael D Kinney wrote: > > Hi Sunil, > > > > Is this the correct PR with all commit messages updated with all Rb/Ab tags? > > > > https://github.com/tianocore/edk2/pull/4023 > > > Hi Mike, > > This PR is ready to merge with all tags updated and CI tests passed. > > Thanks! > Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100272): https://edk2.groups.io/g/devel/message/100272 Mute This Topic: https://groups.io/mt/96874981/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076/xyzzy [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
On Thu, Feb 16, 2023 at 05:54:12AM +0000, Kinney, Michael D wrote: > Merged > > https://github.com/tianocore/edk2/pull/4023 > Thanks a lot!, Mike. This is great and will enable the RISC-V community to add more features. I am so thankful for all the maintainers and reviewers. Thanks, Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100273): https://edk2.groups.io/g/devel/message/100273 Mute This Topic: https://groups.io/mt/96874981/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
Wow, fantastic! Congratulations Sunil and big thanks to everyone helping with the reviewing and approving. This is a huge milestone for RISC-V support in Tiano. -----Original Message----- From: Sunil V L <sunilvl@ventanamicro.com> Sent: Thursday, February 16, 2023 12:14 AM To: Kinney, Michael D <michael.d.kinney@intel.com> Cc: devel@edk2.groups.io; Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Abner Chang <abner.chang@amd.com>; Warkentin, Andrei <andrei.warkentin@intel.com> Subject: Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V8 03/19] MdePkg: Add BaseRiscVSbiLib Library for RISC-V On Thu, Feb 16, 2023 at 05:54:12AM +0000, Kinney, Michael D wrote: > Merged > > https://github.com/tianocore/edk2/pull/4023 > Thanks a lot!, Mike. This is great and will enable the RISC-V community to add more features. I am so thankful for all the maintainers and reviewers. Thanks, Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100282): https://edk2.groups.io/g/devel/message/100282 Mute This Topic: https://groups.io/mt/96874981/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
On Wed, Feb 15, 2023 at 11:18:43PM +0000, Michael D Kinney wrote: > Hi Sunil, > > Is this the correct PR with all commit messages updated with all Rb/Ab tags? > > https://github.com/tianocore/edk2/pull/4023 > Hi Mike, I raised this PR to check CI tests. I need to add 3 more RB tags. Will update them and let you know once it completes the CI tests. Thanks Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100259): https://edk2.groups.io/g/devel/message/100259 Mute This Topic: https://groups.io/mt/96874981/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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