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[edk2-devel] [PATCH v1 6/7] DynamicTablesPkg: Add Pci related objects

PierreGondois posted 7 patches 4 years, 7 months ago
There is a newer version of this series
[edk2-devel] [PATCH v1 6/7] DynamicTablesPkg: Add Pci related objects
Posted by PierreGondois 4 years, 7 months ago 
From: Pierre Gondois <Pierre.Gondois@arm.com>

Introduce the following CmObj in the ArmNameSpaceObjects:
 - CM_ARM_PCI_ADDRESS_MAP_INFO
 - CM_ARM_PCI_INTERRUPT_MAP_INFO

These objects allow to describe address range mapping
of Pci busses and interrupt mapping of Pci devices.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
 .../Include/ArmNameSpaceObjects.h             | 78 +++++++++++++++++++
 .../ConfigurationManagerObjectParser.c        | 28 ++++++-
 2 files changed, 105 insertions(+), 1 deletion(-)

diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index 9c49091def59..b3779f828c17 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -59,6 +59,8 @@ typedef enum ArmObjectID {
   EArmObjSerialPortInfo,               ///< 35 - Generic Serial Port Info
   EArmObjCmn600Info,                   ///< 36 - CMN-600 Info
   EArmObjLpiInfo,                      ///< 37 - Lpi Info
+  EArmObjPciAddressMapInfo,            ///< 38 - Pci Address Map Info
+  EArmObjPciInterruptMapInfo,          ///< 39 - Pci Interrupt Map Info
   EArmObjMax
 } EARM_OBJECT_ID;
 
@@ -433,6 +435,14 @@ typedef struct CmArmPciConfigSpaceInfo {
 
   /// The end bus number
   UINT8   EndBusNumber;
+
+  /// Optional field: Reference Token for address mapping.
+  /// Token identifying a CM_ARM_OBJ_REF structure.
+  CM_OBJECT_TOKEN   AddressMapToken;
+
+  /// Optional field: Reference Token for interrupt mapping.
+  /// Token identifying a CM_ARM_OBJ_REF structure.
+  CM_OBJECT_TOKEN   InterruptMapToken;
 } CM_ARM_PCI_CONFIG_SPACE_INFO;
 
 /** A structure that describes the
@@ -666,6 +676,10 @@ typedef struct CmArmGenericInterrupt {
   UINT32    Interrupt;
 
   /// Flags
+  /// BIT0: 0: Interrupt is Level triggered
+  ///       1: Interrupt is Edge triggered
+  /// BIT1: 0: Interrupt is Active high
+  ///       1: Interrupt is Active low
   UINT32    Flags;
 } CM_ARM_GENERIC_INTERRUPT;
 
@@ -946,6 +960,70 @@ typedef struct CmArmLpiInfo {
   CHAR8                                   StateName[16];
 } CM_ARM_LPI_INFO;
 
+/** A structure that describes a PCI Address Map.
+
+  The memory-ranges used by the PCI bus are described by this object.
+
+  ID: EArmObjPciAddressMapInfo
+*/
+typedef struct CmArmPciAddressMapInfo {
+  /** Pci address space code
+
+  Available values are:
+   - 0: Configuration Space
+   - 1: I/O Space
+   - 2: 32-bit-address Memory Space
+   - 3: 64-bit-address Memory Space
+  */
+  UINT8                     SpaceCode;
+
+  /// PCI address
+  UINT64                    PciAddress;
+
+  /// Cpu address
+  UINT64                    CpuAddress;
+
+  /// Address size
+  UINT64                    AddressSize;
+} CM_ARM_PCI_ADDRESS_MAP_INFO;
+
+/** A structure that describes a PCI Interrupt Map.
+
+  The legacy PCI interrupts used by PCI devices are described by this object.
+
+  Cf Devicetree Specification - Release v0.3
+  s2.4.3 "Interrupt Nexus Properties"
+
+  ID: EArmObjPciInterruptMapInfo
+*/
+typedef struct CmArmPciInterruptMapInfo {
+  /// Pci Bus.
+  /// Value on 8 bits (max 255).
+  UINT8                       PciBus;
+
+  /// Pci Bus.
+  /// Value on 5 bits (max 31).
+  UINT8                       PciDevice;
+
+  /** PCI interrupt
+
+  ACPI bindings are used:
+  Cf. ACPI 6.4, s6.2.13 _PRT (PCI Routing Table):
+      "0-INTA, 1-INTB, 2-INTC, 3-INTD"
+
+  Device-tree bindings are shifted by 1:
+      "INTA=1, INTB=2, INTC=3, INTD=4"
+  */
+  UINT8                       PciInterrupt;
+
+  /** Interrupt controller interrupt.
+
+  Cf Devicetree Specification - Release v0.3
+  s2.4.3 "Interrupt Nexus Properties": "parent interrupt specifier"
+  */
+  CM_ARM_GENERIC_INTERRUPT    IntcInterrupt;
+} CM_ARM_PCI_INTERRUPT_MAP_INFO;
+
 #pragma pack()
 
 #endif // ARM_NAMESPACE_OBJECTS_H_
diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
index da5f5846edd9..0ba4e6e5faff 100644
--- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
+++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
@@ -152,7 +152,9 @@ STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
   {"BaseAddress", 8, "0x%llx", NULL},
   {"PciSegmentGroupNumber", 2, "0x%x", NULL},
   {"StartBusNumber", 1, "0x%x", NULL},
-  {"EndBusNumber", 1, "0x%x", NULL}
+  {"EndBusNumber", 1, "0x%x", NULL},
+  {"AddressMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL},
+  {"InterruptMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL},
 };
 
 /** A parser for EArmObjHypervisorVendorIdentity.
@@ -401,6 +403,26 @@ STATIC CONST CM_OBJ_PARSER CmArmLpiInfoParser[] = {
   {"StateName", 16, "0x%a", NULL},
 };
 
+/** A parser for EArmObjPciAddressMapInfo.
+*/
+STATIC CONST CM_OBJ_PARSER CmArmPciAddressMapInfoParser[] = {
+  {"SpaceCode", 1, "%d", NULL},
+  {"PciAddress", 8, "0x%llx", NULL},
+  {"CpuAddress", 8, "0x%llx", NULL},
+  {"AddressSize", 8, "0x%llx", NULL},
+};
+
+/** A parser for EArmObjPciInterruptMapInfo.
+*/
+STATIC CONST CM_OBJ_PARSER CmPciInterruptMapInfoParser[] = {
+  {"PciBus", 1, "0x%x", NULL},
+  {"PciDevice", 1, "0x%x", NULL},
+  {"PciInterrupt", 1, "0x%x", NULL},
+  {"IntcInterrupt", sizeof (CM_ARM_GENERIC_INTERRUPT),
+    NULL, NULL, CmArmGenericInterruptParser,
+    ARRAY_SIZE (CmArmGenericInterruptParser)},
+};
+
 /** A parser for Arm namespace objects.
 */
 STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
@@ -475,6 +497,10 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
     ARRAY_SIZE (CmArmCmn600InfoParser)},
   {"EArmObjLpiInfo", CmArmLpiInfoParser,
       ARRAY_SIZE (CmArmLpiInfoParser)},
+  {"EArmObjPciAddressMapInfo", CmArmPciAddressMapInfoParser,
+    ARRAY_SIZE (CmArmPciAddressMapInfoParser)},
+  {"EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,
+    ARRAY_SIZE (CmPciInterruptMapInfoParser)},
   {"EArmObjMax", NULL, 0},
 };
 
-- 
2.17.1



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Re: [edk2-devel] [PATCH v1 6/7] DynamicTablesPkg: Add Pci related objects
Posted by Sami Mujawar 4 years, 4 months ago 
Hi Pierre,

This patch looks good to me.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar


On 23/06/2021 12:58 PM, Pierre.Gondois@arm.com wrote:
> From: Pierre Gondois <Pierre.Gondois@arm.com>
>
> Introduce the following CmObj in the ArmNameSpaceObjects:
>   - CM_ARM_PCI_ADDRESS_MAP_INFO
>   - CM_ARM_PCI_INTERRUPT_MAP_INFO
>
> These objects allow to describe address range mapping
> of Pci busses and interrupt mapping of Pci devices.
>
> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
> ---
>   .../Include/ArmNameSpaceObjects.h             | 78 +++++++++++++++++++
>   .../ConfigurationManagerObjectParser.c        | 28 ++++++-
>   2 files changed, 105 insertions(+), 1 deletion(-)
>
> diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
> index 9c49091def59..b3779f828c17 100644
> --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
> +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
> @@ -59,6 +59,8 @@ typedef enum ArmObjectID {
>     EArmObjSerialPortInfo,               ///< 35 - Generic Serial Port Info
>     EArmObjCmn600Info,                   ///< 36 - CMN-600 Info
>     EArmObjLpiInfo,                      ///< 37 - Lpi Info
> +  EArmObjPciAddressMapInfo,            ///< 38 - Pci Address Map Info
> +  EArmObjPciInterruptMapInfo,          ///< 39 - Pci Interrupt Map Info
>     EArmObjMax
>   } EARM_OBJECT_ID;
>   
> @@ -433,6 +435,14 @@ typedef struct CmArmPciConfigSpaceInfo {
>   
>     /// The end bus number
>     UINT8   EndBusNumber;
> +
> +  /// Optional field: Reference Token for address mapping.
> +  /// Token identifying a CM_ARM_OBJ_REF structure.
> +  CM_OBJECT_TOKEN   AddressMapToken;
> +
> +  /// Optional field: Reference Token for interrupt mapping.
> +  /// Token identifying a CM_ARM_OBJ_REF structure.
> +  CM_OBJECT_TOKEN   InterruptMapToken;
>   } CM_ARM_PCI_CONFIG_SPACE_INFO;
>   
>   /** A structure that describes the
> @@ -666,6 +676,10 @@ typedef struct CmArmGenericInterrupt {
>     UINT32    Interrupt;
>   
>     /// Flags
> +  /// BIT0: 0: Interrupt is Level triggered
> +  ///       1: Interrupt is Edge triggered
> +  /// BIT1: 0: Interrupt is Active high
> +  ///       1: Interrupt is Active low
>     UINT32    Flags;
>   } CM_ARM_GENERIC_INTERRUPT;
>   
> @@ -946,6 +960,70 @@ typedef struct CmArmLpiInfo {
>     CHAR8                                   StateName[16];
>   } CM_ARM_LPI_INFO;
>   
> +/** A structure that describes a PCI Address Map.
> +
> +  The memory-ranges used by the PCI bus are described by this object.
> +
> +  ID: EArmObjPciAddressMapInfo
> +*/
> +typedef struct CmArmPciAddressMapInfo {
> +  /** Pci address space code
> +
> +  Available values are:
> +   - 0: Configuration Space
> +   - 1: I/O Space
> +   - 2: 32-bit-address Memory Space
> +   - 3: 64-bit-address Memory Space
> +  */
> +  UINT8                     SpaceCode;
> +
> +  /// PCI address
> +  UINT64                    PciAddress;
> +
> +  /// Cpu address
> +  UINT64                    CpuAddress;
> +
> +  /// Address size
> +  UINT64                    AddressSize;
> +} CM_ARM_PCI_ADDRESS_MAP_INFO;
> +
> +/** A structure that describes a PCI Interrupt Map.
> +
> +  The legacy PCI interrupts used by PCI devices are described by this object.
> +
> +  Cf Devicetree Specification - Release v0.3
> +  s2.4.3 "Interrupt Nexus Properties"
> +
> +  ID: EArmObjPciInterruptMapInfo
> +*/
> +typedef struct CmArmPciInterruptMapInfo {
> +  /// Pci Bus.
> +  /// Value on 8 bits (max 255).
> +  UINT8                       PciBus;
> +
> +  /// Pci Bus.
> +  /// Value on 5 bits (max 31).
> +  UINT8                       PciDevice;
> +
> +  /** PCI interrupt
> +
> +  ACPI bindings are used:
> +  Cf. ACPI 6.4, s6.2.13 _PRT (PCI Routing Table):
> +      "0-INTA, 1-INTB, 2-INTC, 3-INTD"
> +
> +  Device-tree bindings are shifted by 1:
> +      "INTA=1, INTB=2, INTC=3, INTD=4"
> +  */
> +  UINT8                       PciInterrupt;
> +
> +  /** Interrupt controller interrupt.
> +
> +  Cf Devicetree Specification - Release v0.3
> +  s2.4.3 "Interrupt Nexus Properties": "parent interrupt specifier"
> +  */
> +  CM_ARM_GENERIC_INTERRUPT    IntcInterrupt;
> +} CM_ARM_PCI_INTERRUPT_MAP_INFO;
> +
>   #pragma pack()
>   
>   #endif // ARM_NAMESPACE_OBJECTS_H_
> diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
> index da5f5846edd9..0ba4e6e5faff 100644
> --- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
> +++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
> @@ -152,7 +152,9 @@ STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
>     {"BaseAddress", 8, "0x%llx", NULL},
>     {"PciSegmentGroupNumber", 2, "0x%x", NULL},
>     {"StartBusNumber", 1, "0x%x", NULL},
> -  {"EndBusNumber", 1, "0x%x", NULL}
> +  {"EndBusNumber", 1, "0x%x", NULL},
> +  {"AddressMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL},
> +  {"InterruptMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL},
>   };
>   
>   /** A parser for EArmObjHypervisorVendorIdentity.
> @@ -401,6 +403,26 @@ STATIC CONST CM_OBJ_PARSER CmArmLpiInfoParser[] = {
>     {"StateName", 16, "0x%a", NULL},
>   };
>   
> +/** A parser for EArmObjPciAddressMapInfo.
> +*/
> +STATIC CONST CM_OBJ_PARSER CmArmPciAddressMapInfoParser[] = {
> +  {"SpaceCode", 1, "%d", NULL},
> +  {"PciAddress", 8, "0x%llx", NULL},
> +  {"CpuAddress", 8, "0x%llx", NULL},
> +  {"AddressSize", 8, "0x%llx", NULL},
> +};
> +
> +/** A parser for EArmObjPciInterruptMapInfo.
> +*/
> +STATIC CONST CM_OBJ_PARSER CmPciInterruptMapInfoParser[] = {
> +  {"PciBus", 1, "0x%x", NULL},
> +  {"PciDevice", 1, "0x%x", NULL},
> +  {"PciInterrupt", 1, "0x%x", NULL},
> +  {"IntcInterrupt", sizeof (CM_ARM_GENERIC_INTERRUPT),
> +    NULL, NULL, CmArmGenericInterruptParser,
> +    ARRAY_SIZE (CmArmGenericInterruptParser)},
> +};
> +
>   /** A parser for Arm namespace objects.
>   */
>   STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
> @@ -475,6 +497,10 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
>       ARRAY_SIZE (CmArmCmn600InfoParser)},
>     {"EArmObjLpiInfo", CmArmLpiInfoParser,
>         ARRAY_SIZE (CmArmLpiInfoParser)},
> +  {"EArmObjPciAddressMapInfo", CmArmPciAddressMapInfoParser,
> +    ARRAY_SIZE (CmArmPciAddressMapInfoParser)},
> +  {"EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,
> +    ARRAY_SIZE (CmPciInterruptMapInfoParser)},
>     {"EArmObjMax", NULL, 0},
>   };
>   



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