From: Tom Lendacky <thomas.lendacky@amd.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
The RMPADJUST instruction will be used by the SEV-SNP guest to modify the
RMP permissions for a guest page. See AMD APM volume 3 for further
details.
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
MdePkg/Library/BaseLib/BaseLib.inf | 1 +
MdePkg/Include/Library/BaseLib.h | 35 ++++++++++++++++++++
MdePkg/Include/X64/Nasm.inc | 8 +++++
MdePkg/Library/BaseLib/X64/RmpAdjust.nasm | 40 +++++++++++++++++++++++
4 files changed, 84 insertions(+)
create mode 100644 MdePkg/Library/BaseLib/X64/RmpAdjust.nasm
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 89a52f72c08a..6ccb8997b7e8 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -319,6 +319,7 @@ [Sources.X64]
X64/DisablePaging64.nasm
X64/Pvalidate.nasm
X64/RdRand.nasm
+ X64/RmpAdjust.nasm
X64/XGetBv.nasm
X64/XSetBv.nasm
X64/VmgExit.nasm
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index a2cd134bea9a..2452c1d92e51 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -4861,6 +4861,41 @@ AsmPvalidate (
IN BOOLEAN Validate,
IN PHYSICAL_ADDRESS Address
);
+
+//
+// RDX settings for RMPADJUST
+//
+#define RMPADJUST_VMPL_MAX 3
+#define RMPADJUST_VMPL_MASK 0xFF
+#define RMPADJUST_VMPL_SHIFT 0
+#define RMPADJUST_PERMISSION_MASK_MASK 0xFF
+#define RMPADJUST_PERMISSION_MASK_SHIFT 8
+#define RMPADJUST_VMSA_PAGE_BIT BIT16
+
+/**
+ Adjusts the permissions of an SEV-SNP guest page.
+
+ Executes a RMPADJUST instruction with the register state specified by Rax,
+ Rcx, and Rdx. Returns Eax. This function is only available on X64.
+
+ The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1.
+
+ @param[in] Rax The value to load into RAX before executing the RMPADJUST
+ instruction.
+ @param[in] Rcx The value to load into RCX before executing the RMPADJUST
+ instruction.
+ @param[in] Rdx The value to load into RDX before executing the RMPADJUST
+ instruction.
+
+ @return Eax
+**/
+UINT32
+EFIAPI
+AsmRmpAdjust (
+ IN UINT64 Rax,
+ IN UINT64 Rcx,
+ IN UINT64 Rdx
+ );
#endif
diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc
index 528bb3385609..cfb14edc9449 100644
--- a/MdePkg/Include/X64/Nasm.inc
+++ b/MdePkg/Include/X64/Nasm.inc
@@ -41,6 +41,14 @@
DB 0xF2, 0x0F, 0x01, 0xFF
%endmacro
+;
+; Macro for the RMPADJUST instruction, defined in AMD APM volume 3.
+; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392754
+;
+%macro RMPADJUST 0
+ DB 0xF3, 0x0F, 0x01, 0xFE
+%endmacro
+
; NASM provides built-in macros STRUC and ENDSTRUC for structure definition.
; For example, to define a structure called mytype containing a longword,
; a word, a byte and a string of bytes, you might code
diff --git a/MdePkg/Library/BaseLib/X64/RmpAdjust.nasm b/MdePkg/Library/BaseLib/X64/RmpAdjust.nasm
new file mode 100644
index 000000000000..c307f64b518a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/RmpAdjust.nasm
@@ -0,0 +1,40 @@
+;-----------------------------------------------------------------------------
+;
+; Copyright (c) 2021, Advanced Micro Devices, Inc. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+; RmpAdjust.Asm
+;
+; Abstract:
+;
+; AsmRmpAdjust function
+;
+; Notes:
+;
+;-----------------------------------------------------------------------------
+
+%include "Nasm.inc"
+
+ SECTION .text
+
+;-----------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmRmpAdjust (
+; IN UINT64 Rax,
+; IN UINT64 Rcx,
+; IN UINT64 Rdx
+; )
+;-----------------------------------------------------------------------------
+global ASM_PFX(AsmRmpAdjust)
+ASM_PFX(AsmRmpAdjust):
+ mov rax, rcx ; Input Rax is in RCX by calling convention
+ mov rcx, rdx ; Input Rcx is in RDX by calling convention
+ mov rdx, r8 ; Input Rdx is in R8 by calling convention
+
+ RMPADJUST
+
+ ; RMPADJUST returns the status in the EAX register.
+ ret
--
2.17.1
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On 05/19/21 20:19, Brijesh Singh wrote: > From: Tom Lendacky <thomas.lendacky@amd.com> > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 > > The RMPADJUST instruction will be used by the SEV-SNP guest to modify the > RMP permissions for a guest page. See AMD APM volume 3 for further > details. > > Cc: James Bottomley <jejb@linux.ibm.com> > Cc: Min Xu <min.m.xu@intel.com> > Cc: Jiewen Yao <jiewen.yao@intel.com> > Cc: Tom Lendacky <thomas.lendacky@amd.com> > Cc: Jordan Justen <jordan.l.justen@intel.com> > Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> > Cc: Laszlo Ersek <lersek@redhat.com> > Cc: Erdem Aktas <erdemaktas@google.com> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Liming Gao <gaoliming@byosoft.com.cn> > Cc: Zhiguang Liu <zhiguang.liu@intel.com> > Reviewed-by: Laszlo Ersek <lersek@redhat.com> > Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> > Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> > --- > MdePkg/Library/BaseLib/BaseLib.inf | 1 + > MdePkg/Include/Library/BaseLib.h | 35 ++++++++++++++++++++ > MdePkg/Include/X64/Nasm.inc | 8 +++++ > MdePkg/Library/BaseLib/X64/RmpAdjust.nasm | 40 +++++++++++++++++++++++ > 4 files changed, 84 insertions(+) > create mode 100644 MdePkg/Library/BaseLib/X64/RmpAdjust.nasm > > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf > index 89a52f72c08a..6ccb8997b7e8 100644 > --- a/MdePkg/Library/BaseLib/BaseLib.inf > +++ b/MdePkg/Library/BaseLib/BaseLib.inf > @@ -319,6 +319,7 @@ [Sources.X64] > X64/DisablePaging64.nasm > X64/Pvalidate.nasm > X64/RdRand.nasm > + X64/RmpAdjust.nasm > X64/XGetBv.nasm > X64/XSetBv.nasm > X64/VmgExit.nasm > diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h > index a2cd134bea9a..2452c1d92e51 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -4861,6 +4861,41 @@ AsmPvalidate ( > IN BOOLEAN Validate, > IN PHYSICAL_ADDRESS Address > ); > + > +// > +// RDX settings for RMPADJUST > +// > +#define RMPADJUST_VMPL_MAX 3 > +#define RMPADJUST_VMPL_MASK 0xFF > +#define RMPADJUST_VMPL_SHIFT 0 > +#define RMPADJUST_PERMISSION_MASK_MASK 0xFF > +#define RMPADJUST_PERMISSION_MASK_SHIFT 8 > +#define RMPADJUST_VMSA_PAGE_BIT BIT16 > + > +/** > + Adjusts the permissions of an SEV-SNP guest page. > + > + Executes a RMPADJUST instruction with the register state specified by Rax, > + Rcx, and Rdx. Returns Eax. This function is only available on X64. > + > + The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1. > + > + @param[in] Rax The value to load into RAX before executing the RMPADJUST > + instruction. > + @param[in] Rcx The value to load into RCX before executing the RMPADJUST > + instruction. > + @param[in] Rdx The value to load into RDX before executing the RMPADJUST > + instruction. > + > + @return Eax Thanks for fixing the Rax/Eax typo. Laszlo > +**/ > +UINT32 > +EFIAPI > +AsmRmpAdjust ( > + IN UINT64 Rax, > + IN UINT64 Rcx, > + IN UINT64 Rdx > + ); > #endif > > > diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc > index 528bb3385609..cfb14edc9449 100644 > --- a/MdePkg/Include/X64/Nasm.inc > +++ b/MdePkg/Include/X64/Nasm.inc > @@ -41,6 +41,14 @@ > DB 0xF2, 0x0F, 0x01, 0xFF > %endmacro > > +; > +; Macro for the RMPADJUST instruction, defined in AMD APM volume 3. > +; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392754 > +; > +%macro RMPADJUST 0 > + DB 0xF3, 0x0F, 0x01, 0xFE > +%endmacro > + > ; NASM provides built-in macros STRUC and ENDSTRUC for structure definition. > ; For example, to define a structure called mytype containing a longword, > ; a word, a byte and a string of bytes, you might code > diff --git a/MdePkg/Library/BaseLib/X64/RmpAdjust.nasm b/MdePkg/Library/BaseLib/X64/RmpAdjust.nasm > new file mode 100644 > index 000000000000..c307f64b518a > --- /dev/null > +++ b/MdePkg/Library/BaseLib/X64/RmpAdjust.nasm > @@ -0,0 +1,40 @@ > +;----------------------------------------------------------------------------- > +; > +; Copyright (c) 2021, Advanced Micro Devices, Inc. All rights reserved.<BR> > +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; RmpAdjust.Asm > +; > +; Abstract: > +; > +; AsmRmpAdjust function > +; > +; Notes: > +; > +;----------------------------------------------------------------------------- > + > +%include "Nasm.inc" > + > + SECTION .text > + > +;----------------------------------------------------------------------------- > +; UINT32 > +; EFIAPI > +; AsmRmpAdjust ( > +; IN UINT64 Rax, > +; IN UINT64 Rcx, > +; IN UINT64 Rdx > +; ) > +;----------------------------------------------------------------------------- > +global ASM_PFX(AsmRmpAdjust) > +ASM_PFX(AsmRmpAdjust): > + mov rax, rcx ; Input Rax is in RCX by calling convention > + mov rcx, rdx ; Input Rcx is in RDX by calling convention > + mov rdx, r8 ; Input Rdx is in R8 by calling convention > + > + RMPADJUST > + > + ; RMPADJUST returns the status in the EAX register. > + ret > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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>> +#define RMPADJUST_VMPL_MAX 3 Why is RMPADJUST_VMPL_MAX defined as 3? Is it not defined in bits [15:12] of CPUID Fn8000_001F[EBX]? -Erdem -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75833): https://edk2.groups.io/g/devel/message/75833 Mute This Topic: https://groups.io/mt/82943408/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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