Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 3 +-- Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-)
As per ACPI specification, only the head of the list needs to be
listed as a resources by a processore node, as cache node itself
contains a link to the next level of cache.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
---
Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 3 +--
Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index 89fadbcb03..7c949812ec 100644
--- a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -389,8 +389,7 @@ EDKII_COMMON_PLATFORM_REPOSITORY_INFO CommonPlatformInfo = {
// Resources private to each individual 'core instance in Cluster
{
{ REFERENCE_TOKEN (CacheInfo[1]) }, // -> 'core's L1 I-cache in Cluster
- { REFERENCE_TOKEN (CacheInfo[2]) }, // -> 'core's L1 D-cache in Cluster
- { REFERENCE_TOKEN (CacheInfo[3]) } // -> 'core's L2 cache in Cluster
+ { REFERENCE_TOKEN (CacheInfo[2]) } // -> 'core's L1 D-cache in Cluster
},
// Resources private to the SoC
diff --git a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
index fea4a0efd2..09ebc9a842 100644
--- a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
+++ b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
@@ -205,9 +205,8 @@ HandleCmObjectRefByToken (
/** The number of resources private to 'core instance
- L1 data cache
- L1 instruction cache
- - L2 cache
*/
-#define CORE_RESOURCE_COUNT 3
+#define CORE_RESOURCE_COUNT 2
/** The number of resources private to SoC
- slc cache
--
2.17.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#75381): https://edk2.groups.io/g/devel/message/75381
Mute This Topic: https://groups.io/mt/82936146/1787277
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org]
-=-=-=-=-=-=-=-=-=-=-=-
Pushed as 7bf73ecc3c47..442dfd5da647 Thanks. Regards, Sami Mujawar On 19/05/2021 02:34 PM, Chandni Cherukuri wrote: > As per ACPI specification, only the head of the list needs to be > listed as a resources by a processore node, as cache node itself > contains a link to the next level of cache. > > Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> > --- > Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 3 +-- > Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 3 +-- > 2 files changed, 2 insertions(+), 4 deletions(-) > > diff --git a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c > index 89fadbcb03..7c949812ec 100644 > --- a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c > +++ b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c > @@ -389,8 +389,7 @@ EDKII_COMMON_PLATFORM_REPOSITORY_INFO CommonPlatformInfo = { > // Resources private to each individual 'core instance in Cluster > { > { REFERENCE_TOKEN (CacheInfo[1]) }, // -> 'core's L1 I-cache in Cluster > - { REFERENCE_TOKEN (CacheInfo[2]) }, // -> 'core's L1 D-cache in Cluster > - { REFERENCE_TOKEN (CacheInfo[3]) } // -> 'core's L2 cache in Cluster > + { REFERENCE_TOKEN (CacheInfo[2]) } // -> 'core's L1 D-cache in Cluster > }, > > // Resources private to the SoC > diff --git a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h > index fea4a0efd2..09ebc9a842 100644 > --- a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h > +++ b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h > @@ -205,9 +205,8 @@ HandleCmObjectRefByToken ( > /** The number of resources private to 'core instance > - L1 data cache > - L1 instruction cache > - - L2 cache > */ > -#define CORE_RESOURCE_COUNT 3 > +#define CORE_RESOURCE_COUNT 2 > > /** The number of resources private to SoC > - slc cache -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76188): https://edk2.groups.io/g/devel/message/76188 Mute This Topic: https://groups.io/mt/82936146/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
Hi Chandni, I have built and verified this patch and it looks good to me. Reviewed-by: Chris Jones < christopher. jones @arm.com> Thanks, Chris -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76121): https://edk2.groups.io/g/devel/message/76121 Mute This Topic: https://groups.io/mt/82936146/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
© 2016 - 2024 Red Hat, Inc.