Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
From: Jason Lou <yun.lou@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334
There are following PCDs in IntelFsp2WrapperPkg for microcode location:
* IntelFsp2WrapperPkg:
PcdCpuMicrocodePatchAddress
PcdCpuMicrocodePatchRegionSize
PcdFlashMicrocodeOffset
The change simplify the platform code to use following PCDs instead:
* MinPlatformPkg
PcdFlashFvMicrocodeOffset
PcdFlashFvMicrocodeBase = $(BIOS_BASE) + PcdFlashFvMicrocodeOffset
PcdFlashFvMicrocodeSize
PcdMicrocodeOffsetInFv <NEW>
Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index 0f645ed63e..c1fd2be6af 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -47,14 +47,12 @@ SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = $(gSiPkgTokenSpaceGuid.PcdBio
SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize)
-SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdBiosSize
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
+SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
--
2.28.0.windows.1
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Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> > -----Original Message----- > From: Lou, Yun <yun.lou@intel.com> > Sent: Sunday, April 25, 2021 10:42 PM > To: devel@edk2.groups.io > Cc: Lou, Yun <yun.lou@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; > Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Zeng, Star > <star.zeng@intel.com>; Ni, Ray <ray.ni@intel.com> > Subject: [PATCH v1] Intel/TigerlakeOpenBoardPkg: Simplify microcode related > PCD usage > > From: Jason Lou <yun.lou@intel.com> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334 > > There are following PCDs in IntelFsp2WrapperPkg for microcode location: > > * IntelFsp2WrapperPkg: > PcdCpuMicrocodePatchAddress > PcdCpuMicrocodePatchRegionSize > PcdFlashMicrocodeOffset > > The change simplify the platform code to use following PCDs instead: > * MinPlatformPkg > PcdFlashFvMicrocodeOffset > PcdFlashFvMicrocodeBase = $(BIOS_BASE) + PcdFlashFvMicrocodeOffset > PcdFlashFvMicrocodeSize > PcdMicrocodeOffsetInFv <NEW> > > Signed-off-by: Jason Lou <yun.lou@intel.com> > Cc: Chasel Chiu <chasel.chiu@intel.com> > Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> > Cc: Star Zeng <star.zeng@intel.com> > Cc: Ray Ni <ray.ni@intel.com> > --- > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 4 > +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git > a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf > b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf > index 0f645ed63e..c1fd2be6af 100644 > --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf > +++ > b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf > @@ -47,14 +47,12 @@ SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = > $(gSiPkgTokenSpaceGuid.PcdBio > SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = > $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) > > SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = > $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + > $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset) > > SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = > $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - > $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset) > > -SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = > $(gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress) > > -SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = > $(gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize) > > -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = > $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset) > > SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = > gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress > > SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = > gSiPkgTokenSpaceGuid.PcdBiosSize > > SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = > $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + > $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset) > > SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = > $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + > $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset) > > SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = > $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + > $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset) > > +SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = > gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset > > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = > gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase > > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = > gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize > > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = > gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset > > -- > 2.28.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74410): https://edk2.groups.io/g/devel/message/74410 Mute This Topic: https://groups.io/mt/82355106/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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