AMD processor does not support MSR_IA32_MISC_ENABLE register.  Accessing
this register on AMD causes an unhandled exception in SmmEntry.nasm and
a subsequent failure to boot since this is too early in SMM path for the
exception handler to be loaded.

First, to distinguish between AMD and other processors, refactor
StandardSignatureIsAuthenticAMD into BaseUefiCpuLib.  So there is only
one copy in the source. All changed modules already include UefiCpuLib
either directly or indirectly so could not easly split first patch.

Second, Skip manipulation of MSR_IA32_MISC_ENABLE register if running
on an AMD processor.

Tested on AMD X64 processor.

Modified source patching in 2/2 for FALSE
and TRUE to test failure and passing case when AMD processor detected.
Did not have a way to test UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm.

Test BIOS used following components:
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
UefiCpuPkg/Library/MpInitLib/MpLib.c
UefiCpuPkg/PiSmmCpuDxeSmm in X64 mode

Garrett Kirkendall (2):
  UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib
  UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on
    AMD

 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf         |  7 ++++
 UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf             |  2 ++
 UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf |  2 ++
 UefiCpuPkg/Include/Library/UefiCpuLib.h                      | 14 ++++++++
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h               |  3 ++
 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c           | 38 ++++++++++++++++++++
 UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c               | 25 ++-----------
 UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c   | 25 ++-----------
 UefiCpuPkg/Library/MpInitLib/MpLib.c                         | 23 ------------
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c                       |  9 ++++-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm                 | 19 ++++++++--
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm                  | 20 +++++++++--
 12 files changed, 113 insertions(+), 74 deletions(-)
 create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c

Changes at:
https://github.com/gkirkendall-amd/edk2/tree/smmentry_nasm_skip_msr_xd_bit_on_amd

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>

-- 
2.27.0


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Hi Garrett,

On 06/15/20 20:30, Garrett Kirkendall wrote:
> AMD processor does not support MSR_IA32_MISC_ENABLE register.  Accessing
> this register on AMD causes an unhandled exception in SmmEntry.nasm and
> a subsequent failure to boot since this is too early in SMM path for the
> exception handler to be loaded.
> 
> First, to distinguish between AMD and other processors, refactor
> StandardSignatureIsAuthenticAMD into BaseUefiCpuLib.  So there is only
> one copy in the source. All changed modules already include UefiCpuLib
> either directly or indirectly so could not easly split first patch.
> 
> Second, Skip manipulation of MSR_IA32_MISC_ENABLE register if running
> on an AMD processor.
> 
> Tested on AMD X64 processor.
> 
> Modified source patching in 2/2 for FALSE
> and TRUE to test failure and passing case when AMD processor detected.
> Did not have a way to test UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm.

Please test the series as follows:

(1) Download

https://www.kraxel.org/repos/images/fedora-30-efi-systemd-i686.qcow2.xz
https://www.kraxel.org/repos/images/fedora-31-efi-grub2-x86_64.qcow2.xz

and decompress both files.


(2) Test using a 32-bit guest on an Intel host (standing in your edk2 tree, with the patches applied):

$ build -a IA32 -b DEBUG -p OvmfPkg/OvmfPkgIa32.dsc -t GCC5 -D SMM_REQUIRE

$ qemu-system-i386 \
    -cpu coreduo,-nx \
    -machine q35,smm=on,accel=kvm \
    -m 4096 \
    -smp 4 \
    -global driver=cfi.pflash01,property=secure,value=on \
    -drive if=pflash,format=raw,unit=0,readonly=on,file=Build/OvmfIa32/DEBUG_GCC5/FV/OVMF_CODE.fd \
    -drive if=pflash,format=raw,unit=1,snapshot=on,file=Build/OvmfIa32/DEBUG_GCC5/FV/OVMF_VARS.fd \
    -drive id=hdd,if=none,format=qcow2,snapshot=on,file=fedora-30-efi-systemd-i686.qcow2 \
    -device virtio-scsi-pci,id=scsi0 \
    -device scsi-hd,drive=hdd,bus=scsi0.0,bootindex=1

(Once you get a login prompt, feel free to interrupt QEMU with Ctrl-C.)


(3) Test using a 64-bit guest on an Intel host:

$ build -a IA32 -a X64 -b DEBUG -p OvmfPkg/OvmfPkgIa32X64.dsc -t GCC5 -D SMM_REQUIRE

$ qemu-system-x86_64 \
    -cpu host \
    -machine q35,smm=on,accel=kvm \
    -m 4096 \
    -smp 4 \
    -global driver=cfi.pflash01,property=secure,value=on \
    -drive if=pflash,format=raw,unit=0,readonly=on,file=Build/Ovmf3264/DEBUG_GCC5/FV/OVMF_CODE.fd \
    -drive if=pflash,format=raw,unit=1,snapshot=on,file=Build/Ovmf3264/DEBUG_GCC5/FV/OVMF_VARS.fd \
    -drive id=hdd,if=none,format=qcow2,snapshot=on,file=fedora-31-efi-grub2-x86_64.qcow2 \
    -device virtio-scsi-pci,id=scsi0 \
    -device scsi-hd,drive=hdd,bus=scsi0.0,bootindex=1


(4) Test using a 64-bit guest on an AMD host -- just repeat step (3) on an AMD host.

Thanks!
Laszlo


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