Enable RISC-V architecture for RISC-V EDK2 CI.

[edk2-devel] [PATCH v1 0/3] Enable RISC-V architecture for RISC-V EDK2 CI.

Posted by Abner Chang 4 years ago

Enable EDK2 CI test on RISC-V architecture.

BZ for entire RISC-V edk2 port,
https://bugzilla.tianocore.org/show_bug.cgi?id=2672

These commits are verified by below PR,
https://github.com/tianocore/edk2/pull/512

Abner Chang (3):
  BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.
  .azurepipelines: Add RISC-V architecture on RISC-V EDK2 CI.
  .pytool: Add RISC-V architecture on RISC-V EDK2 CI.

 .azurepipelines/Ubuntu-GCC5.yml               |  3 +-
 .pytool/CISettings.py                         |  9 ++++-
 .../Bin/gcc_riscv64_unknown_ext_dep.yaml      | 22 +++++++++++
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  | 38 +++++++++++++++++++
 4 files changed, 69 insertions(+), 3 deletions(-)
 create mode 100644 BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml

-- 
2.25.0


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Re: [edk2-devel] [PATCH v1 0/3] Enable RISC-V architecture for RISC-V EDK2 CI.

Posted by Sean via groups.io 4 years ago

Please run a a test PR with this patchset?  I would like to see how it impacts the build times.
Patche series look fine to me.

Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>

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Re: [edk2-devel] [PATCH v1 0/3] Enable RISC-V architecture for RISC-V EDK2 CI.

Posted by Abner Chang 4 years ago

Here is the test PR based on the latest edk2 master with this patch set.

Thanks for reviewing this.

From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Sean via groups.io
Sent: Saturday, April 25, 2020 11:36 AM
To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v1 0/3] Enable RISC-V architecture for RISC-V EDK2 CI.

Please run a a test PR with this patchset?  I would like to see how it impacts the build times.
Patche series look fine to me.

Reviewed-by: Sean Brogan <sean.brogan@microsoft.com<mailto:sean.brogan@microsoft.com>>

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