Try #2 using PCI config space of MCH to negotiate/lock SMRAM
at 0x30000.
CC: yingwen.chen@intel.com
CC: devel@edk2.groups.io
CC: phillip.goerl@oracle.com
CC: alex.williamson@redhat.com
CC: jiewen.yao@intel.com
CC: jun.nakajima@intel.com
CC: michael.d.kinney@intel.com
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Igor Mammedov (2):
q35: implement 128K SMRAM at default SMBASE address
tests: q35: MCH: add default SMBASE SMRAM lock test
include/hw/pci-host/q35.h | 10 ++++
hw/i386/pc.c | 4 +-
hw/pci-host/q35.c | 80 ++++++++++++++++++++++++++---
tests/q35-test.c | 105 ++++++++++++++++++++++++++++++++++++++
4 files changed, 191 insertions(+), 8 deletions(-)
--
2.18.1
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