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[edk2-devel] [Patch v2 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action in one function.

Dong, Eric posted 6 patches 6 years, 5 months ago
[edk2-devel] [Patch v2 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action in one function.
Posted by Dong, Eric 6 years, 5 months ago 
Signed-off-by: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 106 ++++++++++++++++++------------
 1 file changed, 63 insertions(+), 43 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index d8c6b19ead..b20992d5ab 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -159,6 +159,58 @@ S3WaitForSemaphore (
              ) != Value);
 }
 
+/**
+  Read / write CR value.
+
+  @param[in]      CrIndex         The CR index which need to read/write.
+  @param[in]      Read            Read or write. TRUE is read.
+  @param[in,out]  CrValue         CR value.
+
+  @retval    EFI_SUCCESS means read/write success, else return EFI_UNSUPPORTED.
+**/
+UINTN
+ReadWriteCr (
+  IN     UINT32       CrIndex,
+  IN     BOOLEAN      Read,
+  IN OUT UINTN        *CrValue
+  )
+{
+  switch (CrIndex) {
+  case 0:
+    if (Read) {
+      *CrValue = AsmReadCr0 ();
+    } else {
+      AsmWriteCr0 (*CrValue);
+    }
+    break;
+  case 2:
+    if (Read) {
+      *CrValue = AsmReadCr2 ();
+    } else {
+      AsmWriteCr2 (*CrValue);
+    }
+    break;
+  case 3:
+    if (Read) {
+      *CrValue = AsmReadCr3 ();
+    } else {
+      AsmWriteCr3 (*CrValue);
+    }
+    break;
+  case 4:
+    if (Read) {
+      *CrValue = AsmReadCr4 ();
+    } else {
+      AsmWriteCr4 (*CrValue);
+    }
+    break;
+  default:
+    return EFI_UNSUPPORTED;;
+  }
+
+  return EFI_SUCCESS;
+}
+
 /**
   Initialize the CPU registers from a register table.
 
@@ -188,6 +240,7 @@ ProgramProcessorRegister (
   UINTN                     ProcessorIndex;
   UINTN                     ValidThreadCount;
   UINT32                    *ValidCoreCountPerPackage;
+  EFI_STATUS                Status;
 
   //
   // Traverse Register Table of this logical processor
@@ -206,50 +259,17 @@ ProgramProcessorRegister (
     // The specified register is Control Register
     //
     case ControlRegister:
-      switch (RegisterTableEntry->Index) {
-      case 0:
-        Value = AsmReadCr0 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          (UINTN) RegisterTableEntry->Value
-                          );
-        AsmWriteCr0 (Value);
-        break;
-      case 2:
-        Value = AsmReadCr2 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          (UINTN) RegisterTableEntry->Value
-                          );
-        AsmWriteCr2 (Value);
-        break;
-      case 3:
-        Value = AsmReadCr3 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          (UINTN) RegisterTableEntry->Value
-                          );
-        AsmWriteCr3 (Value);
-        break;
-      case 4:
-        Value = AsmReadCr4 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          (UINTN) RegisterTableEntry->Value
-                          );
-        AsmWriteCr4 (Value);
-        break;
-      default:
-        break;
+      Status = ReadWriteCr (RegisterTableEntry->Index, TRUE, &Value);
+      if (EFI_ERROR (Status)) {
+        continue;
       }
+      Value = (UINTN) BitFieldWrite64 (
+                        Value,
+                        RegisterTableEntry->ValidBitStart,
+                        RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
+                        RegisterTableEntry->Value
+                        );
+      ReadWriteCr (RegisterTableEntry->Index, FALSE, &Value);
       break;
     //
     // The specified register is Model Specific Register
-- 
2.21.0.windows.1


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Re: [edk2-devel] [Patch v2 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action in one function.
Posted by Laszlo Ersek 6 years, 5 months ago 
On 08/12/19 12:31, Eric Dong wrote:
> Signed-off-by: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 106 ++++++++++++++++++------------
>  1 file changed, 63 insertions(+), 43 deletions(-)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
> index d8c6b19ead..b20992d5ab 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
> @@ -159,6 +159,58 @@ S3WaitForSemaphore (
>               ) != Value);
>  }
>  
> +/**
> +  Read / write CR value.
> +
> +  @param[in]      CrIndex         The CR index which need to read/write.
> +  @param[in]      Read            Read or write. TRUE is read.
> +  @param[in,out]  CrValue         CR value.
> +
> +  @retval    EFI_SUCCESS means read/write success, else return EFI_UNSUPPORTED.
> +**/
> +UINTN
> +ReadWriteCr (
> +  IN     UINT32       CrIndex,
> +  IN     BOOLEAN      Read,
> +  IN OUT UINTN        *CrValue
> +  )
> +{
> +  switch (CrIndex) {
> +  case 0:
> +    if (Read) {
> +      *CrValue = AsmReadCr0 ();
> +    } else {
> +      AsmWriteCr0 (*CrValue);
> +    }
> +    break;
> +  case 2:
> +    if (Read) {
> +      *CrValue = AsmReadCr2 ();
> +    } else {
> +      AsmWriteCr2 (*CrValue);
> +    }
> +    break;
> +  case 3:
> +    if (Read) {
> +      *CrValue = AsmReadCr3 ();
> +    } else {
> +      AsmWriteCr3 (*CrValue);
> +    }
> +    break;
> +  case 4:
> +    if (Read) {
> +      *CrValue = AsmReadCr4 ();
> +    } else {
> +      AsmWriteCr4 (*CrValue);
> +    }
> +    break;
> +  default:
> +    return EFI_UNSUPPORTED;;
> +  }
> +
> +  return EFI_SUCCESS;
> +}
> +
>  /**
>    Initialize the CPU registers from a register table.
>  
> @@ -188,6 +240,7 @@ ProgramProcessorRegister (
>    UINTN                     ProcessorIndex;
>    UINTN                     ValidThreadCount;
>    UINT32                    *ValidCoreCountPerPackage;
> +  EFI_STATUS                Status;
>  
>    //
>    // Traverse Register Table of this logical processor
> @@ -206,50 +259,17 @@ ProgramProcessorRegister (
>      // The specified register is Control Register
>      //
>      case ControlRegister:
> -      switch (RegisterTableEntry->Index) {
> -      case 0:
> -        Value = AsmReadCr0 ();
> -        Value = (UINTN) BitFieldWrite64 (
> -                          Value,
> -                          RegisterTableEntry->ValidBitStart,
> -                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
> -                          (UINTN) RegisterTableEntry->Value
> -                          );
> -        AsmWriteCr0 (Value);
> -        break;
> -      case 2:
> -        Value = AsmReadCr2 ();
> -        Value = (UINTN) BitFieldWrite64 (
> -                          Value,
> -                          RegisterTableEntry->ValidBitStart,
> -                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
> -                          (UINTN) RegisterTableEntry->Value
> -                          );
> -        AsmWriteCr2 (Value);
> -        break;
> -      case 3:
> -        Value = AsmReadCr3 ();
> -        Value = (UINTN) BitFieldWrite64 (
> -                          Value,
> -                          RegisterTableEntry->ValidBitStart,
> -                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
> -                          (UINTN) RegisterTableEntry->Value
> -                          );
> -        AsmWriteCr3 (Value);
> -        break;
> -      case 4:
> -        Value = AsmReadCr4 ();
> -        Value = (UINTN) BitFieldWrite64 (
> -                          Value,
> -                          RegisterTableEntry->ValidBitStart,
> -                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
> -                          (UINTN) RegisterTableEntry->Value
> -                          );
> -        AsmWriteCr4 (Value);
> -        break;
> -      default:
> -        break;
> +      Status = ReadWriteCr (RegisterTableEntry->Index, TRUE, &Value);
> +      if (EFI_ERROR (Status)) {
> +        continue;
>        }
> +      Value = (UINTN) BitFieldWrite64 (
> +                        Value,
> +                        RegisterTableEntry->ValidBitStart,
> +                        RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
> +                        RegisterTableEntry->Value
> +                        );
> +      ReadWriteCr (RegisterTableEntry->Index, FALSE, &Value);
>        break;
>      //
>      // The specified register is Model Specific Register
> 

Using a "break" rather than a "continue" would be more consistent with
the current code, and it would have the same effect. But, there's no
need to repost just because of that.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>

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