REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1483
Due to the limited resource on the VTd DMA buffer size in the PEI phase,
the driver will limit the maximum transfer block number for 48-bit
addressing.
According to PCDs:
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000
The default buffer size allocated for IOMMU mapping is:
* 4M bytes for non-S3 cases;
* 2M bytes for S3
For ATA devices in 48-bit address mode, the maximum block number is
currently set to 0xFFFF. For a device with block size equal to 512 bytes,
the maximum buffer allowed for mapping within AhciPei driver will be close
to 32M bytes. Thus, this commit will limit the 48-bit mode maximum block
number to 0x800, which means 1M-byte maximum buffer for mapping when the
block size of a device is 512 bytes. By doing so, potential failure on
calls to the IOMMU 'Map' service can be avoided.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
index a83c213a47..11754b3057 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
@@ -48,7 +48,13 @@ UINT8 mAtaTrustCommands[2] = {
// Look up table (Lba48Bit) for maximum transfer block number
//
#define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
-#define MAX_48BIT_TRANSFER_BLOCK_NUM 0xFFFF
+//
+// Due to limited resource for VTd PEI DMA buffer on platforms, the driver
+// limits the maximum transfer block number for 48-bit addressing.
+// Here, setting to 0x800 means that for device with 512-byte block size, the
+// maximum buffer for DMA mapping will be 1M bytes in size.
+//
+#define MAX_48BIT_TRANSFER_BLOCK_NUM 0x800
UINT32 mMaxTransferBlockNumber[2] = {
MAX_28BIT_TRANSFER_BLOCK_NUM,
--
2.12.0.windows.1
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Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Wu, Hao A
> Sent: Tuesday, April 23, 2019 1:06 AM
> To: devel@edk2.groups.io
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray <ray.ni@intel.com>; Dong,
> Eric <eric.dong@intel.com>; Wang, Jian J <jian.j.wang@intel.com>
> Subject: [edk2-devel] [PATCH v3 1/2] MdeModulePkg/AhciPei: Limit max
> transfer blocknum for 48-bit address
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1483
>
> Due to the limited resource on the VTd DMA buffer size in the PEI phase, the
> driver will limit the maximum transfer block number for 48-bit addressing.
>
> According to PCDs:
> gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000
> gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000
>
> The default buffer size allocated for IOMMU mapping is:
> * 4M bytes for non-S3 cases;
> * 2M bytes for S3
>
> For ATA devices in 48-bit address mode, the maximum block number is
> currently set to 0xFFFF. For a device with block size equal to 512 bytes, the
> maximum buffer allowed for mapping within AhciPei driver will be close to
> 32M bytes. Thus, this commit will limit the 48-bit mode maximum block
> number to 0x800, which means 1M-byte maximum buffer for mapping when
> the block size of a device is 512 bytes. By doing so, potential failure on calls
> to the IOMMU 'Map' service can be avoided.
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
> b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
> index a83c213a47..11754b3057 100644
> --- a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
> +++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
> @@ -48,7 +48,13 @@ UINT8 mAtaTrustCommands[2] = { // Look up table
> (Lba48Bit) for maximum transfer block number //
> #define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
> -#define MAX_48BIT_TRANSFER_BLOCK_NUM 0xFFFF
> +//
> +// Due to limited resource for VTd PEI DMA buffer on platforms, the
> +driver // limits the maximum transfer block number for 48-bit addressing.
> +// Here, setting to 0x800 means that for device with 512-byte block
> +size, the // maximum buffer for DMA mapping will be 1M bytes in size.
> +//
> +#define MAX_48BIT_TRANSFER_BLOCK_NUM 0x800
>
> UINT32 mMaxTransferBlockNumber[2] = {
> MAX_28BIT_TRANSFER_BLOCK_NUM,
> --
> 2.12.0.windows.1
>
>
>
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