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[edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmd

Hao Wu posted 1 patch 6 years, 9 months ago
Failed in applying to current master (apply log)
MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
[edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmd
Posted by Hao Wu 6 years, 9 months ago 
Within function NvmExpressPassThru():

The data buffer for the below 2 Admin command:
Create I/O Completion Queue command (Opcode 01h)
Create I/O Submission Queue command (Opcode 05h)

are not mapped to the PCI controller specific addresses.

But the current code logic also prevents the below NVM command:
Write (Opcode 01h)

from mapping its data buffer.

Hence, this commit refine the logics to resolve this issue.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
index 7356c1d673..302cfdcd8d 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
@@ -3,7 +3,7 @@
   NVM Express specification.
 
   (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
-  Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -593,7 +593,8 @@ NvmExpressPassThru (
   // these two cmds are special which requires their data buffer must support simultaneous access by both the
   // processor and a PCI Bus Master. It's caller's responsbility to ensure this.
   //
-  if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc != NVME_ADMIN_CRIOCQ_CMD) && (Sq->Opc != NVME_ADMIN_CRIOSQ_CMD)) {
+  if (((Sq->Opc & (BIT0 | BIT1)) != 0) &&
+      !((Packet->QueueType == NVME_ADMIN_QUEUE) && ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD)))) {
     if ((Packet->TransferLength == 0) || (Packet->TransferBuffer == NULL)) {
       return EFI_INVALID_PARAMETER;
     }
-- 
2.12.0.windows.1

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Re: [edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmd
Posted by Zeng, Star 6 years, 9 months ago 
Reviewed-by: Star Zeng <star.zeng@intel.com>

Is it ok to do more test, for example with SCT?


Thanks,
Star
-----Original Message-----
From: Wu, Hao A 
Sent: Tuesday, January 23, 2018 1:04 PM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A <hao.a.wu@intel.com>; Zeng, Star <star.zeng@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com>; Tian, Feng <feng.tian@intel.com>
Subject: [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmd

Within function NvmExpressPassThru():

The data buffer for the below 2 Admin command:
Create I/O Completion Queue command (Opcode 01h) Create I/O Submission Queue command (Opcode 05h)

are not mapped to the PCI controller specific addresses.

But the current code logic also prevents the below NVM command:
Write (Opcode 01h)

from mapping its data buffer.

Hence, this commit refine the logics to resolve this issue.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
index 7356c1d673..302cfdcd8d 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
@@ -3,7 +3,7 @@
   NVM Express specification.
 
   (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
-  Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2013 - 2018, Intel Corporation. All rights 
+ reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at @@ -593,7 +593,8 @@ NvmExpressPassThru (
   // these two cmds are special which requires their data buffer must support simultaneous access by both the
   // processor and a PCI Bus Master. It's caller's responsbility to ensure this.
   //
-  if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc != NVME_ADMIN_CRIOCQ_CMD) && (Sq->Opc != NVME_ADMIN_CRIOSQ_CMD)) {
+  if (((Sq->Opc & (BIT0 | BIT1)) != 0) &&
+      !((Packet->QueueType == NVME_ADMIN_QUEUE) && ((Sq->Opc == 
+ NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD)))) {
     if ((Packet->TransferLength == 0) || (Packet->TransferBuffer == NULL)) {
       return EFI_INVALID_PARAMETER;
     }
--
2.12.0.windows.1

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edk2-devel mailing list
edk2-devel@lists.01.org
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Re: [edk2] [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmd
Posted by Wu, Hao A 6 years, 9 months ago 
Sure, I will perform the sct test and make sure there's no failure before
pushing this change.


Best Regards,
Hao Wu


> -----Original Message-----
> From: Zeng, Star
> Sent: Tuesday, January 23, 2018 3:50 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu; Tian, Feng; Zeng, Star
> Subject: RE: [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not
> mapped for Write cmd
> 
> Reviewed-by: Star Zeng <star.zeng@intel.com>
> 
> Is it ok to do more test, for example with SCT?
> 
> 
> Thanks,
> Star
> -----Original Message-----
> From: Wu, Hao A
> Sent: Tuesday, January 23, 2018 1:04 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Zeng, Star <star.zeng@intel.com>; Ni,
> Ruiyu <ruiyu.ni@intel.com>; Tian, Feng <feng.tian@intel.com>
> Subject: [PATCH] MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped
> for Write cmd
> 
> Within function NvmExpressPassThru():
> 
> The data buffer for the below 2 Admin command:
> Create I/O Completion Queue command (Opcode 01h) Create I/O Submission
> Queue command (Opcode 05h)
> 
> are not mapped to the PCI controller specific addresses.
> 
> But the current code logic also prevents the below NVM command:
> Write (Opcode 01h)
> 
> from mapping its data buffer.
> 
> Hence, this commit refine the logics to resolve this issue.
> 
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: Feng Tian <feng.tian@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> index 7356c1d673..302cfdcd8d 100644
> --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> @@ -3,7 +3,7 @@
>    NVM Express specification.
> 
>    (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
> -  Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
> +  Copyright (c) 2013 - 2018, Intel Corporation. All rights
> + reserved.<BR>
>    This program and the accompanying materials
>    are licensed and made available under the terms and conditions of the BSD
> License
>    which accompanies this distribution.  The full text of the license may be found
> at @@ -593,7 +593,8 @@ NvmExpressPassThru (
>    // these two cmds are special which requires their data buffer must support
> simultaneous access by both the
>    // processor and a PCI Bus Master. It's caller's responsbility to ensure this.
>    //
> -  if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc !=
> NVME_ADMIN_CRIOCQ_CMD) && (Sq->Opc != NVME_ADMIN_CRIOSQ_CMD))
> {
> +  if (((Sq->Opc & (BIT0 | BIT1)) != 0) &&
> +      !((Packet->QueueType == NVME_ADMIN_QUEUE) && ((Sq->Opc ==
> + NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc ==
> NVME_ADMIN_CRIOSQ_CMD)))) {
>      if ((Packet->TransferLength == 0) || (Packet->TransferBuffer == NULL)) {
>        return EFI_INVALID_PARAMETER;
>      }
> --
> 2.12.0.windows.1

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