Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
---
.../IncompatiblePciDeviceSupport.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c b/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c
index b6ff128..dbd4c56 100644
--- a/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c
+++ b/OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c
@@ -4,6 +4,7 @@
is not present), conserving 32-bit MMIO aperture for 32-bit BARs.
Copyright (C) 2016, Red Hat, Inc.
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
@@ -66,19 +67,19 @@ STATIC CONST MMIO64_PREFERENCE mConfiguration = {
)
),
ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
- PCI_ACPI_UNUSED, // GenFlag
- PCI_ACPI_UNUSED, // SpecificFlag
+ 0, // GenFlag
+ 0, // SpecificFlag
64, // AddrSpaceGranularity:
// aperture selection hint
// for BAR allocation
- PCI_ACPI_UNUSED, // AddrRangeMin
- PCI_BAR_OLD_ALIGN, // AddrRangeMax:
+ 0, // AddrRangeMin
+ 0, // AddrRangeMax:
// no special alignment
// for affected BARs
- PCI_BAR_ALL, // AddrTranslationOffset:
+ (UINT64)-1, // AddrTranslationOffset:
// hint covers all
// eligible BARs
- PCI_BAR_NOCHANGE // AddrLen:
+ 0 // AddrLen:
// use probed BAR size
},
//
--
2.9.0.windows.1
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