Update SmBios header file to conform with SMBIOS v3.3.0.
The major update is to add definitions of SMBIOS Type 44h record.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
MdePkg/Include/IndustryStandard/SmBios.h | 74 +++++++++++++++++++++++++++++++-
1 file changed, 72 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index f3b6f18..a744d06 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -3,6 +3,7 @@
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
+(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
//
-// SMBIOS type macros which is according to SMBIOS 2.7 specification.
+// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
//
#define SMBIOS_TYPE_BIOS_INFORMATION 0
#define SMBIOS_TYPE_SYSTEM_INFORMATION 1
@@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
#define SMBIOS_TYPE_TPM_DEVICE 43
+#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
///
/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
@@ -727,7 +729,10 @@ typedef enum {
ProcessorFamilyMII = 0x012E,
ProcessorFamilyWinChip = 0x0140,
ProcessorFamilyDSP = 0x015E,
- ProcessorFamilyVideoProcessor = 0x01F4
+ ProcessorFamilyVideoProcessor = 0x01F4,
+ ProcessorFamilyRiscvRV32 = 0x0200, ///< SMBIOS spec 3.3.0 added
+ ProcessorFamilyRiscVRV64 = 0x0201, ///< SMBIOS spec 3.3.0 added
+ ProcessorFamilyRiscVRV128 = 0x0202 ///< SMBIOS spec 3.3.0 added
} PROCESSOR_FAMILY2_DATA;
///
@@ -857,6 +862,19 @@ typedef struct {
} PROCESSOR_FEATURE_FLAGS;
typedef struct {
+ UINT32 ProcessorReserved1 :1;
+ UINT32 ProcessorUnknown :1;
+ UINT32 Processor64BitCapble :1;
+ UINT32 ProcessorMultiCore :1;
+ UINT32 ProcessorHardwareThread :1;
+ UINT32 ProcessorExecuteProtection :1;
+ UINT32 ProcessorEnhancedVirtulization :1;
+ UINT32 ProcessorPowerPerformanceCtrl :1;
+ UINT32 Processor128bitCapble :1;
+ UINT32 ProcessorReserved2 :7;
+} PROCESSOR_CHARACTERISTIC_FLAGS;
+
+typedef struct {
PROCESSOR_SIGNATURE Signature;
PROCESSOR_FEATURE_FLAGS FeatureFlags;
} PROCESSOR_ID_DATA;
@@ -2508,6 +2526,57 @@ typedef struct {
UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
} SMBIOS_TABLE_TYPE42;
+
+///
+/// Processor Specific Block - Processor Architecture Type
+///
+typedef enum{
+ ProcessorSpecificBlockArchTypeReserved = 0x00,
+ ProcessorSpecificBlockArchTypeIa32 = 0x01,
+ ProcessorSpecificBlockArchTypeX64 = 0x02,
+ ProcessorSpecificBlockArchTypeItanium = 0x03,
+ ProcessorSpecificBlockArchTypeAarch32 = 0x04,
+ ProcessorSpecificBlockArchTypeAarch64 = 0x05,
+ ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
+ ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
+ ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08
+} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
+
+///
+/// Processor Specific Block is the standard container of processor-specific data.
+///
+typedef struct {
+ UINT8 Length;
+ UINT8 ProcessorArchType;
+ ///
+ /// Below followed by Processor-specific data
+ ///
+ ///
+} PROCESSOR_SPECIFIC_BLOCK;
+
+///
+/// Processor Additional Information(Type 44).
+///
+/// The information in this structure defines the processor additional information in case
+/// SMBIOS type 4 is not sufficient to describe processor characteristics.
+/// The SMBIOS type 44 structure has a reference handle field to link back to the related
+/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the
+/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,
+/// SMBIOS type 44 structures describe different core-specific information.
+///
+/// SMBIOS type 44 defines the standard header for the processor-specific block, while the
+/// contents of processor-specific data are maintained by processor
+/// architecture workgroups or vendors in separate documents.
+///
+typedef struct {
+ SMBIOS_STRUCTURE Hdr;
+ SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4
+ ///
+ /// Below followed by Processor-specific block
+ ///
+ PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
+} SMBIOS_TABLE_TYPE44;
+
///
/// TPM Device (Type 43).
///
@@ -2586,6 +2655,7 @@ typedef union {
SMBIOS_TABLE_TYPE41 *Type41;
SMBIOS_TABLE_TYPE42 *Type42;
SMBIOS_TABLE_TYPE43 *Type43;
+ SMBIOS_TABLE_TYPE44 *Type44;
SMBIOS_TABLE_TYPE126 *Type126;
SMBIOS_TABLE_TYPE127 *Type127;
UINT8 *Raw;
--
2.7.4
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On Wed, Sep 04, 2019 at 06:43:08PM +0800, Abner Chang wrote:
> Update SmBios header file to conform with SMBIOS v3.3.0.
> The major update is to add definitions of SMBIOS Type 44h record.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
This would be really useful to get straight into edk2 - could you
submit it straight for inclusion in edk2 master? We can then
cherry-pick that back to the edk2-staging branch.
/
Leif
> ---
> MdePkg/Include/IndustryStandard/SmBios.h | 74 +++++++++++++++++++++++++++++++-
> 1 file changed, 72 insertions(+), 2 deletions(-)
>
> diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
> index f3b6f18..a744d06 100644
> --- a/MdePkg/Include/IndustryStandard/SmBios.h
> +++ b/MdePkg/Include/IndustryStandard/SmBios.h
> @@ -3,6 +3,7 @@
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
> +(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
>
> //
> -// SMBIOS type macros which is according to SMBIOS 2.7 specification.
> +// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
> //
> #define SMBIOS_TYPE_BIOS_INFORMATION 0
> #define SMBIOS_TYPE_SYSTEM_INFORMATION 1
> @@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
> #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
> #define SMBIOS_TYPE_TPM_DEVICE 43
> +#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
>
> ///
> /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
> @@ -727,7 +729,10 @@ typedef enum {
> ProcessorFamilyMII = 0x012E,
> ProcessorFamilyWinChip = 0x0140,
> ProcessorFamilyDSP = 0x015E,
> - ProcessorFamilyVideoProcessor = 0x01F4
> + ProcessorFamilyVideoProcessor = 0x01F4,
> + ProcessorFamilyRiscvRV32 = 0x0200, ///< SMBIOS spec 3.3.0 added
> + ProcessorFamilyRiscVRV64 = 0x0201, ///< SMBIOS spec 3.3.0 added
> + ProcessorFamilyRiscVRV128 = 0x0202 ///< SMBIOS spec 3.3.0 added
> } PROCESSOR_FAMILY2_DATA;
>
> ///
> @@ -857,6 +862,19 @@ typedef struct {
> } PROCESSOR_FEATURE_FLAGS;
>
> typedef struct {
> + UINT32 ProcessorReserved1 :1;
> + UINT32 ProcessorUnknown :1;
> + UINT32 Processor64BitCapble :1;
> + UINT32 ProcessorMultiCore :1;
> + UINT32 ProcessorHardwareThread :1;
> + UINT32 ProcessorExecuteProtection :1;
> + UINT32 ProcessorEnhancedVirtulization :1;
> + UINT32 ProcessorPowerPerformanceCtrl :1;
> + UINT32 Processor128bitCapble :1;
> + UINT32 ProcessorReserved2 :7;
> +} PROCESSOR_CHARACTERISTIC_FLAGS;
> +
> +typedef struct {
> PROCESSOR_SIGNATURE Signature;
> PROCESSOR_FEATURE_FLAGS FeatureFlags;
> } PROCESSOR_ID_DATA;
> @@ -2508,6 +2526,57 @@ typedef struct {
> UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
> } SMBIOS_TABLE_TYPE42;
>
> +
> +///
> +/// Processor Specific Block - Processor Architecture Type
> +///
> +typedef enum{
> + ProcessorSpecificBlockArchTypeReserved = 0x00,
> + ProcessorSpecificBlockArchTypeIa32 = 0x01,
> + ProcessorSpecificBlockArchTypeX64 = 0x02,
> + ProcessorSpecificBlockArchTypeItanium = 0x03,
> + ProcessorSpecificBlockArchTypeAarch32 = 0x04,
> + ProcessorSpecificBlockArchTypeAarch64 = 0x05,
> + ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
> + ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
> + ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08
> +} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
> +
> +///
> +/// Processor Specific Block is the standard container of processor-specific data.
> +///
> +typedef struct {
> + UINT8 Length;
> + UINT8 ProcessorArchType;
> + ///
> + /// Below followed by Processor-specific data
> + ///
> + ///
> +} PROCESSOR_SPECIFIC_BLOCK;
> +
> +///
> +/// Processor Additional Information(Type 44).
> +///
> +/// The information in this structure defines the processor additional information in case
> +/// SMBIOS type 4 is not sufficient to describe processor characteristics.
> +/// The SMBIOS type 44 structure has a reference handle field to link back to the related
> +/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the
> +/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,
> +/// SMBIOS type 44 structures describe different core-specific information.
> +///
> +/// SMBIOS type 44 defines the standard header for the processor-specific block, while the
> +/// contents of processor-specific data are maintained by processor
> +/// architecture workgroups or vendors in separate documents.
> +///
> +typedef struct {
> + SMBIOS_STRUCTURE Hdr;
> + SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4
> + ///
> + /// Below followed by Processor-specific block
> + ///
> + PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
> +} SMBIOS_TABLE_TYPE44;
> +
> ///
> /// TPM Device (Type 43).
> ///
> @@ -2586,6 +2655,7 @@ typedef union {
> SMBIOS_TABLE_TYPE41 *Type41;
> SMBIOS_TABLE_TYPE42 *Type42;
> SMBIOS_TABLE_TYPE43 *Type43;
> + SMBIOS_TABLE_TYPE44 *Type44;
> SMBIOS_TABLE_TYPE126 *Type126;
> SMBIOS_TABLE_TYPE127 *Type127;
> UINT8 *Raw;
> --
> 2.7.4
>
>
>
>
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> -----Original Message-----
> From: Leif Lindholm [mailto:leif.lindholm@linaro.org]
> Sent: Friday, September 6, 2019 12:17 AM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>
> Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v1 13/22]:
> MdePkg/Include: Update SmBios header file.
>
> On Wed, Sep 04, 2019 at 06:43:08PM +0800, Abner Chang wrote:
> > Update SmBios header file to conform with SMBIOS v3.3.0.
> > The major update is to add definitions of SMBIOS Type 44h record.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.0
> > Signed-off-by: Abner Chang <abner.chang@hpe.com>
>
> This would be really useful to get straight into edk2 - could you submit it
> straight for inclusion in edk2 master? We can then cherry-pick that back to
> the edk2-staging branch.
Forgive me that I don't want to increase the complexity to RISC-V edk2 submittal. We can send SMBIOS patch apart from RISC-V patches with specific subject for SMBIOS change.
>
> /
> Leif
>
> > ---
> > MdePkg/Include/IndustryStandard/SmBios.h | 74
> > +++++++++++++++++++++++++++++++-
> > 1 file changed, 72 insertions(+), 2 deletions(-)
> >
> > diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
> > b/MdePkg/Include/IndustryStandard/SmBios.h
> > index f3b6f18..a744d06 100644
> > --- a/MdePkg/Include/IndustryStandard/SmBios.h
> > +++ b/MdePkg/Include/IndustryStandard/SmBios.h
> > @@ -3,6 +3,7 @@
> >
> > Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > reserved.<BR>
> > (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
> > +(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development
> > +LP<BR>
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > **/
> > @@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
> >
> > //
> > -// SMBIOS type macros which is according to SMBIOS 2.7 specification.
> > +// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
> > //
> > #define SMBIOS_TYPE_BIOS_INFORMATION 0
> > #define SMBIOS_TYPE_SYSTEM_INFORMATION 1
> > @@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
> #define
> > SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
> > #define SMBIOS_TYPE_TPM_DEVICE 43
> > +#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
> >
> > ///
> > /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6,
> chapter 3.3.43.
> > @@ -727,7 +729,10 @@ typedef enum {
> > ProcessorFamilyMII = 0x012E,
> > ProcessorFamilyWinChip = 0x0140,
> > ProcessorFamilyDSP = 0x015E,
> > - ProcessorFamilyVideoProcessor = 0x01F4
> > + ProcessorFamilyVideoProcessor = 0x01F4,
> > + ProcessorFamilyRiscvRV32 = 0x0200, ///< SMBIOS spec 3.3.0 added
> > + ProcessorFamilyRiscVRV64 = 0x0201, ///< SMBIOS spec 3.3.0
> added
> > + ProcessorFamilyRiscVRV128 = 0x0202 ///< SMBIOS spec 3.3.0
> added
> > } PROCESSOR_FAMILY2_DATA;
> >
> > ///
> > @@ -857,6 +862,19 @@ typedef struct {
> > } PROCESSOR_FEATURE_FLAGS;
> >
> > typedef struct {
> > + UINT32 ProcessorReserved1 :1;
> > + UINT32 ProcessorUnknown :1;
> > + UINT32 Processor64BitCapble :1;
> > + UINT32 ProcessorMultiCore :1;
> > + UINT32 ProcessorHardwareThread :1;
> > + UINT32 ProcessorExecuteProtection :1;
> > + UINT32 ProcessorEnhancedVirtulization :1;
> > + UINT32 ProcessorPowerPerformanceCtrl :1;
> > + UINT32 Processor128bitCapble :1;
> > + UINT32 ProcessorReserved2 :7;
> > +} PROCESSOR_CHARACTERISTIC_FLAGS;
> > +
> > +typedef struct {
> > PROCESSOR_SIGNATURE Signature;
> > PROCESSOR_FEATURE_FLAGS FeatureFlags; } PROCESSOR_ID_DATA;
> @@
> > -2508,6 +2526,57 @@ typedef struct {
> > UINT8 InterfaceTypeSpecificData[4]; ///< This field has a
> minimum of four bytes
> > } SMBIOS_TABLE_TYPE42;
> >
> > +
> > +///
> > +/// Processor Specific Block - Processor Architecture Type ///
> > +typedef enum{
> > + ProcessorSpecificBlockArchTypeReserved = 0x00,
> > + ProcessorSpecificBlockArchTypeIa32 = 0x01,
> > + ProcessorSpecificBlockArchTypeX64 = 0x02,
> > + ProcessorSpecificBlockArchTypeItanium = 0x03,
> > + ProcessorSpecificBlockArchTypeAarch32 = 0x04,
> > + ProcessorSpecificBlockArchTypeAarch64 = 0x05,
> > + ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
> > + ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
> > + ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08 }
> > +PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
> > +
> > +///
> > +/// Processor Specific Block is the standard container of processor-specific
> data.
> > +///
> > +typedef struct {
> > + UINT8 Length;
> > + UINT8 ProcessorArchType;
> > + ///
> > + /// Below followed by Processor-specific data
> > + ///
> > + ///
> > +} PROCESSOR_SPECIFIC_BLOCK;
> > +
> > +///
> > +/// Processor Additional Information(Type 44).
> > +///
> > +/// The information in this structure defines the processor
> > +additional information in case /// SMBIOS type 4 is not sufficient to
> describe processor characteristics.
> > +/// The SMBIOS type 44 structure has a reference handle field to link
> > +back to the related /// SMBIOS type 4 structure. There may be
> > +multiple SMBIOS type 44 structures linked to the /// same SMBIOS type
> > +4 structure. For example, when cores are not identical in a processor, ///
> SMBIOS type 44 structures describe different core-specific information.
> > +///
> > +/// SMBIOS type 44 defines the standard header for the
> > +processor-specific block, while the /// contents of
> > +processor-specific data are maintained by processor /// architecture
> workgroups or vendors in separate documents.
> > +///
> > +typedef struct {
> > + SMBIOS_STRUCTURE Hdr;
> > + SMBIOS_HANDLE RefHandle; ///< This field refer to
> associated SMBIOS type 4
> > + ///
> > + /// Below followed by Processor-specific block
> > + ///
> > + PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
> > +} SMBIOS_TABLE_TYPE44;
> > +
> > ///
> > /// TPM Device (Type 43).
> > ///
> > @@ -2586,6 +2655,7 @@ typedef union {
> > SMBIOS_TABLE_TYPE41 *Type41;
> > SMBIOS_TABLE_TYPE42 *Type42;
> > SMBIOS_TABLE_TYPE43 *Type43;
> > + SMBIOS_TABLE_TYPE44 *Type44;
> > SMBIOS_TABLE_TYPE126 *Type126;
> > SMBIOS_TABLE_TYPE127 *Type127;
> > UINT8 *Raw;
> > --
> > 2.7.4
> >
> >
> >
> >
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On Mon, Sep 16, 2019 at 07:01:50AM +0000, Chang, Abner (HPS SW/FW Technologist) wrote: > > -----Original Message----- > > From: Leif Lindholm [mailto:leif.lindholm@linaro.org] > > Sent: Friday, September 6, 2019 12:17 AM > > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist) > > <abner.chang@hpe.com> > > Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v1 13/22]: > > MdePkg/Include: Update SmBios header file. > > > > On Wed, Sep 04, 2019 at 06:43:08PM +0800, Abner Chang wrote: > > > Update SmBios header file to conform with SMBIOS v3.3.0. > > > The major update is to add definitions of SMBIOS Type 44h record. > > > > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > > Signed-off-by: Abner Chang <abner.chang@hpe.com> > > > > This would be really useful to get straight into edk2 - could you submit it > > straight for inclusion in edk2 master? We can then cherry-pick that back to > > the edk2-staging branch. > > Forgive me that I don't want to increase the complexity to RISC-V > edk2 submittal. We can send SMBIOS patch apart from RISC-V patches > with specific subject for SMBIOS change. Yes, sorry, that was exactly what I meant :) Thank you for doing that. Best Regards, Leif -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#47374): https://edk2.groups.io/g/devel/message/47374 Mute This Topic: https://groups.io/mt/33137139/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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