Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++ Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 546 ++++++++++++++++++++ Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 ++++++++++ Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf | 49 ++ Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf | 49 ++ Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c | 43 ++ Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c | 155 ++++++ Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c | 167 ++++++ Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S | 51 ++ Platform/Intel/Stratix10/Readme.md | 61 +++ Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 + 11 files changed, 1423 insertions(+)
From: "Tien Hock, Loh" <tien.hock.loh@intel.com>
Adds support for Intel Stratix 10 Platform.
Signed-off-by: "Tien Hock, Loh" <tien.hock.loh@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
--
v4
- Removed LibC
- Added NOOPT to BUILD_TARGETS
- Removed ARM from SUPPORTED_ARCHITECTURE
v3
- Updated Pcd with updated name
v2
- Updates ShellBinPkg with ShellPkg
---
Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++
Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 546 ++++++++++++++++++++
Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 ++++++++++
Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf | 49 ++
Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf | 49 ++
Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c | 43 ++
Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c | 155 ++++++
Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c | 167 ++++++
Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S | 51 ++
Platform/Intel/Stratix10/Readme.md | 61 +++
Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 +
11 files changed, 1423 insertions(+)
diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
new file mode 100755
index 000000000000..5677ac7676d5
--- /dev/null
+++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
@@ -0,0 +1,30 @@
+#/** @file
+# Intel Stratix 10 SoC FPGA Package
+#
+# Copyright (c) 2019, Intel All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = IntelSoCFpgaPkg
+ PACKAGE_GUID = 45533DD0-C41F-4ab6-A5DF-65B52684AC60
+ PACKAGE_VERSION = 0.1
+
+[Includes.common]
+
+[Guids.common]
+ gIntelSocFpgaTokenSpaceGuid = { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, 0xa, 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } }
+[PcdsFeatureFlag.common]
+
+[PcdsFixedAtBuild.common]
+
+
diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
new file mode 100755
index 000000000000..5665ac6c8982
--- /dev/null
+++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
@@ -0,0 +1,546 @@
+#/** @file
+# Intel Stratix 10 SoC FPGA Package
+#
+# Copyright (c) 2019, Intel All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = Intel Stratix 10 SoC Development Board
+ PLATFORM_GUID = A2D10D02-7C36-4de8-831B-EFBFC2092D1B
+ PLATFORM_VERSION = 0.1
+ FIRMWARE_VERSION = 1.0
+ DSC_SPECIFICATION = 0x00010005
+ SUPPORTED_ARCHITECTURES = AARCH64
+ BUILD_TARGETS = DEBUG|RELEASE|NOOPT
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/Intel/Stratix10/Stratix10SoCPkg.fdf
+ OUTPUT_DIRECTORY = Build/Stratix10SoCPkg
+ USE_ARM_BDS = FALSE
+ SECURE_BOOT_ENABLE = FALSE
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|1
+
+ # Stacks for MPCores in PEI Phase
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000
+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x30000
+
+ # ARM L2x0 PCDs
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000
+
+ # ARM GIC
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2000
+
+ # ARM Floating Point architecture (VFP)
+ gArmTokenSpaceGuid.PcdVFPEnabled|1
+
+ # System Memory (1GB, minus reserved memory for Linux PSCI calls)
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000
+
+ # Arm Architectural Timer
+ gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000
+
+ # Trustzone Enable
+ gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE
+
+ #-------------------------------
+ # gEfiMdeModulePkgTokenSpaceGuid
+ #-------------------------------
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VERSION)"
+
+ #-------------------------------
+ # gEfiMdePkgTokenSpaceGuid
+ #-------------------------------
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
+
+ # DEBUG_ASSERT_ENABLED 0x01
+ # DEBUG_PRINT_ENABLED 0x02
+ # DEBUG_CODE_ENABLED 0x04
+ # CLEAR_MEMORY_ENABLED 0x08
+ # ASSERT_BREAKPOINT_ENABLED 0x10
+ # ASSERT_DEADLOOP_ENABLED 0x20
+!if $(TARGET) == RELEASE
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+!else
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+!endif
+
+ # DEBUG_INIT 0x00000001 // Initialization
+ # DEBUG_WARN 0x00000002 // Warnings
+ # DEBUG_LOAD 0x00000004 // Load events
+ # DEBUG_FS 0x00000008 // EFI File system
+ # DEBUG_POOL 0x00000010 // Alloc & Free's
+ # DEBUG_PAGE 0x00000020 // Alloc & Free's
+ # DEBUG_INFO 0x00000040 // Verbose
+ # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers
+ # DEBUG_VARIABLE 0x00000100 // Variable
+ # DEBUG_BM 0x00000400 // Boot Manager
+ # DEBUG_BLKIO 0x00001000 // BlkIo Driver
+ # DEBUG_NET 0x00004000 // SNI Driver
+ # DEBUG_UNDI 0x00010000 // UNDI Driver
+ # DEBUG_LOADFILE 0x00020000 // UNDI Driver
+ # DEBUG_EVENT 0x00080000 // Event messages
+ # DEBUG_GCD 0x00100000 // Global Coherency Database changes
+ # DEBUG_CACHE 0x00200000 // Memory range cachability changes
+ # DEBUG_ERROR 0x80000000 // Error
+# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00
+
+ #-------------------------------
+ # gEmbeddedTokenSpaceGuid
+ #-------------------------------
+
+ # MMC
+ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808000
+ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|50000000
+ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25000000
+
+ #
+ # Optional feature to help prevent EFI memory map fragments
+ # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
+ # Values are in EFI Pages (4K). DXE Core will make sure that
+ # at least this much of each type of memory can be allocated
+ # from a single memory range. This way you only end up with
+ # maximum of two fragements for each type in the memory map
+ # (the memory used, and the free memory that was prereserved
+ # but not used).
+ #
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|8192
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
+
+ # We want to use the Shell Libraries but don't want it to initialise
+ # automatically. We initialise the libraries when the command is called by the
+ # Shell.
+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+
+ # Pcd Settings - UART Serial Terminal
+ # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000.
+ # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|32
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xFFC02000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|100000000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF}
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
+
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
+
+ # ConColumn/Row
+ #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutSetupVar"|gArmGlobalVariableGuid|0x0|132
+ #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutSetupVar"|gArmGlobalVariableGuid|0x4|43
+
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5
+
+ # RunAxf support via Dynamic Shell Command protocol
+ # We want to use the Shell Libraries but don't want it to initialise
+ # automatically. We initialise the libraries when the command is called by the
+ # Shell.
+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+
+!if $(USE_ARM_BDS) == FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!endif
+
+# TODO: Add suppot for secure boot
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot
+ gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
+!endif
+
+
+[PcdsFeatureFlag.common]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
+
+
+ # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
+ gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
+ # If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
+ # Set FALSE to save size.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE
+
+ #-------------------------------
+ # gEfiMdePkgTokenSpaceGuid
+ #-------------------------------
+ gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
+
+
+[LibraryClasses.common]
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+ AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+ ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf
+
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+
+
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
+ ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
+ ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
+ PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
+ TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
+ SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
+
+ SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+ PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
+
+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf #thloh
+ BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf #thloh
+
+ TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+ #
+ # Secure Boot dependencies
+ #
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+ TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+ AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+
+ # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree
+ PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf
+!else
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+!endif
+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+
+!if $(USE_ARM_BDS) == FALSE
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+!endif
+
+ #-------------------------------
+ # Networking Requirements
+ #-------------------------------
+ DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+ IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+ NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+ UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+
+ #-------------------------------
+ # These libraries are used by the dynamic EFI Shell commands
+ #-------------------------------
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
+ #-------------------------------
+ # Build Debug / Release
+ #-------------------------------
+!if $(TARGET) == RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+ DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+ PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
+
+[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE]
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+ LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+
+ HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
+ PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+ MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+ MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+
+[LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.UEFI_DRIVER]
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
+
+[LibraryClasses.common.PEI_CORE]
+ ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+ HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
+ LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+ PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+ #thloh ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/PeiCrc32GuidedSectionExtractLib/PeiCrc32GuidedSectionExtractLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+ # thloh ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+
+[LibraryClasses.common.UEFI_APPLICATION]
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+!endif
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+
+[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER]
+ #
+ # PSCI support in EL3 may not be available if we are not running under a PSCI
+ # compliant secure firmware, but since the default VExpress EfiResetSystemLib
+ # cannot be supported at runtime (due to the fact that the syscfg MMIO registers
+ # cannot be runtime remapped), it is our best bet to get ResetSystem functionality
+ # on these platforms.
+ #
+ EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
+
+[LibraryClasses.ARM, LibraryClasses.AARCH64]
+ # It is not possible to prevent the ARM compiler for generic intrinsic functions.
+ # This library provides the instrinsic functions generate by a given compiler.
+ # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
+ #
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+ # Add support for GCC stack protector
+ NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+
+ EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+
+ ArmPlatformPkg/PrePi/PeiUniCore.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+
+ #
+ # DXE
+ #
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <LibraryClasses>
+ #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+ }
+
+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+
+ ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+
+ FatPkg/EnhancedFatDxe/Fat.inf
+
+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ }
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ # Multimedia Card Interface
+ EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
+ EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf
+
+ # Shell
+ ShellPkg/Application/Shell/Shell.inf {
+ <LibraryClasses>
+ ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
+ HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
+
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
+ }
+
+ #
+ # Platform Specific Init for DXE phase
+ #
+ Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
+
+[BuildOptions]
+ #-------------------------------
+ # Common
+ #-------------------------------
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -fstack-protector -O2 -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security
+ GCC:RELEASE_*_*_DLINK_FLAGS = -z noexecstack -z relro -z now
+
+ #-------------------------------
+ # IntelPlatformPkg/...
+ #-------------------------------
+ GCC:DEBUG_*_AARCH64_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -Wno-unused-but-set-variable #-mstrict-align
+ GCC:RELEASE_*_AARCH64_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -DMDEPKG_NDEBUG -DMDEPKG_NDEBUG # -mstrict-align
+
diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf
new file mode 100755
index 000000000000..cab6536b5350
--- /dev/null
+++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf
@@ -0,0 +1,270 @@
+#/** @file
+# Intel SoC FPGA Package
+#
+# Copyright (c) 2019, Intel All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.IntelStratix10_EFI]
+BaseAddress = 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.
+Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes
+ErasePolarity = 1
+BlockSize = 0x00000001
+NumBlocks = 0x00400000
+
+################################################################################
+#
+# FD Region layout
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required)
+# followed by the pipe "|" character,
+# followed by the size of the region, also in hex with the leading "0x" characters.
+# Must be defined in ascending order and may not overlap.
+# Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+0x00000000|0x00400000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FV_PEIDXE
+
+[FV.FV_PEIDXE]
+FvAlignment = 8
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF ArmPlatformPkg/PrePi/PeiUniCore.inf
+
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FV_DXE
+ }
+ }
+
+[FV.FV_DXE]
+BlockSize = 0x00000001
+NumBlocks = 0 # This FV gets compressed so make it just big enough
+FvAlignment = 8 # FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
+
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+
+ #
+ # PI DXE Drivers producing Architectural Protocols (EFI Services)
+ #
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+ INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+
+ # Multiple Console IO support
+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ # ARM packages
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ # FAT filesystem + GPT/MBR partitioning
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+ # Multimedia Card Interface
+ INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
+ INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf
+
+ # Platform Specific Init for DXE phase
+ INF Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
+
+ # UEFI application (Shell Embedded Boot Loader)
+ INF ShellPkg/Application/Shell/Shell.inf
+
+ # Bds
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+
+ # FV Filesystem
+ INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
+
+ # Include UEFI Shell Start Up Script
+ FILE FREEFORM = AF3F9E26-DDB5-4e85-B4D7-AC60A2772BC2 {
+ SECTION RAW = Platform/Intel/Stratix10/ShellScript/startup.nsh
+ SECTION UI = "startup.nsh"
+ }
+
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+# FILE DRIVER = $(NAMED_GUID) {
+# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+# COMPRESS PI_STD {
+# GUIDED {
+# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+# UI STRING="$(MODULE_NAME)" Optional
+# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+# }
+# }
+# }
+#
+############################################################################
+
+[Rule.Common.SEC]
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ }
+
+[Rule.Common.PEI_CORE]
+ FILE PEI_CORE = $(NAMED_GUID) FIXED {
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING ="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM]
+ FILE PEIM = $(NAMED_GUID) FIXED {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+ FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+ }
+
+[Rule.Common.DXE_CORE]
+ FILE DXE_CORE = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ }
+
+[Rule.Common.UEFI_APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ UI STRING ="$(MODULE_NAME)" Optional
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+
+
diff --git a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
new file mode 100644
index 000000000000..c3c0d7242082
--- /dev/null
+++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
@@ -0,0 +1,49 @@
+#/** @file
+#
+# Copyright (c) 2019, Intel All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = IntelPlatformDxe
+ FILE_GUID = AB87E291-1689-4c7b-B613-FB54A0E38CEA
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = IntelPlatformDxeEntryPoint
+
+[Sources.common]
+ IntelPlatformDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseMemoryLib
+ DebugLib
+ DxeServicesTableLib
+ PcdLib
+ PrintLib
+ SerialPortLib
+ UefiBootServicesTableLib
+ UefiRuntimeServicesTableLib
+ UefiLib
+ UefiDriverEntryPoint
+
+
+[Depex]
+ # We depend on these protocols to create the default boot entries
+ gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid
diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf
new file mode 100644
index 000000000000..83649c95c9c3
--- /dev/null
+++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf
@@ -0,0 +1,49 @@
+/** @file
+*
+* Stratix 10 Platform Library
+*
+* Copyright (c) 2019, Intel Corporations All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = Stratix10PlatformLib
+ FILE_GUID = 99E236C7-D5FD-42A0-B520-60C85C4870B8
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformLib
+
+[Packages]
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/Intel/Stratix10/Stratix10SoCPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ ArmMmuLib
+ DebugLib
+ IoLib
+ PcdLib
+
+[Sources.common]
+ Stratix10PlatformLib.c
+ Stratix10Mmu.c
+
+[Sources.AArch64]
+ AArch64/ArmPlatformHelper.S
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
+
diff --git a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c
new file mode 100644
index 000000000000..144b4c54ef55
--- /dev/null
+++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c
@@ -0,0 +1,43 @@
+/** @file
+*
+* Copyright (c) 2019, Intel All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+#include <Uefi.h>
+#include <Guid/GlobalVariable.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Protocol/DevicePathFromText.h>
+
+EFI_STATUS
+EFIAPI
+IntelPlatformDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status = 0;
+
+ return Status;
+}
+
diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c
new file mode 100644
index 000000000000..ed4aa2bdb12a
--- /dev/null
+++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c
@@ -0,0 +1,155 @@
+/** @file
+*
+* Stratix 10 Mmu configuration
+*
+* Copyright (c) 2019, Intel Corporations All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/TimerLib.h>
+
+// The total number of descriptors, including the final "end-of-table" descriptor.
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16
+ARM_MEMORY_REGION_DESCRIPTOR gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS];
+
+// DDR attributes
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
+
+#define DRAM_BASE 0x0
+#define DRAM_SIZE 0x40000000
+
+#define FPGA_SLAVES_BASE 0x80000000
+#define FPGA_SLAVES_SIZE 0x60000000
+
+#define PERIPHERAL_BASE 0xF7000000
+#define PERIPHERAL_SIZE 0x08E00000
+
+#define OCRAM_BASE 0xFFE00000
+#define OCRAM_SIZE 0x00100000
+
+#define GIC_BASE 0xFFFC0000
+#define GIC_SIZE 0x00008000
+
+#define MEM64_BASE 0x0100000000
+#define MEM64_SIZE 0x1F00000000
+
+#define DEVICE64_BASE 0x2000000000
+#define DEVICE64_SIZE 0x0100000000
+/**
+ Return the Virtual Memory Map of your platform
+
+ This Virtual Memory Map is used to initialize the MMU for DXE Phase.
+
+ @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
+ Virtual Memory mapping. This array must be ended by a zero-filled
+ entry
+
+**/
+VOID
+EFIAPI
+ArmPlatformGetVirtualMemoryMap (
+ IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+ )
+{
+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
+ ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
+ UINTN Index = 0;
+
+ VirtualMemoryTable = &gVirtualMemoryTable[0];
+
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;
+
+ // Start create the Virtual Memory Map table
+ // Our goal is to a simple 1:1 mapping where virtual==physical address
+
+ // DDR SDRAM
+ VirtualMemoryTable[Index].PhysicalBase = DRAM_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = DRAM_SIZE;
+ VirtualMemoryTable[Index++].Attributes = CacheAttributes;
+
+ // FPGA
+ VirtualMemoryTable[Index].PhysicalBase = FPGA_SLAVES_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = FPGA_SLAVES_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ // DEVICE 142MB
+ VirtualMemoryTable[Index].PhysicalBase = PERIPHERAL_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = PERIPHERAL_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ // OCRAM 1MB but available 256KB
+ VirtualMemoryTable[Index].PhysicalBase = OCRAM_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = OCRAM_SIZE;
+ VirtualMemoryTable[Index++].Attributes = CacheAttributes;
+
+ // DEVICE 32KB
+ VirtualMemoryTable[Index].PhysicalBase = GIC_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = GIC_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ // MEM 124GB
+ VirtualMemoryTable[Index].PhysicalBase = MEM64_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = MEM64_SIZE;
+ VirtualMemoryTable[Index++].Attributes = CacheAttributes;
+
+ // DEVICE 4GB
+ VirtualMemoryTable[Index].PhysicalBase = DEVICE64_BASE;
+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase;
+ VirtualMemoryTable[Index].Length = DEVICE64_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ // End of Table
+ VirtualMemoryTable[Index].PhysicalBase = 0;
+ VirtualMemoryTable[Index].VirtualBase = 0;
+ VirtualMemoryTable[Index].Length = 0;
+ VirtualMemoryTable[Index++].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+ ASSERT((Index) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+ *VirtualMemoryMap = VirtualMemoryTable;
+}
+
+
+VOID
+EFIAPI
+InitMmu (
+ VOID
+ )
+{
+ ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
+ VOID *TranslationTableBase;
+ UINTN TranslationTableSize;
+ RETURN_STATUS Status;
+ // Construct a Virtual Memory Map for this platform
+ ArmPlatformGetVirtualMemoryMap (&MemoryTable);
+
+ // Configure the MMU
+ Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n"));
+ }
+}
+
diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c
new file mode 100644
index 000000000000..6bee4d5d43e8
--- /dev/null
+++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c
@@ -0,0 +1,167 @@
+/** @file
+*
+* Stratix 10 Platform Library
+*
+* Copyright (c) 2019, Intel Corporations All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Ppi/ArmMpCoreInfo.h>
+#include <Library/TimerLib.h>
+
+#define ALT_RSTMGR_OFST 0xffd11000
+#define ALT_RSTMGR_PER1MODRST_OFST 0x28
+#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK 0x00000001
+#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK 0xffffffef
+
+
+VOID
+AssertWatchDogTimerZeroReset (
+ VOID
+ )
+{
+ // Assert the Reset signal of Watchdog Timer 0 which may have been enabled by BootROM
+ MmioOr32 (ALT_RSTMGR_OFST +
+ ALT_RSTMGR_PER1MODRST_OFST,
+ ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK);
+}
+
+VOID
+DeassertSystemTimerZeroReset (
+ VOID
+ )
+{
+ // Assert the Reset signal of Watchdog Timer 0 which may have been enabled by BootROM
+ MmioAnd32 (ALT_RSTMGR_OFST +
+ ALT_RSTMGR_PER1MODRST_OFST,
+ ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK);
+}
+
+
+/**
+ * Return the current Boot Mode
+ *
+ * This function returns the boot reason on the platform
+ *
+ * **/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+
+/**
+ Initialize controllers that must setup before entering PEI MAIN
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ AssertWatchDogTimerZeroReset();
+ return EFI_SUCCESS;
+}
+
+//-----------------------------------------------------------------------------------------
+// BEGIN ARM CPU RELATED CODE
+//-----------------------------------------------------------------------------------------
+
+// This Table will be consume by Hob init code to publish it into HOB as MPCore Info
+// Hob init code will retrieve it by calling PrePeiCoreGetMpCoreInfo via Ppi
+ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 1
+ 0x0, 0x1,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 2
+ 0x0, 0x2,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 3
+ 0x0, 0x3,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ }
+};
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
+ *ArmCoreTable = mArmPlatformNullMpCoreInfoTable;
+ return EFI_SUCCESS;
+}
+
+// This will be consume by PrePeiCore to install Ppi
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &mArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ *PpiListSize = sizeof(gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
+}
+
+//-----------------------------------------------------------------------------------------
+// END ARM CPU RELATED CODE
+//-----------------------------------------------------------------------------------------
+
diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S
new file mode 100644
index 000000000000..2f4cf95cbf13
--- /dev/null
+++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S
@@ -0,0 +1,51 @@
+//
+// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLibV8.h>
+#include <Library/ArmLib.h>
+
+ASM_FUNC(ArmPlatformPeiBootAction)
+ ret
+
+//UINTN
+//ArmPlatformGetCorePosition (
+// IN UINTN MpId
+// );
+// With this function: CorePos = (ClusterId * 4) + CoreId
+ASM_FUNC(ArmPlatformGetCorePosition)
+ and x1, x0, #ARM_CORE_MASK
+ and x0, x0, #ARM_CLUSTER_MASK
+ add x0, x1, x0, LSR #6
+ ret
+
+//UINTN
+//ArmPlatformGetPrimaryCoreMpId (
+// VOID
+// );
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
+ ret
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
+ and x0, x0, x1
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
+ cmp w0, w1
+ mov x0, #1
+ mov x1, #0
+ csel x0, x0, x1, eq
+ ret
diff --git a/Platform/Intel/Stratix10/Readme.md b/Platform/Intel/Stratix10/Readme.md
new file mode 100644
index 000000000000..334439fa9a47
--- /dev/null
+++ b/Platform/Intel/Stratix10/Readme.md
@@ -0,0 +1,61 @@
+Intel Stratix 10 Platform
+=========================
+
+# Summary
+
+This is a port of 64-bit Tiano Core UEFI for the Intel Stratix 10 platform
+based on Stratix 10 SX development board.
+
+This UEFI port works with ATF + UEFI implementation for Intel Stratix 10 board, and
+will boot to Linux port of Stratix 10.
+
+# Status
+
+This firmware has been validated to boot to Linux for Stratix 10 that can be obtained from
+https://github.com/altera-opensource/linux-socfpga.
+
+The default boot is the UEFI shell. The UEFI
+shell will run startup.nsh by default, and you may change the startup.nsh to run commands on boot.
+
+# Building the firmware
+
+- Fetch the ATF, edk2, and edk2-platforms repositories into local host.
+ Make all the repositories in the same ${BUILD\_PATH}.
+
+- Install the AARCH64 GNU 4.8 toolchain.
+
+- Build UEFI using Stratix 10 platform as configuration
+
+ . edksetup.sh
+
+ build -a AARCH64 -p Platform/Intel/Stratix10/Stratix10SoCPkg.dsc -t GCC48 -b RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y FLASH -Y DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS
+
+Note: Refer to build instructions from the top level edk2-platforms Readme.md for further details
+
+- Build ATF for Stratix 10 platform
+
+ make CROSS_COMPILE=aarch64-linux-gnu- device=s10
+
+- Build atf providing the previously generated UEFI as the BL33 image
+
+ make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=stratix10
+ BL33=PEI.ROM
+
+Install Procedure
+-----------------
+
+- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10
+ board.
+
+- Generate a SOF containing bl2
+
+.. code:: bash
+ aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex
+ quartus_cpf --bootloader bl2.hex <quartus_generated_sof> <output_sof_with_bl2>
+
+- Configure SOF to board
+
+.. code:: bash
+ nios2-configure-sof <output_sof_with_bl2>
+
+
diff --git a/Platform/Intel/Stratix10/ShellScript/startup.nsh b/Platform/Intel/Stratix10/ShellScript/startup.nsh
new file mode 100644
index 000000000000..8c4067972c5b
--- /dev/null
+++ b/Platform/Intel/Stratix10/ShellScript/startup.nsh
@@ -0,0 +1,2 @@
+Image dtb=socfpga_stratix10_socdk.dtb console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
+
--
2.19.0
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Urgh, sorry, saw this was still stuck in my review queue. Mike, one question for you inline below. Oh, and one here - what's your take on maintainership for ARM-based Intel platforms? Fall back to top-level maintainers and add Tien Hock as reviewer? On Thu, May 09, 2019 at 04:55:47PM +0800, tien.hock.loh@intel.com wrote: > From: "Tien Hock, Loh" <tien.hock.loh@intel.com> > > Adds support for Intel Stratix 10 Platform. > > Signed-off-by: "Tien Hock, Loh" <tien.hock.loh@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.1 Yeah, so amusingly we've now updated the license, so we don't need this tag any longer... > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Leif Lindholm <leif.lindholm@linaro.org> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > -- > v4 > - Removed LibC > - Added NOOPT to BUILD_TARGETS > - Removed ARM from SUPPORTED_ARCHITECTURE > v3 > - Updated Pcd with updated name > v2 > - Updates ShellBinPkg with ShellPkg Revision history goes below --- or in cover letter. > --- > Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++ > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 546 ++++++++++++++++++++ > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 ++++++++++ > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf | 49 ++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf | 49 ++ > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c | 43 ++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c | 155 ++++++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c | 167 ++++++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S | 51 ++ > Platform/Intel/Stratix10/Readme.md | 61 +++ > Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 + > 11 files changed, 1423 insertions(+) > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > new file mode 100755 > index 000000000000..5677ac7676d5 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > @@ -0,0 +1,30 @@ > +#/** @file > +# Intel Stratix 10 SoC FPGA Package > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials are licensed and made available under > +# the terms and conditions of the BSD License which accompanies this distribution. > +# The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ... and as a result of the license change, could you also please replace these Mike Kinney may actually have some scripts that would help with this? > +# > +#**/ > + > +[Defines] > + DEC_SPECIFICATION = 0x00010005 We could probably bump this to the current DSC specification format? I think we're on 0x0001001B? (1.27) > + PACKAGE_NAME = IntelSoCFpgaPkg Should this be Stratix10SoCPkg? > + PACKAGE_GUID = 45533DD0-C41F-4ab6-A5DF-65B52684AC60 > + PACKAGE_VERSION = 0.1 > + > +[Includes.common] Add "Include" here, and you won't need to add manual -I flags below. > + > +[Guids.common] > + gIntelSocFpgaTokenSpaceGuid = { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, 0xa, 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } } This sounds like a very generic TokenSpaceGuid name that perhaps belongs in a package shared by many platforms. Should this one just be called gStratix10SoCTokenSpaceGuid? Please add a blank line before next section header. > +[PcdsFeatureFlag.common] > + > +[PcdsFixedAtBuild.common] > + > + > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > new file mode 100755 > index 000000000000..5665ac6c8982 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > @@ -0,0 +1,546 @@ > +#/** @file > +# Intel Stratix 10 SoC FPGA Package > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials are licensed and made available under > +# the terms and conditions of the BSD License which accompanies this distribution. > +# The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#**/ > + > + > +################################################################################ > +# > +# Defines Section - statements that will be processed to create a Makefile. > +# > +################################################################################ > +[Defines] > + PLATFORM_NAME = Intel Stratix 10 SoC Development Board > + PLATFORM_GUID = A2D10D02-7C36-4de8-831B-EFBFC2092D1B > + PLATFORM_VERSION = 0.1 > + FIRMWARE_VERSION = 1.0 > + DSC_SPECIFICATION = 0x00010005 0x000101C? > + SUPPORTED_ARCHITECTURES = AARCH64 > + BUILD_TARGETS = DEBUG|RELEASE|NOOPT > + SKUID_IDENTIFIER = DEFAULT > + FLASH_DEFINITION = Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > + OUTPUT_DIRECTORY = Build/Stratix10SoCPkg > + USE_ARM_BDS = FALSE Oh, the ArmBds it thankfully long gone, so no need for the above line :) > + SECURE_BOOT_ENABLE = FALSE > + > +################################################################################ > +# > +# Pcd Section - list of all EDK II PCD Entries defined by this Platform > +# > +################################################################################ > + > +[PcdsFixedAtBuild.common] > + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > + gArmPlatformTokenSpaceGuid.PcdCoreCount|1 > + > + # Stacks for MPCores in PEI Phase > + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000 > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x30000 > + > + # ARM L2x0 PCDs > + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000 > + > + # ARM GIC > + gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000 > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2000 > + > + # ARM Floating Point architecture (VFP) > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > + > + # System Memory (1GB, minus reserved memory for Linux PSCI calls) > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000 > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000 > + > + # Arm Architectural Timer > + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000 > + > + # Trustzone Enable > + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE > + > + #------------------------------- > + # gEfiMdeModulePkgTokenSpaceGuid > + #------------------------------- > + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VERSION)" > + > + #------------------------------- > + # gEfiMdePkgTokenSpaceGuid > + #------------------------------- > + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0 > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 > + > + # DEBUG_ASSERT_ENABLED 0x01 > + # DEBUG_PRINT_ENABLED 0x02 > + # DEBUG_CODE_ENABLED 0x04 > + # CLEAR_MEMORY_ENABLED 0x08 > + # ASSERT_BREAKPOINT_ENABLED 0x10 > + # ASSERT_DEADLOOP_ENABLED 0x20 > +!if $(TARGET) == RELEASE > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > +!else > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > +!endif > + > + # DEBUG_INIT 0x00000001 // Initialization > + # DEBUG_WARN 0x00000002 // Warnings > + # DEBUG_LOAD 0x00000004 // Load events > + # DEBUG_FS 0x00000008 // EFI File system > + # DEBUG_POOL 0x00000010 // Alloc & Free's > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > + # DEBUG_INFO 0x00000040 // Verbose > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers > + # DEBUG_VARIABLE 0x00000100 // Variable > + # DEBUG_BM 0x00000400 // Boot Manager > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > + # DEBUG_NET 0x00004000 // SNI Driver > + # DEBUG_UNDI 0x00010000 // UNDI Driver > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > + # DEBUG_EVENT 0x00080000 // Event messages > + # DEBUG_GCD 0x00100000 // Global Coherency Database changes > + # DEBUG_CACHE 0x00200000 // Memory range cachability changes > + # DEBUG_ERROR 0x80000000 // Error > +# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F > + > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00 > + > + #------------------------------- > + # gEmbeddedTokenSpaceGuid > + #------------------------------- > + > + # MMC > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808000 > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|50000000 > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25000000 > + > + # > + # Optional feature to help prevent EFI memory map fragments > + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob > + # Values are in EFI Pages (4K). DXE Core will make sure that > + # at least this much of each type of memory can be allocated > + # from a single memory range. This way you only end up with > + # maximum of two fragements for each type in the memory map > + # (the memory used, and the free memory that was prereserved > + # but not used). > + # > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|8192 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > + > + # We want to use the Shell Libraries but don't want it to initialise > + # automatically. We initialise the libraries when the command is called by the > + # Shell. > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > + > + # Pcd Settings - UART Serial Terminal > + # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000. > + # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100. Drop the extra space on the UART1 line compared to the UART0 one. > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|32 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xFFC02000 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|100000000 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF} > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4 > + > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > + > + # ConColumn/Row > + #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutSetupVar"|gArmGlobalVariableGuid|0x0|132 > + #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutSetupVar"|gArmGlobalVariableGuid|0x4|43 In general, delete any commented out settings in this file. (The exception I won't complain on is PcdDebugPrintErrorLevel above.) > + > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > + > + # RunAxf support via Dynamic Shell Command protocol > + # We want to use the Shell Libraries but don't want it to initialise > + # automatically. We initialise the libraries when the command is called by the > + # Shell. > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > + > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } > + > +!if $(USE_ARM_BDS) == FALSE > + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE > +!endif > + > +# TODO: Add suppot for secure boot Well. You could just leave this bit out for now and add it when ready. > +!if $(SECURE_BOOT_ENABLE) == TRUE > + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot > + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 > + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 > +!endif > + > + > +[PcdsFeatureFlag.common] > + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE > + > + > + # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE > + # If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. > + # Set FALSE to save size. > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE > + > + #------------------------------- > + # gEfiMdePkgTokenSpaceGuid > + #------------------------------- > + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE > + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE > + > + > +[LibraryClasses.common] > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > + ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > + ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > + ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > + > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + > + Drop one of the blank lines above. > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > + > + ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf > + CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > + DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf > + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > + RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf > + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf > + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > + > + SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf > + PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf > + > + SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf > + PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf #thloh > + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf #thloh > + > + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf > + > + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf > + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf > + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf > + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf > + > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf > + # > + # Secure Boot dependencies > + # > +!if $(SECURE_BOOT_ENABLE) == TRUE > + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf > + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf > + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > + > + # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree > + PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf > +!else > + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf > + AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf > +!endif > + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > + > +!if $(USE_ARM_BDS) == FALSE So you can drop this conditional. > + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf > + GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf > + CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf > +!endif > + > + #------------------------------- > + # Networking Requirements > + #------------------------------- > + DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf > + IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf > + NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf > + UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf This may be useful to migrate to using the configuration fragments recently added in NetworkPkg. For an example, see edk2-platforms commit 433d42794d0d. > + > + #------------------------------- > + # These libraries are used by the dynamic EFI Shell commands > + #------------------------------- > + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > + > + #------------------------------- > + # Build Debug / Release > + #------------------------------- > +!if $(TARGET) == RELEASE > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > +!else > + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf > +!endif > + > + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf > + DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf > + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf > + PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf > + > +[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE] > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf > + LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf > + > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > + > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf > + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf > + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf > + > +[LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.UEFI_DRIVER] > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf > + > +[LibraryClasses.common.PEI_CORE] > + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > + LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf > + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf > + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf > + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf > + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf > + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > + #thloh ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > + PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/PeiCrc32GuidedSectionExtractLib/PeiCrc32GuidedSectionExtractLib.inf > + > +[LibraryClasses.common.DXE_CORE] > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf > + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf > + PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf > + # thloh ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf Drop commented-out line. > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > + > +[LibraryClasses.common.DXE_DRIVER] > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf > + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf > + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf > + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf I think all of these are going away. Try to migrate over to MdeModulePkg version instead. > + > +[LibraryClasses.common.UEFI_APPLICATION] > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf > + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf > + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > + > +[LibraryClasses.common.UEFI_DRIVER] > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf > + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf > + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf > + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf > + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > + > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > +!if $(SECURE_BOOT_ENABLE) == TRUE > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > +!endif > + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf > + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf > + > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > + # > + # PSCI support in EL3 may not be available if we are not running under a PSCI > + # compliant secure firmware, but since the default VExpress EfiResetSystemLib > + # cannot be supported at runtime (due to the fact that the syscfg MMIO registers > + # cannot be runtime remapped), it is our best bet to get ResetSystem functionality > + # on these platforms. > + # > + EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf > + > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > + # It is not possible to prevent the ARM compiler for generic intrinsic functions. > + # This library provides the instrinsic functions generate by a given compiler. > + # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. > + # > + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf > + > + # Add support for GCC stack protector > + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > + > +################################################################################ > +# > +# Components Section - list of all EDK II Modules needed by this Platform > +# > +################################################################################ > +[Components.common] > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > + <LibraryClasses> > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + } > + > + EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > + > + ArmPlatformPkg/PrePi/PeiUniCore.inf { > + <LibraryClasses> > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + } > + > + # > + # DXE > + # > + MdeModulePkg/Core/Dxe/DxeMain.inf { > + <LibraryClasses> > + #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf > + } > + > + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > + MdeModulePkg/Application/UiApp/UiApp.inf { > + <LibraryClasses> > + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf > + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf > + } > + > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf > + > + FatPkg/EnhancedFatDxe/Fat.inf > + > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > + > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf > + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > + MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf > + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf > + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { > + <LibraryClasses> > + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf > + } > + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > + > + # Multimedia Card Interface > + EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > + EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > + > + # Shell > + ShellPkg/Application/Shell/Shell.inf { > + <LibraryClasses> > + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf > + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf > + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf > + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf > + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf > + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf > + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf > + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf > + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf > + > + <PcdsFixedAtBuild> > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 > + } > + > + # > + # Platform Specific Init for DXE phase > + # > + Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > + > +[BuildOptions] > + #------------------------------- > + # Common > + #------------------------------- > + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -fstack-protector -O2 -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security -fstack-protector already set by default, as is -O2 for RELEASE, so please drop these. -Wformat and -Wformat-security are not, but they are hardly platform specific - so please send an RFC patch adding this to BaseTools/Conf/tools_def.template (with me and Ard on cc), and let us have a conversation about whether it should be default on ARM/AARCH64. Same for FORTIFY_SOURCE (which I see we explicitly set to 0 for the Synquacer platforms). > + GCC:RELEASE_*_*_DLINK_FLAGS = -z noexecstack -z relro -z now Please also send an RFC for this to BaseTools. > + > + #------------------------------- > + # IntelPlatformPkg/... Umm, no it isn't? > + #------------------------------- > + GCC:DEBUG_*_AARCH64_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -Wno-unused-but-set-variable #-mstrict-align > + GCC:RELEASE_*_AARCH64_PLATFORM_FLAGS = -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -DMDEPKG_NDEBUG -DMDEPKG_NDEBUG # -mstrict-align - Delete the already commented-out -mstrict-align bits from both lines. - Drop the (duplicated) -I flag from both lines - this will be created automagically when you update the [Includes.common] section of the .dec as suggested. - Please don't override the optimization level. - -DMDEPKG_NDEBUG is already set for RELEASE targets by the non-AARCH64-specific entries above. - Please drop the -Wno-unused-but-set-variable and let us fix instances that trigger the warning instead. > + > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > new file mode 100755 > index 000000000000..cab6536b5350 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > @@ -0,0 +1,270 @@ > +#/** @file > +# Intel SoC FPGA Package > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials are licensed and made available under > +# the terms and conditions of the BSD License which accompanies this distribution. > +# The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#**/ > + > +################################################################################ > +# > +# FD Section > +# The [FD] Section is made up of the definition statements and a > +# description of what goes into the Flash Device Image. Each FD section > +# defines one flash "device" image. A flash device image may be one of > +# the following: Removable media bootable image (like a boot floppy > +# image,) an Option ROM image (that would be "flashed" into an add-in > +# card,) a System "Flash" image (that would be burned into a system's > +# flash) or an Update ("Capsule") image that will be used to update and > +# existing system flash. > +# > +################################################################################ > + > +[FD.IntelStratix10_EFI] > +BaseAddress = 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM. > +Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes > +ErasePolarity = 1 > +BlockSize = 0x00000001 > +NumBlocks = 0x00400000 > + > +################################################################################ > +# > +# FD Region layout > +# > +# A Layout Region start with a eight digit hex offset (leading "0x" required) > +# followed by the pipe "|" character, > +# followed by the size of the region, also in hex with the leading "0x" characters. > +# Must be defined in ascending order and may not overlap. > +# Like: > +# Offset|Size > +# PcdOffsetCName|PcdSizeCName > +# RegionType <FV, DATA, or FILE> > +# > +################################################################################ > +0x00000000|0x00400000 > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > +FV = FV_PEIDXE > + > +[FV.FV_PEIDXE] > +FvAlignment = 8 > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > + > + INF ArmPlatformPkg/PrePi/PeiUniCore.inf > + > + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { > + SECTION FV_IMAGE = FV_DXE > + } > + } > + > +[FV.FV_DXE] > +BlockSize = 0x00000001 > +NumBlocks = 0 # This FV gets compressed so make it just big enough > +FvAlignment = 8 # FV alignment and FV attributes setting. > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > +FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c > + > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > + > + # > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > + # > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf > + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > + > + # Multiple Console IO support > + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > + > + # ARM packages > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > + > + # FAT filesystem + GPT/MBR partitioning > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > + INF FatPkg/EnhancedFatDxe/Fat.inf > + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > + > + # Multimedia Card Interface > + INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > + INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > + > + # Platform Specific Init for DXE phase > + INF Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > + > + # UEFI application (Shell Embedded Boot Loader) > + INF ShellPkg/Application/Shell/Shell.inf > + > + # Bds > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > + INF MdeModulePkg/Application/UiApp/UiApp.inf > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > + > + # FV Filesystem > + INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf > + > + # Include UEFI Shell Start Up Script > + FILE FREEFORM = AF3F9E26-DDB5-4e85-B4D7-AC60A2772BC2 { > + SECTION RAW = Platform/Intel/Stratix10/ShellScript/startup.nsh > + SECTION UI = "startup.nsh" > + } > + > + > + > +################################################################################ > +# > +# Rules are use with the [FV] section's module INF type to define > +# how an FFS file is created for a given INF file. The following Rule are the default > +# rules for the different module type. User can add the customized rules to define the > +# content of the FFS file. > +# > +################################################################################ > + > + > +############################################################################ > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # > +############################################################################ > +# > +#[Rule.Common.DXE_DRIVER] > +# FILE DRIVER = $(NAMED_GUID) { > +# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > +# COMPRESS PI_STD { > +# GUIDED { > +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > +# UI STRING="$(MODULE_NAME)" Optional > +# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) > +# } > +# } > +# } > +# > +############################################################################ > + > +[Rule.Common.SEC] > + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > + } > + > +[Rule.Common.PEI_CORE] > + FILE PEI_CORE = $(NAMED_GUID) FIXED { > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING ="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.PEIM] > + FILE PEIM = $(NAMED_GUID) FIXED { > + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.PEIM.TIANOCOMPRESSED] > + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + } > + > +[Rule.Common.DXE_CORE] > + FILE DXE_CORE = $(NAMED_GUID) { > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.UEFI_DRIVER] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.DXE_DRIVER] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.DXE_RUNTIME_DRIVER] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.UEFI_APPLICATION] > + FILE APPLICATION = $(NAMED_GUID) { > + UI STRING ="$(MODULE_NAME)" Optional > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + } > + > +[Rule.Common.UEFI_DRIVER.BINARY] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional |.depex > + PE32 PE32 |.efi > + UI STRING="$(MODULE_NAME)" Optional > + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) > + } > + > +[Rule.Common.UEFI_APPLICATION.BINARY] > + FILE APPLICATION = $(NAMED_GUID) { > + PE32 PE32 |.efi > + UI STRING="$(MODULE_NAME)" Optional > + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) > + } > + > + > + > diff --git a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > new file mode 100644 > index 000000000000..c3c0d7242082 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > @@ -0,0 +1,49 @@ > +#/** @file > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x00010005 0x1000001B? > + BASE_NAME = IntelPlatformDxe > + FILE_GUID = AB87E291-1689-4c7b-B613-FB54A0E38CEA > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = IntelPlatformDxeEntryPoint > + > +[Sources.common] > + IntelPlatformDxe.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + MdePkg/MdePkg.dec > + EmbeddedPkg/EmbeddedPkg.dec Can you sort these alphabetically please? (I.e., move above line up one step.) > + > +[LibraryClasses] > + ArmLib > + BaseMemoryLib > + DebugLib > + DxeServicesTableLib > + PcdLib > + PrintLib > + SerialPortLib > + UefiBootServicesTableLib > + UefiRuntimeServicesTableLib > + UefiLib > + UefiDriverEntryPoint > + Drop the extra blank line. > + > +[Depex] > + # We depend on these protocols to create the default boot entries > + gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid > diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > new file mode 100644 > index 000000000000..83649c95c9c3 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > @@ -0,0 +1,49 @@ > +/** @file > +* > +* Stratix 10 Platform Library > +* > +* Copyright (c) 2019, Intel Corporations All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +[Defines] > + INF_VERSION = 0x00010005 0x0001001B? > + BASE_NAME = Stratix10PlatformLib > + FILE_GUID = 99E236C7-D5FD-42A0-B520-60C85C4870B8 > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = ArmPlatformLib > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + ArmPkg/ArmPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Platform/Intel/Stratix10/Stratix10SoCPkg.dec > + > +[LibraryClasses] > + ArmLib > + ArmMmuLib > + DebugLib > + IoLib > + PcdLib > + > +[Sources.common] > + Stratix10PlatformLib.c > + Stratix10Mmu.c > + > +[Sources.AArch64] > + AArch64/ArmPlatformHelper.S > + > +[FixedPcd] > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask > + gArmTokenSpaceGuid.PcdArmPrimaryCore > + > diff --git a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > new file mode 100644 > index 000000000000..144b4c54ef55 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > @@ -0,0 +1,43 @@ > +/** @file > +* > +* Copyright (c) 2019, Intel All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > + > +#include <Uefi.h> > +#include <Guid/GlobalVariable.h> > +#include <Library/ArmLib.h> > +#include <Library/BaseLib.h> > +#include <Library/BaseMemoryLib.h> > +#include <Library/DebugLib.h> > +#include <Library/DevicePathLib.h> > +#include <Library/DxeServicesTableLib.h> > +#include <Library/IoLib.h> > +#include <Library/MemoryAllocationLib.h> > +#include <Library/PrintLib.h> > +#include <Library/UefiBootServicesTableLib.h> > +#include <Library/UefiLib.h> > +#include <Library/UefiRuntimeServicesTableLib.h> > +#include <Protocol/DevicePathFromText.h> > + > +EFI_STATUS > +EFIAPI > +IntelPlatformDxeEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status = 0; > + > + return Status; > +} > + > diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > new file mode 100644 > index 000000000000..ed4aa2bdb12a > --- /dev/null > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > @@ -0,0 +1,155 @@ > +/** @file > +* > +* Stratix 10 Mmu configuration > +* > +* Copyright (c) 2019, Intel Corporations All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include <Library/ArmLib.h> > +#include <Library/ArmMmuLib.h> > +#include <Library/ArmPlatformLib.h> > +#include <Library/BaseMemoryLib.h> > +#include <Library/DebugLib.h> > +#include <Library/IoLib.h> > +#include <Library/MemoryAllocationLib.h> > +#include <Library/PcdLib.h> > +#include <Library/TimerLib.h> > + > +// The total number of descriptors, including the final "end-of-table" descriptor. > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 > +ARM_MEMORY_REGION_DESCRIPTOR gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; > + > +// DDR attributes > +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > + > +#define DRAM_BASE 0x0 > +#define DRAM_SIZE 0x40000000 > + > +#define FPGA_SLAVES_BASE 0x80000000 > +#define FPGA_SLAVES_SIZE 0x60000000 > + > +#define PERIPHERAL_BASE 0xF7000000 > +#define PERIPHERAL_SIZE 0x08E00000 > + > +#define OCRAM_BASE 0xFFE00000 > +#define OCRAM_SIZE 0x00100000 > + > +#define GIC_BASE 0xFFFC0000 > +#define GIC_SIZE 0x00008000 > + > +#define MEM64_BASE 0x0100000000 > +#define MEM64_SIZE 0x1F00000000 > + > +#define DEVICE64_BASE 0x2000000000 > +#define DEVICE64_SIZE 0x0100000000 > +/** > + Return the Virtual Memory Map of your platform > + > + This Virtual Memory Map is used to initialize the MMU for DXE Phase. > + > + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > + Virtual Memory mapping. This array must be ended by a zero-filled > + entry > + > +**/ > +VOID > +EFIAPI > +ArmPlatformGetVirtualMemoryMap ( > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > + ) > +{ > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > + UINTN Index = 0; > + > + VirtualMemoryTable = &gVirtualMemoryTable[0]; > + > + CacheAttributes = DDR_ATTRIBUTES_CACHED; Funky indentation. > + > + // Start create the Virtual Memory Map table > + // Our goal is to a simple 1:1 mapping where virtual==physical address > + > + // DDR SDRAM > + VirtualMemoryTable[Index].PhysicalBase = DRAM_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = DRAM_SIZE; Please add a space, or uniformly use only one. > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > + > + // FPGA > + VirtualMemoryTable[Index].PhysicalBase = FPGA_SLAVES_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = FPGA_SLAVES_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // DEVICE 142MB > + VirtualMemoryTable[Index].PhysicalBase = PERIPHERAL_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = PERIPHERAL_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // OCRAM 1MB but available 256KB > + VirtualMemoryTable[Index].PhysicalBase = OCRAM_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = OCRAM_SIZE; > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > + > + // DEVICE 32KB > + VirtualMemoryTable[Index].PhysicalBase = GIC_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = GIC_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // MEM 124GB > + VirtualMemoryTable[Index].PhysicalBase = MEM64_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = MEM64_SIZE; > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > + > + // DEVICE 4GB > + VirtualMemoryTable[Index].PhysicalBase = DEVICE64_BASE; > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = DEVICE64_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // End of Table > + VirtualMemoryTable[Index].PhysicalBase = 0; > + VirtualMemoryTable[Index].VirtualBase = 0; > + VirtualMemoryTable[Index].Length = 0; > + VirtualMemoryTable[Index++].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; > + > + ASSERT((Index) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > + > + *VirtualMemoryMap = VirtualMemoryTable; > +} > + > + > +VOID > +EFIAPI > +InitMmu ( > + VOID > + ) > +{ > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > + VOID *TranslationTableBase; > + UINTN TranslationTableSize; > + RETURN_STATUS Status; > + // Construct a Virtual Memory Map for this platform > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > + > + // Configure the MMU > + Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); > + } > +} > + > diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > new file mode 100644 > index 000000000000..6bee4d5d43e8 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > @@ -0,0 +1,167 @@ > +/** @file > +* > +* Stratix 10 Platform Library > +* > +* Copyright (c) 2019, Intel Corporations All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include <Library/ArmLib.h> > +#include <Library/ArmPlatformLib.h> > +#include <Library/DebugLib.h> > +#include <Library/IoLib.h> > +#include <Library/PcdLib.h> > +#include <Ppi/ArmMpCoreInfo.h> > +#include <Library/TimerLib.h> Please swap order of above two lines to sort alphabetically. > + > +#define ALT_RSTMGR_OFST 0xffd11000 > +#define ALT_RSTMGR_PER1MODRST_OFST 0x28 > +#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK 0x00000001 > +#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK 0xffffffef Please align values horizontally *or* stick to single spaces. > + > + Please use STATIC for all local helper functions. > +VOID > +AssertWatchDogTimerZeroReset ( > + VOID > + ) > +{ > + // Assert the Reset signal of Watchdog Timer 0 which may have been enabled by BootROM > + MmioOr32 (ALT_RSTMGR_OFST + > + ALT_RSTMGR_PER1MODRST_OFST, > + ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK); > +} > + > +VOID > +DeassertSystemTimerZeroReset ( > + VOID > + ) > +{ > + // Assert the Reset signal of Watchdog Timer 0 which may have been enabled by BootROM > + MmioAnd32 (ALT_RSTMGR_OFST + > + ALT_RSTMGR_PER1MODRST_OFST, > + ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK); > +} > + > + > +/** > + * Return the current Boot Mode > + * > + * This function returns the boot reason on the platform > + * > + * **/ > +EFI_BOOT_MODE > +ArmPlatformGetBootMode ( > + VOID > + ) > +{ > + return BOOT_WITH_FULL_CONFIGURATION; > +} > + > + > +/** > + Initialize controllers that must setup before entering PEI MAIN > +**/ > +RETURN_STATUS > +ArmPlatformInitialize ( > + IN UINTN MpId > + ) > +{ > + AssertWatchDogTimerZeroReset(); > + return EFI_SUCCESS; > +} > + > +//----------------------------------------------------------------------------------------- > +// BEGIN ARM CPU RELATED CODE > +//----------------------------------------------------------------------------------------- > + > +// This Table will be consume by Hob init code to publish it into HOB as MPCore Info > +// Hob init code will retrieve it by calling PrePeiCoreGetMpCoreInfo via Ppi > +ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = { I *think* the coding style says to put all global variables before any function definitions. (Oh, and STATIC please.) > + { > + // Cluster 0, Core 0 > + 0x0, 0x0, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + }, > + { > + // Cluster 0, Core 1 > + 0x0, 0x1, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + }, > + { > + // Cluster 0, Core 2 > + 0x0, 0x2, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + }, > + { > + // Cluster 0, Core 3 > + 0x0, 0x3, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + } > +}; > + > +EFI_STATUS > +PrePeiCoreGetMpCoreInfo ( > + OUT UINTN *CoreCount, > + OUT ARM_CORE_INFO **ArmCoreTable > + ) > +{ > + *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / sizeof(ARM_CORE_INFO); Can use ARRAY_SIZE macro from Base.h. > + *ArmCoreTable = mArmPlatformNullMpCoreInfoTable; > + return EFI_SUCCESS; > +} > + > +// This will be consume by PrePeiCore to install Ppi > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore > +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; > + > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { > + { > + EFI_PEI_PPI_DESCRIPTOR_PPI, > + &mArmMpCoreInfoPpiGuid, > + &mMpCoreInfoPpi > + } > +}; > + > +VOID > +ArmPlatformGetPlatformPpiList ( > + OUT UINTN *PpiListSize, > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > + ) > +{ > + *PpiListSize = sizeof(gPlatformPpiTable); > + *PpiList = gPlatformPpiTable; > +} > + > +//----------------------------------------------------------------------------------------- > +// END ARM CPU RELATED CODE > +//----------------------------------------------------------------------------------------- > + > diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S > new file mode 100644 > index 000000000000..2f4cf95cbf13 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S > @@ -0,0 +1,51 @@ > +// > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > +// > +// This program and the accompanying materials > +// are licensed and made available under the terms and conditions of the BSD License > +// which accompanies this distribution. The full text of the license may be found at > +// http://opensource.org/licenses/bsd-license.php > +// > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +// > +// > + > +#include <AsmMacroIoLibV8.h> > +#include <Library/ArmLib.h> > + > +ASM_FUNC(ArmPlatformPeiBootAction) > + ret > + > +//UINTN > +//ArmPlatformGetCorePosition ( > +// IN UINTN MpId > +// ); > +// With this function: CorePos = (ClusterId * 4) + CoreId > +ASM_FUNC(ArmPlatformGetCorePosition) > + and x1, x0, #ARM_CORE_MASK > + and x0, x0, #ARM_CLUSTER_MASK > + add x0, x1, x0, LSR #6 > + ret > + > +//UINTN > +//ArmPlatformGetPrimaryCoreMpId ( > +// VOID > +// ); > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > + ret > + > +//UINTN > +//ArmPlatformIsPrimaryCore ( > +// IN UINTN MpId > +// ); > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > + and x0, x0, x1 > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > + cmp w0, w1 > + mov x0, #1 > + mov x1, #0 > + csel x0, x0, x1, eq > + ret > diff --git a/Platform/Intel/Stratix10/Readme.md b/Platform/Intel/Stratix10/Readme.md > new file mode 100644 > index 000000000000..334439fa9a47 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Readme.md > @@ -0,0 +1,61 @@ > +Intel Stratix 10 Platform > +========================= > + > +# Summary > + > +This is a port of 64-bit Tiano Core UEFI for the Intel Stratix 10 platform > +based on Stratix 10 SX development board. > + > +This UEFI port works with ATF + UEFI implementation for Intel Stratix 10 board, and > +will boot to Linux port of Stratix 10. > + > +# Status > + > +This firmware has been validated to boot to Linux for Stratix 10 that can be obtained from > +https://github.com/altera-opensource/linux-socfpga. > + > +The default boot is the UEFI shell. The UEFI > +shell will run startup.nsh by default, and you may change the startup.nsh to run commands on boot. > + > +# Building the firmware > + > +- Fetch the ATF, edk2, and edk2-platforms repositories into local host. ATF is https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git ? It *is* useful to list known working ATF/edk2 commits/tags. > + Make all the repositories in the same ${BUILD\_PATH}. > + > +- Install the AARCH64 GNU 4.8 toolchain. Yaiks. Hopefully something newer. Anyway, can probably leave this step out. > + > +- Build UEFI using Stratix 10 platform as configuration > + > + . edksetup.sh > + > + build -a AARCH64 -p Platform/Intel/Stratix10/Stratix10SoCPkg.dsc -t GCC48 -b RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y FLASH -Y DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS And I would prefer GCC5 here, with a note to use GCC48 if using that version toolchain. > + > +Note: Refer to build instructions from the top level edk2-platforms Readme.md for further details > + > +- Build ATF for Stratix 10 platform > + > + make CROSS_COMPILE=aarch64-linux-gnu- device=s10 > + > +- Build atf providing the previously generated UEFI as the BL33 image > + > + make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=stratix10 > + BL33=PEI.ROM > + > +Install Procedure > +----------------- > + > +- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10 > + board. > + > +- Generate a SOF containing bl2 > + > +.. code:: bash > + aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex > + quartus_cpf --bootloader bl2.hex <quartus_generated_sof> <output_sof_with_bl2> > + > +- Configure SOF to board > + > +.. code:: bash > + nios2-configure-sof <output_sof_with_bl2> > + > + > diff --git a/Platform/Intel/Stratix10/ShellScript/startup.nsh b/Platform/Intel/Stratix10/ShellScript/startup.nsh > new file mode 100644 > index 000000000000..8c4067972c5b > --- /dev/null > +++ b/Platform/Intel/Stratix10/ShellScript/startup.nsh > @@ -0,0 +1,2 @@ > +Image dtb=socfpga_stratix10_socdk.dtb console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait I don't really see the point in adding the file for a oneliner. I'd rather see it in the Readme.md. Speaking of which, can you also add a link in edk2-platforms/Readme.md to *this* Readme.md? Also, we should look into having the DT provided by the firmware instead of passed on the command line. And manually specifying console is very 2014 - use stdout-path in the DT. / Leif > + > -- > 2.19.0 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#41619): https://edk2.groups.io/g/devel/message/41619 Mute This Topic: https://groups.io/mt/31553242/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
Leif, thanks for reviewing, a question inlined. > -----Original Message----- > From: Leif Lindholm <leif.lindholm@linaro.org> > Sent: Wednesday, May 29, 2019 10:43 PM > To: Loh, Tien Hock <tien.hock.loh@intel.com> > Cc: devel@edk2.groups.io; thloh85@gmail.com; Ard Biesheuvel > <ard.biesheuvel@linaro.org>; Kinney, Michael D > <michael.d.kinney@intel.com> > Subject: Re: [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add Stratix 10 > platform support > > Urgh, sorry, saw this was still stuck in my review queue. > No problem, thanks for reviewing. > Mike, one question for you inline below. > Oh, and one here - what's your take on maintainership for ARM-based > Intel platforms? Fall back to top-level maintainers and add Tien Hock > as reviewer? > > On Thu, May 09, 2019 at 04:55:47PM +0800, tien.hock.loh@intel.com wrote: > > From: "Tien Hock, Loh" <tien.hock.loh@intel.com> > > > > Adds support for Intel Stratix 10 Platform. > > > > Signed-off-by: "Tien Hock, Loh" <tien.hock.loh@intel.com> > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Yeah, so amusingly we've now updated the license, so we don't need > this tag any longer... > > > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > Cc: Leif Lindholm <leif.lindholm@linaro.org> > > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > > > -- > > v4 > > - Removed LibC > > - Added NOOPT to BUILD_TARGETS > > - Removed ARM from SUPPORTED_ARCHITECTURE > > v3 > > - Updated Pcd with updated name > > v2 > > - Updates ShellBinPkg with ShellPkg > > Revision history goes below --- or in cover letter. > > > --- > > Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 546 > ++++++++++++++++++++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 > ++++++++++ > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > | 49 ++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf | > 49 ++ > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > | 43 ++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c | > 155 ++++++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > | 167 ++++++ > > > Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp > er.S | 51 ++ > > Platform/Intel/Stratix10/Readme.md | 61 +++ > > Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 + > > 11 files changed, 1423 insertions(+) > > > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > new file mode 100755 > > index 000000000000..5677ac7676d5 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > @@ -0,0 +1,30 @@ > > +#/** @file > > +# Intel Stratix 10 SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > available under > > +# the terms and conditions of the BSD License which accompanies this > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > ... and as a result of the license change, could you also please > replace these > > Mike Kinney may actually have some scripts that would help with this? OK noted. If there are scripts that can automate the license header changes I'd love to use it :) > > > +# > > +#**/ > > + > > +[Defines] > > + DEC_SPECIFICATION = 0x00010005 > > We could probably bump this to the current DSC specification format? > I think we're on 0x0001001B? (1.27) OK noted. > > > + PACKAGE_NAME = IntelSoCFpgaPkg > > Should this be Stratix10SoCPkg? > > > + PACKAGE_GUID = 45533DD0-C41F-4ab6-A5DF-65B52684AC60 > > + PACKAGE_VERSION = 0.1 > > + > > +[Includes.common] > > Add "Include" here, and you won't need to add manual -I flags below. > OK > > + > > +[Guids.common] > > + gIntelSocFpgaTokenSpaceGuid = { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, > 0xa, 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } } > > This sounds like a very generic TokenSpaceGuid name that perhaps > belongs in a package shared by many platforms. Should this one just be > called gStratix10SoCTokenSpaceGuid? > OK I'll regenerate a Guid here. > Please add a blank line before next section header. > OK > > +[PcdsFeatureFlag.common] > > + > > +[PcdsFixedAtBuild.common] > > + > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > new file mode 100755 > > index 000000000000..5665ac6c8982 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > @@ -0,0 +1,546 @@ > > +#/** @file > > +# Intel Stratix 10 SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > available under > > +# the terms and conditions of the BSD License which accompanies this > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > + > > > +############################################################### > ################# > > +# > > +# Defines Section - statements that will be processed to create a Makefile. > > +# > > > +############################################################### > ################# > > +[Defines] > > + PLATFORM_NAME = Intel Stratix 10 SoC Development Board > > + PLATFORM_GUID = A2D10D02-7C36-4de8-831B-EFBFC2092D1B > > + PLATFORM_VERSION = 0.1 > > + FIRMWARE_VERSION = 1.0 > > + DSC_SPECIFICATION = 0x00010005 > > 0x000101C? > > > + SUPPORTED_ARCHITECTURES = AARCH64 > > + BUILD_TARGETS = DEBUG|RELEASE|NOOPT > > + SKUID_IDENTIFIER = DEFAULT > > + FLASH_DEFINITION = > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > + OUTPUT_DIRECTORY = Build/Stratix10SoCPkg > > + USE_ARM_BDS = FALSE > > Oh, the ArmBds it thankfully long gone, so no need for the above line > :) > > > + SECURE_BOOT_ENABLE = FALSE > > + > > > +############################################################### > ################# > > +# > > +# Pcd Section - list of all EDK II PCD Entries defined by this Platform > > +# > > > +############################################################### > ################# > > + > > +[PcdsFixedAtBuild.common] > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > > + gArmPlatformTokenSpaceGuid.PcdCoreCount|1 > > + > > + # Stacks for MPCores in PEI Phase > > + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000 > > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x30000 > > + > > + # ARM L2x0 PCDs > > + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000 > > + > > + # ARM GIC > > + gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000 > > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2000 > > + > > + # ARM Floating Point architecture (VFP) > > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > > + > > + # System Memory (1GB, minus reserved memory for Linux PSCI calls) > > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000 > > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000 > > + > > + # Arm Architectural Timer > > + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000 > > + > > + # Trustzone Enable > > + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE > > + > > + #------------------------------- > > + # gEfiMdeModulePkgTokenSpaceGuid > > + #------------------------------- > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWA > RE_VERSION)" > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > > + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > > + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 > > + > > + # DEBUG_ASSERT_ENABLED 0x01 > > + # DEBUG_PRINT_ENABLED 0x02 > > + # DEBUG_CODE_ENABLED 0x04 > > + # CLEAR_MEMORY_ENABLED 0x08 > > + # ASSERT_BREAKPOINT_ENABLED 0x10 > > + # ASSERT_DEADLOOP_ENABLED 0x20 > > +!if $(TARGET) == RELEASE > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!else > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!endif > > + > > + # DEBUG_INIT 0x00000001 // Initialization > > + # DEBUG_WARN 0x00000002 // Warnings > > + # DEBUG_LOAD 0x00000004 // Load events > > + # DEBUG_FS 0x00000008 // EFI File system > > + # DEBUG_POOL 0x00000010 // Alloc & Free's > > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > > + # DEBUG_INFO 0x00000040 // Verbose > > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers > > + # DEBUG_VARIABLE 0x00000100 // Variable > > + # DEBUG_BM 0x00000400 // Boot Manager > > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > > + # DEBUG_NET 0x00004000 // SNI Driver > > + # DEBUG_UNDI 0x00010000 // UNDI Driver > > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > > + # DEBUG_EVENT 0x00080000 // Event messages > > + # DEBUG_GCD 0x00100000 // Global Coherency Database changes > > + # DEBUG_CACHE 0x00200000 // Memory range cachability changes > > + # DEBUG_ERROR 0x80000000 // Error > > +# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F > > + > > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00 > > + > > + #------------------------------- > > + # gEmbeddedTokenSpaceGuid > > + #------------------------------- > > + > > + # MMC > > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808000 > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|50000000 > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25000000 > > + > > + # > > + # Optional feature to help prevent EFI memory map fragments > > + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob > > + # Values are in EFI Pages (4K). DXE Core will make sure that > > + # at least this much of each type of memory can be allocated > > + # from a single memory range. This way you only end up with > > + # maximum of two fragements for each type in the memory map > > + # (the memory used, and the free memory that was prereserved > > + # but not used). > > + # > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|8192 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > > + > > + # We want to use the Shell Libraries but don't want it to initialise > > + # automatically. We initialise the libraries when the command is called by > the > > + # Shell. > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + > > + # Pcd Settings - UART Serial Terminal > > + # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000. > > + # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100. > > Drop the extra space on the UART1 line compared to the UART0 one. OK > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|32 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xFFC02000 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|100000000 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF, 0xFF, > 0xFF, 0xFF, 0xFF} > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > > + > > + # ConColumn/Row > > + > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutSetupVar > "|gArmGlobalVariableGuid|0x0|132 > > + > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutSetupVar"|g > ArmGlobalVariableGuid|0x4|43 > > In general, delete any commented out settings in this file. (The > exception I won't complain on is PcdDebugPrintErrorLevel above.) OK noted. Thanks! > > > + > > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > > + > > + # RunAxf support via Dynamic Shell Command protocol > > + # We want to use the Shell Libraries but don't want it to initialise > > + # automatically. We initialise the libraries when the command is called by > the > > + # Shell. > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + > > + > > + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, > 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, > 0x23, 0x31 } > > + > > +!if $(USE_ARM_BDS) == FALSE > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationCh > ange|FALSE > > +!endif > > + > > +# TODO: Add suppot for secure boot > > Well. You could just leave this bit out for now and add it when ready. OK > > > +!if $(SECURE_BOOT_ENABLE) == TRUE > > + # override the default values from SecurityPkg to ensure images from all > sources are verified in secure boot > > + > gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > > + > gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 > > + > gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy > |0x04 > > +!endif > > + > > + > > +[PcdsFeatureFlag.common] > > + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE > > + > > + > > + # Use the Vector Table location in CpuDxe. We will not copy the Vector > Table at PcdCpuVectorBaseAddress > > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > > + > > + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE > > + # If TRUE, Graphics Output Protocol will be installed on virtual handle > created by ConsplitterDxe. > > + # Set FALSE to save size. > > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE > > + > > + > > +[LibraryClasses.common] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterL > ib/ArmGenericTimerPhyCounterLib.inf > > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > > + > ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler > Lib.inf > > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > > + > ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatfo > rmLib.inf > > + > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > + > > Drop one of the blank lines above. > > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > > + > ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlat > formStackLib.inf > > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > > + > CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCache > MaintenanceLib.inf > > + > CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib > .inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > > + > DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/De > faultExceptionHandlerLib.inf > > + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > > + > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTable > Lib.inf > > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BaseP > eCoffGetEntryPointLib.inf > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > + > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformance > LibNull.inf > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRea > lTimeClockLib.inf > > + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf > > + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > > + > > + > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort > Lib16550.inf > > + > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePla > tformHookLibNull.inf > > + > > + > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniz > ationLib.inf > > + > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBoot > ManagerLib.inf > > + > PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/Platfor > mBootManagerLib.inf #thloh > > + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf > #thloh > > + > > + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf > > + > > + > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiAp > plicationEntryPoint.inf > > + > UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo > tServicesTableLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryP > oint.inf > > + > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServices > Lib.inf > > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > > + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > > + > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/ > UefiRuntimeServicesTableLib.inf > > + > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > > + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf > > + # > > + # Secure Boot dependencies > > + # > > +!if $(SECURE_BOOT_ENABLE) == TRUE > > + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf > > + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > > + > TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTp > mMeasurementLib.inf > > + > AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > > + > > + # re-use the UserPhysicalPresent() dummy implementation from the > ovmf tree > > + > PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.in > f > > +!else > > + > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/Tp > mMeasurementLibNull.inf > > + > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableL > ibNull.inf > > +!endif > > + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > > + > > +!if $(USE_ARM_BDS) == FALSE > > So you can drop this conditional. > > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.in > f > > + > GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBd > sLib.inf > > + > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Custo > mizedDisplayLib.inf > > +!endif > > + > > + #------------------------------- > > + # Networking Requirements > > + #------------------------------- > > + DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf > > + IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf > > + NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf > > + UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf > > This may be useful to migrate to using the configuration fragments > recently added in NetworkPkg. > > For an example, see edk2-platforms commit 433d42794d0d. > > > + > > + #------------------------------- > > + # These libraries are used by the dynamic EFI Shell commands > > + #------------------------------- > > + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > > + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > > + > > + #------------------------------- > > + # Build Debug / Release > > + #------------------------------- > > +!if $(TARGET) == RELEASE > > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > > +!else > > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.i > nf > > +!endif > > + > > + > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLib > Null.inf > > + > DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/Debu > gAgentTimerLibNull.inf > > + > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/Base > DebugPrintErrorLevelLib.inf > > + > PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeC > offExtraActionLib.inf > > + > > +[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLi > b/PrePiExtractGuidedSectionLib.inf > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/Lz > maCustomDecompressLib.inf > > + > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > + > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PreP > iHobListPointerLib.inf > > + > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/Pre > PiMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformance > Lib.inf > > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > > + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER, > LibraryClasses.common.UEFI_APPLICATION, > LibraryClasses.common.UEFI_DRIVER] > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf > > + > > +[LibraryClasses.common.PEI_CORE] > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLi > b/PrePiExtractGuidedSectionLib.inf > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/Lz > maCustomDecompressLib.inf > > + > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemory > AllocationLib.inf > > + > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNu > ll/OemHookStatusCodeLibNull.inf > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BaseP > eCoffGetEntryPointLib.inf > > + > PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformance > Lib.inf > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PreP > iHobListPointerLib.inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + #thloh > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiRe > portStatusCodeLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/PeiCrc32GuidedSe > ctionExtractLib/PeiCrc32GuidedSectionExtractLib.inf > > + > > +[LibraryClasses.common.DXE_CORE] > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.i > nf > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > xtractGuidedSectionLib.inf > > + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > > + > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib > /DxeCoreMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCoreP > erformanceLib.inf > > + # thloh > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > > Drop commented-out line. OK > > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER] > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLi > b/DxeSecurityManagementLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforman > ceLib.inf > > + > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > > I think all of these are going away. Try to migrate over to > MdeModulePkg version instead. > > > + > > +[LibraryClasses.common.UEFI_APPLICATION] > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforman > ceLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > > +[LibraryClasses.common.UEFI_DRIVER] > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > xtractGuidedSectionLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforman > ceLib.inf > > + > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > > +!if $(SECURE_BOOT_ENABLE) == TRUE > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > > +!endif > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.in > f > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > > + # > > + # PSCI support in EL3 may not be available if we are not running under a > PSCI > > + # compliant secure firmware, but since the default VExpress > EfiResetSystemLib > > + # cannot be supported at runtime (due to the fact that the syscfg MMIO > registers > > + # cannot be runtime remapped), it is our best bet to get ResetSystem > functionality > > + # on these platforms. > > + # > > + > EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSys > temLib.inf > > + > > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > > + # It is not possible to prevent the ARM compiler for generic intrinsic > functions. > > + # This library provides the instrinsic functions generate by a given > compiler. > > + # [LibraryClasses.ARM] and NULL mean link this library into all ARM > images. > > + # > > + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf > > + > > + # Add support for GCC stack protector > > + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > > + > > > +############################################################### > ################# > > +# > > +# Components Section - list of all EDK II Modules needed by this Platform > > +# > > > +############################################################### > ################# > > +[Components.common] > > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > > + <LibraryClasses> > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > > + > > + ArmPlatformPkg/PrePi/PeiUniCore.inf { > > + <LibraryClasses> > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + # > > + # DXE > > + # > > + MdeModulePkg/Core/Dxe/DxeMain.inf { > > + <LibraryClasses> > > + #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32G > uidedSectionExtractLib.inf > > + } > > + > > + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + MdeModulePkg/Application/UiApp/UiApp.inf { > > + <LibraryClasses> > > + > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > > + > NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf > > + > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMainten > anceManagerUiLib.inf > > + } > > + > > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf > > + > > + FatPkg/EnhancedFatDxe/Fat.inf > > + > > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > > + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + > > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > + > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDx > e.inf > > + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > + > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > + > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > > + > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.in > f > > + > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCount > erRuntimeDxe.inf > > + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > + > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { > > + <LibraryClasses> > > + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf > > + } > > + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > > + > > + # Multimedia Card Interface > > + EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Shell > > + ShellPkg/Application/Shell/Shell.inf { > > + <LibraryClasses> > > + > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellComman > dLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2Comma > ndsLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1Comma > ndsLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3Comma > ndsLib.inf > > + > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Comm > andsLib.inf > > + > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Com > mandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1Comm > andsLib.inf > > + > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1C > ommandsLib.inf > > + > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingL > ib.inf > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgC > ommandLib.inf > > + > > + <PcdsFixedAtBuild> > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 > > + } > > + > > + # > > + # Platform Specific Init for DXE phase > > + # > > + Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > + > > +[BuildOptions] > > + #------------------------------- > > + # Common > > + #------------------------------- > > + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -fstack-protector - > O2 -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security > > -fstack-protector already set by default, as is -O2 for RELEASE, so > please drop these. > > -Wformat and -Wformat-security are not, but they are hardly platform > specific - so please send an RFC patch adding this to > BaseTools/Conf/tools_def.template (with me and Ard on cc), and let us > have a conversation about whether it should be default on ARM/AARCH64. > > Same for FORTIFY_SOURCE (which I see we explicitly set to 0 for the > Synquacer platforms). > > > + GCC:RELEASE_*_*_DLINK_FLAGS = -z noexecstack -z relro -z now > > Please also send an RFC for this to BaseTools. > > > + > > + #------------------------------- > > + # IntelPlatformPkg/... > > Umm, no it isn't? > > > + #------------------------------- > > + GCC:DEBUG_*_AARCH64_PLATFORM_FLAGS = - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -Wno-unused-but-set- > variable #-mstrict-align > > + GCC:RELEASE_*_AARCH64_PLATFORM_FLAGS = - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -DMDEPKG_NDEBUG - > DMDEPKG_NDEBUG # -mstrict-align > > - Delete the already commented-out -mstrict-align bits from both lines. > - Drop the (duplicated) -I flag from both lines - this will be created > automagically when you update the [Includes.common] section of the > .dec as suggested. > - Please don't override the optimization level. > - -DMDEPKG_NDEBUG is already set for RELEASE targets by the > non-AARCH64-specific entries above. > - Please drop the -Wno-unused-but-set-variable and let us fix > instances that trigger the warning instead. OK noted. > > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > new file mode 100755 > > index 000000000000..cab6536b5350 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > @@ -0,0 +1,270 @@ > > +#/** @file > > +# Intel SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > available under > > +# the terms and conditions of the BSD License which accompanies this > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > > +############################################################### > ################# > > +# > > +# FD Section > > +# The [FD] Section is made up of the definition statements and a > > +# description of what goes into the Flash Device Image. Each FD section > > +# defines one flash "device" image. A flash device image may be one of > > +# the following: Removable media bootable image (like a boot floppy > > +# image,) an Option ROM image (that would be "flashed" into an add-in > > +# card,) a System "Flash" image (that would be burned into a system's > > +# flash) or an Update ("Capsule") image that will be used to update and > > +# existing system flash. > > +# > > > +############################################################### > ################# > > + > > +[FD.IntelStratix10_EFI] > > +BaseAddress = 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # > The base address of the Firmware in remapped DRAM. > > +Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in > bytes > > +ErasePolarity = 1 > > +BlockSize = 0x00000001 > > +NumBlocks = 0x00400000 > > + > > > +############################################################### > ################# > > +# > > +# FD Region layout > > +# > > +# A Layout Region start with a eight digit hex offset (leading "0x" required) > > +# followed by the pipe "|" character, > > +# followed by the size of the region, also in hex with the leading "0x" > characters. > > +# Must be defined in ascending order and may not overlap. > > +# Like: > > +# Offset|Size > > +# PcdOffsetCName|PcdSizeCName > > +# RegionType <FV, DATA, or FILE> > > +# > > > +############################################################### > ################# > > +0x00000000|0x00400000 > > > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > > +FV = FV_PEIDXE > > + > > +[FV.FV_PEIDXE] > > +FvAlignment = 8 > > +ERASE_POLARITY = 1 > > +MEMORY_MAPPED = TRUE > > +STICKY_WRITE = TRUE > > +LOCK_CAP = TRUE > > +LOCK_STATUS = TRUE > > +WRITE_DISABLED_CAP = TRUE > > +WRITE_ENABLED_CAP = TRUE > > +WRITE_STATUS = TRUE > > +WRITE_LOCK_CAP = TRUE > > +WRITE_LOCK_STATUS = TRUE > > +READ_DISABLED_CAP = TRUE > > +READ_ENABLED_CAP = TRUE > > +READ_STATUS = TRUE > > +READ_LOCK_CAP = TRUE > > +READ_LOCK_STATUS = TRUE > > + > > + INF ArmPlatformPkg/PrePi/PeiUniCore.inf > > + > > + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF > PROCESSING_REQUIRED = TRUE { > > + SECTION FV_IMAGE = FV_DXE > > + } > > + } > > + > > +[FV.FV_DXE] > > +BlockSize = 0x00000001 > > +NumBlocks = 0 # This FV gets compressed so make it just big > enough > > +FvAlignment = 8 # FV alignment and FV attributes setting. > > +ERASE_POLARITY = 1 > > +MEMORY_MAPPED = TRUE > > +STICKY_WRITE = TRUE > > +LOCK_CAP = TRUE > > +LOCK_STATUS = TRUE > > +WRITE_DISABLED_CAP = TRUE > > +WRITE_ENABLED_CAP = TRUE > > +WRITE_STATUS = TRUE > > +WRITE_LOCK_CAP = TRUE > > +WRITE_LOCK_STATUS = TRUE > > +READ_DISABLED_CAP = TRUE > > +READ_ENABLED_CAP = TRUE > > +READ_STATUS = TRUE > > +READ_LOCK_CAP = TRUE > > +READ_LOCK_STATUS = TRUE > > +FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c > > + > > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > + INF > EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > > + > > + # > > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > > + # > > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > + INF > MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > + INF > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > > + INF > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > > + INF > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCount > erRuntimeDxe.inf > > + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > > + > > + # Multiple Console IO support > > + INF > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > + INF > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > + > > + # ARM packages > > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > > + > > + # FAT filesystem + GPT/MBR partitioning > > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > + INF FatPkg/EnhancedFatDxe/Fat.inf > > + INF > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > + > > + # Multimedia Card Interface > > + INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Platform Specific Init for DXE phase > > + INF > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > + > > + # UEFI application (Shell Embedded Boot Loader) > > + INF ShellPkg/Application/Shell/Shell.inf > > + > > + # Bds > > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + INF MdeModulePkg/Application/UiApp/UiApp.inf > > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > + > > + # FV Filesystem > > + INF > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.in > f > > + > > + # Include UEFI Shell Start Up Script > > + FILE FREEFORM = AF3F9E26-DDB5-4e85-B4D7-AC60A2772BC2 { > > + SECTION RAW = Platform/Intel/Stratix10/ShellScript/startup.nsh > > + SECTION UI = "startup.nsh" > > + } > > + > > + > > + > > > +############################################################### > ################# > > +# > > +# Rules are use with the [FV] section's module INF type to define > > +# how an FFS file is created for a given INF file. The following Rule are the > default > > +# rules for the different module type. User can add the customized rules > to define the > > +# content of the FFS file. > > +# > > > +############################################################### > ################# > > + > > + > > > +############################################################### > ############# > > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation > section # > > > +############################################################### > ############# > > +# > > +#[Rule.Common.DXE_DRIVER] > > +# FILE DRIVER = $(NAMED_GUID) { > > +# DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > +# COMPRESS PI_STD { > > +# GUIDED { > > +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > +# UI STRING="$(MODULE_NAME)" Optional > > +# VERSION STRING="$(INF_VERSION)" Optional > BUILD_NUM=$(BUILD_NUMBER) > > +# } > > +# } > > +# } > > +# > > > +############################################################### > ############# > > + > > +[Rule.Common.SEC] > > + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { > > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > > + } > > + > > +[Rule.Common.PEI_CORE] > > + FILE PEI_CORE = $(NAMED_GUID) FIXED { > > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING ="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM] > > + FILE PEIM = $(NAMED_GUID) FIXED { > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM.TIANOCOMPRESSED] > > + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 > PROCESSING_REQUIRED = TRUE { > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + } > > + > > +[Rule.Common.DXE_CORE] > > + FILE DXE_CORE = $(NAMED_GUID) { > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_DRIVER] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_DRIVER] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_RUNTIME_DRIVER] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_APPLICATION] > > + FILE APPLICATION = $(NAMED_GUID) { > > + UI STRING ="$(MODULE_NAME)" Optional > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + } > > + > > +[Rule.Common.UEFI_DRIVER.BINARY] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional |.depex > > + PE32 PE32 |.efi > > + UI STRING="$(MODULE_NAME)" Optional > > + VERSION STRING="$(INF_VERSION)" Optional > BUILD_NUM=$(BUILD_NUMBER) > > + } > > + > > +[Rule.Common.UEFI_APPLICATION.BINARY] > > + FILE APPLICATION = $(NAMED_GUID) { > > + PE32 PE32 |.efi > > + UI STRING="$(MODULE_NAME)" Optional > > + VERSION STRING="$(INF_VERSION)" Optional > BUILD_NUM=$(BUILD_NUMBER) > > + } > > + > > + > > + > > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > new file mode 100644 > > index 000000000000..c3c0d7242082 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > @@ -0,0 +1,49 @@ > > +#/** @file > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials > > +# are licensed and made available under the terms and conditions of the > BSD License > > +# which accompanies this distribution. The full text of the license may be > found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +# > > +#**/ > > + > > +[Defines] > > + INF_VERSION = 0x00010005 > > 0x1000001B? > > > + BASE_NAME = IntelPlatformDxe > > + FILE_GUID = AB87E291-1689-4c7b-B613-FB54A0E38CEA > > + MODULE_TYPE = DXE_DRIVER > > + VERSION_STRING = 1.0 > > + ENTRY_POINT = IntelPlatformDxeEntryPoint > > + > > +[Sources.common] > > + IntelPlatformDxe.c > > + > > +[Packages] > > + ArmPkg/ArmPkg.dec > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + MdePkg/MdePkg.dec > > + EmbeddedPkg/EmbeddedPkg.dec > > Can you sort these alphabetically please? (I.e., move above line up > one step.) > > > + > > +[LibraryClasses] > > + ArmLib > > + BaseMemoryLib > > + DebugLib > > + DxeServicesTableLib > > + PcdLib > > + PrintLib > > + SerialPortLib > > + UefiBootServicesTableLib > > + UefiRuntimeServicesTableLib > > + UefiLib > > + UefiDriverEntryPoint > > + > > Drop the extra blank line. OK > > > + > > +[Depex] > > + # We depend on these protocols to create the default boot entries > > + gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > new file mode 100644 > > index 000000000000..83649c95c9c3 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > @@ -0,0 +1,49 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > BSD License > > +* which accompanies this distribution. The full text of the license may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +[Defines] > > + INF_VERSION = 0x00010005 > > 0x0001001B? > > > + BASE_NAME = Stratix10PlatformLib > > + FILE_GUID = 99E236C7-D5FD-42A0-B520-60C85C4870B8 > > + MODULE_TYPE = BASE > > + VERSION_STRING = 1.0 > > + LIBRARY_CLASS = ArmPlatformLib > > + > > +[Packages] > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + ArmPkg/ArmPkg.dec > > + MdeModulePkg/MdeModulePkg.dec > > + MdePkg/MdePkg.dec > > + Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + ArmMmuLib > > + DebugLib > > + IoLib > > + PcdLib > > + > > +[Sources.common] > > + Stratix10PlatformLib.c > > + Stratix10Mmu.c > > + > > +[Sources.AArch64] > > + AArch64/ArmPlatformHelper.S > > + > > +[FixedPcd] > > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask > > + gArmTokenSpaceGuid.PcdArmPrimaryCore > > + > > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > new file mode 100644 > > index 000000000000..144b4c54ef55 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > @@ -0,0 +1,43 @@ > > +/** @file > > +* > > +* Copyright (c) 2019, Intel All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > BSD License > > +* which accompanies this distribution. The full text of the license may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > + > > +#include <Uefi.h> > > +#include <Guid/GlobalVariable.h> > > +#include <Library/ArmLib.h> > > +#include <Library/BaseLib.h> > > +#include <Library/BaseMemoryLib.h> > > +#include <Library/DebugLib.h> > > +#include <Library/DevicePathLib.h> > > +#include <Library/DxeServicesTableLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/MemoryAllocationLib.h> > > +#include <Library/PrintLib.h> > > +#include <Library/UefiBootServicesTableLib.h> > > +#include <Library/UefiLib.h> > > +#include <Library/UefiRuntimeServicesTableLib.h> > > +#include <Protocol/DevicePathFromText.h> > > + > > +EFI_STATUS > > +EFIAPI > > +IntelPlatformDxeEntryPoint ( > > + IN EFI_HANDLE ImageHandle, > > + IN EFI_SYSTEM_TABLE *SystemTable > > + ) > > +{ > > + EFI_STATUS Status = 0; > > + > > + return Status; > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > new file mode 100644 > > index 000000000000..ed4aa2bdb12a > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > @@ -0,0 +1,155 @@ > > +/** @file > > +* > > +* Stratix 10 Mmu configuration > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > BSD License > > +* which accompanies this distribution. The full text of the license may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include <Library/ArmLib.h> > > +#include <Library/ArmMmuLib.h> > > +#include <Library/ArmPlatformLib.h> > > +#include <Library/BaseMemoryLib.h> > > +#include <Library/DebugLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/MemoryAllocationLib.h> > > +#include <Library/PcdLib.h> > > +#include <Library/TimerLib.h> > > + > > +// The total number of descriptors, including the final "end-of-table" > descriptor. > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 > > +ARM_MEMORY_REGION_DESCRIPTOR > gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; > > + > > +// DDR attributes > > +#define DDR_ATTRIBUTES_CACHED > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > > +#define DDR_ATTRIBUTES_UNCACHED > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > > + > > +#define DRAM_BASE 0x0 > > +#define DRAM_SIZE 0x40000000 > > + > > +#define FPGA_SLAVES_BASE 0x80000000 > > +#define FPGA_SLAVES_SIZE 0x60000000 > > + > > +#define PERIPHERAL_BASE 0xF7000000 > > +#define PERIPHERAL_SIZE 0x08E00000 > > + > > +#define OCRAM_BASE 0xFFE00000 > > +#define OCRAM_SIZE 0x00100000 > > + > > +#define GIC_BASE 0xFFFC0000 > > +#define GIC_SIZE 0x00008000 > > + > > +#define MEM64_BASE 0x0100000000 > > +#define MEM64_SIZE 0x1F00000000 > > + > > +#define DEVICE64_BASE 0x2000000000 > > +#define DEVICE64_SIZE 0x0100000000 > > +/** > > + Return the Virtual Memory Map of your platform > > + > > + This Virtual Memory Map is used to initialize the MMU for DXE Phase. > > + > > + @param[out] VirtualMemoryMap Array of > ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > > + Virtual Memory mapping. This array must be ended > by a zero-filled > > + entry > > + > > +**/ > > +VOID > > +EFIAPI > > +ArmPlatformGetVirtualMemoryMap ( > > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > > + UINTN Index = 0; > > + > > + VirtualMemoryTable = &gVirtualMemoryTable[0]; > > + > > + CacheAttributes = DDR_ATTRIBUTES_CACHED; > > Funky indentation. Sorry my bad, will fix in the next patch. > > > + > > + // Start create the Virtual Memory Map table > > + // Our goal is to a simple 1:1 mapping where virtual==physical address > > + > > + // DDR SDRAM > > + VirtualMemoryTable[Index].PhysicalBase = DRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = DRAM_SIZE; > > Please add a space, or uniformly use only one. > > > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > > + > > + // FPGA > > + VirtualMemoryTable[Index].PhysicalBase = FPGA_SLAVES_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = FPGA_SLAVES_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // DEVICE 142MB > > + VirtualMemoryTable[Index].PhysicalBase = PERIPHERAL_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = PERIPHERAL_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // OCRAM 1MB but available 256KB > > + VirtualMemoryTable[Index].PhysicalBase = OCRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = OCRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > > + > > + // DEVICE 32KB > > + VirtualMemoryTable[Index].PhysicalBase = GIC_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = GIC_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // MEM 124GB > > + VirtualMemoryTable[Index].PhysicalBase = MEM64_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = MEM64_SIZE; > > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > > + > > + // DEVICE 4GB > > + VirtualMemoryTable[Index].PhysicalBase = DEVICE64_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = DEVICE64_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // End of Table > > + VirtualMemoryTable[Index].PhysicalBase = 0; > > + VirtualMemoryTable[Index].VirtualBase = 0; > > + VirtualMemoryTable[Index].Length = 0; > > + VirtualMemoryTable[Index++].Attributes = > (ARM_MEMORY_REGION_ATTRIBUTES)0; > > + > > + ASSERT((Index) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > > + > > + *VirtualMemoryMap = VirtualMemoryTable; > > +} > > + > > + > > +VOID > > +EFIAPI > > +InitMmu ( > > + VOID > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > > + VOID *TranslationTableBase; > > + UINTN TranslationTableSize; > > + RETURN_STATUS Status; > > + // Construct a Virtual Memory Map for this platform > > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > > + > > + // Configure the MMU > > + Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, > &TranslationTableSize); > > + if (EFI_ERROR (Status)) { > > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); > > + } > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > > new file mode 100644 > > index 000000000000..6bee4d5d43e8 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > > @@ -0,0 +1,167 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > BSD License > > +* which accompanies this distribution. The full text of the license may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include <Library/ArmLib.h> > > +#include <Library/ArmPlatformLib.h> > > +#include <Library/DebugLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/PcdLib.h> > > +#include <Ppi/ArmMpCoreInfo.h> > > +#include <Library/TimerLib.h> > > Please swap order of above two lines to sort alphabetically. > > > + > > +#define ALT_RSTMGR_OFST 0xffd11000 > > +#define ALT_RSTMGR_PER1MODRST_OFST 0x28 > > +#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK > 0x00000001 > > +#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK 0xffffffef > > Please align values horizontally *or* stick to single spaces. > > > + > > + > > Please use STATIC for all local helper functions. OK noted > > > +VOID > > +AssertWatchDogTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 which may have been > enabled by BootROM > > + MmioOr32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK); > > +} > > + > > +VOID > > +DeassertSystemTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 which may have been > enabled by BootROM > > + MmioAnd32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK); > > +} > > + > > + > > +/** > > + * Return the current Boot Mode > > + * > > + * This function returns the boot reason on the platform > > + * > > + * **/ > > +EFI_BOOT_MODE > > +ArmPlatformGetBootMode ( > > + VOID > > + ) > > +{ > > + return BOOT_WITH_FULL_CONFIGURATION; > > +} > > + > > + > > +/** > > + Initialize controllers that must setup before entering PEI MAIN > > +**/ > > +RETURN_STATUS > > +ArmPlatformInitialize ( > > + IN UINTN MpId > > + ) > > +{ > > + AssertWatchDogTimerZeroReset(); > > + return EFI_SUCCESS; > > +} > > + > > +//----------------------------------------------------------------------------------------- > > +// BEGIN ARM CPU RELATED CODE > > +//----------------------------------------------------------------------------------------- > > + > > +// This Table will be consume by Hob init code to publish it into HOB as > MPCore Info > > +// Hob init code will retrieve it by calling PrePeiCoreGetMpCoreInfo via Ppi > > +ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = { > > I *think* the coding style says to put all global variables before any > function definitions. (Oh, and STATIC please.) OK noted. > > > + { > > + // Cluster 0, Core 0 > > + 0x0, 0x0, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 1 > > + 0x0, 0x1, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 2 > > + 0x0, 0x2, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 3 > > + 0x0, 0x3, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + } > > +}; > > + > > +EFI_STATUS > > +PrePeiCoreGetMpCoreInfo ( > > + OUT UINTN *CoreCount, > > + OUT ARM_CORE_INFO **ArmCoreTable > > + ) > > +{ > > + *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / > sizeof(ARM_CORE_INFO); > > Can use ARRAY_SIZE macro from Base.h. > > > + *ArmCoreTable = mArmPlatformNullMpCoreInfoTable; > > + return EFI_SUCCESS; > > +} > > + > > +// This will be consume by PrePeiCore to install Ppi > > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is > undefined in the contect of PrePeiCore > > +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; > > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { > PrePeiCoreGetMpCoreInfo }; > > + > > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { > > + { > > + EFI_PEI_PPI_DESCRIPTOR_PPI, > > + &mArmMpCoreInfoPpiGuid, > > + &mMpCoreInfoPpi > > + } > > +}; > > + > > +VOID > > +ArmPlatformGetPlatformPpiList ( > > + OUT UINTN *PpiListSize, > > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > > + ) > > +{ > > + *PpiListSize = sizeof(gPlatformPpiTable); > > + *PpiList = gPlatformPpiTable; > > +} > > + > > +//----------------------------------------------------------------------------------------- > > +// END ARM CPU RELATED CODE > > +//----------------------------------------------------------------------------------------- > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > > new file mode 100644 > > index 000000000000..2f4cf95cbf13 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > > @@ -0,0 +1,51 @@ > > +// > > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > > +// > > +// This program and the accompanying materials > > +// are licensed and made available under the terms and conditions of the > BSD License > > +// which accompanies this distribution. The full text of the license may be > found at > > +// http://opensource.org/licenses/bsd-license.php > > +// > > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +// > > +// > > + > > +#include <AsmMacroIoLibV8.h> > > +#include <Library/ArmLib.h> > > + > > +ASM_FUNC(ArmPlatformPeiBootAction) > > + ret > > + > > +//UINTN > > +//ArmPlatformGetCorePosition ( > > +// IN UINTN MpId > > +// ); > > +// With this function: CorePos = (ClusterId * 4) + CoreId > > +ASM_FUNC(ArmPlatformGetCorePosition) > > + and x1, x0, #ARM_CORE_MASK > > + and x0, x0, #ARM_CLUSTER_MASK > > + add x0, x1, x0, LSR #6 > > + ret > > + > > +//UINTN > > +//ArmPlatformGetPrimaryCoreMpId ( > > +// VOID > > +// ); > > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > > + ret > > + > > +//UINTN > > +//ArmPlatformIsPrimaryCore ( > > +// IN UINTN MpId > > +// ); > > +ASM_FUNC(ArmPlatformIsPrimaryCore) > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > > + and x0, x0, x1 > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > > + cmp w0, w1 > > + mov x0, #1 > > + mov x1, #0 > > + csel x0, x0, x1, eq > > + ret > > diff --git a/Platform/Intel/Stratix10/Readme.md > b/Platform/Intel/Stratix10/Readme.md > > new file mode 100644 > > index 000000000000..334439fa9a47 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Readme.md > > @@ -0,0 +1,61 @@ > > +Intel Stratix 10 Platform > > +========================= > > + > > +# Summary > > + > > +This is a port of 64-bit Tiano Core UEFI for the Intel Stratix 10 platform > > +based on Stratix 10 SX development board. > > + > > +This UEFI port works with ATF + UEFI implementation for Intel Stratix 10 > board, and > > +will boot to Linux port of Stratix 10. > > + > > +# Status > > + > > +This firmware has been validated to boot to Linux for Stratix 10 that can > be obtained from > > +https://github.com/altera-opensource/linux-socfpga. > > + > > +The default boot is the UEFI shell. The UEFI > > +shell will run startup.nsh by default, and you may change the startup.nsh > to run commands on boot. > > + > > +# Building the firmware > > + > > +- Fetch the ATF, edk2, and edk2-platforms repositories into local host. > > ATF is https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git ? > It *is* useful to list known working ATF/edk2 commits/tags. > OK noted > > + Make all the repositories in the same ${BUILD\_PATH}. > > + > > +- Install the AARCH64 GNU 4.8 toolchain. > > Yaiks. Hopefully something newer. > Anyway, can probably leave this step out. OK > > > + > > +- Build UEFI using Stratix 10 platform as configuration > > + > > + . edksetup.sh > > + > > + build -a AARCH64 -p Platform/Intel/Stratix10/Stratix10SoCPkg.dsc -t > GCC48 -b RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y FLASH -Y > DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS > > And I would prefer GCC5 here, with a note to use GCC48 if using that > version toolchain. > Hmm well currently I'm using GCC48, I'll try out GCC5 then > > + > > +Note: Refer to build instructions from the top level edk2-platforms > Readme.md for further details > > + > > +- Build ATF for Stratix 10 platform > > + > > + make CROSS_COMPILE=aarch64-linux-gnu- device=s10 > > + > > +- Build atf providing the previously generated UEFI as the BL33 image > > + > > + make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=stratix10 > > + BL33=PEI.ROM > > + > > +Install Procedure > > +----------------- > > + > > +- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10 > > + board. > > + > > +- Generate a SOF containing bl2 > > + > > +.. code:: bash > > + aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses > 0xffe00000 bl2.bin bl2.hex > > + quartus_cpf --bootloader bl2.hex <quartus_generated_sof> > <output_sof_with_bl2> > > + > > +- Configure SOF to board > > + > > +.. code:: bash > > + nios2-configure-sof <output_sof_with_bl2> > > + > > + > > diff --git a/Platform/Intel/Stratix10/ShellScript/startup.nsh > b/Platform/Intel/Stratix10/ShellScript/startup.nsh > > new file mode 100644 > > index 000000000000..8c4067972c5b > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/ShellScript/startup.nsh > > @@ -0,0 +1,2 @@ > > +Image dtb=socfpga_stratix10_socdk.dtb console=ttyS0,115200 > root=/dev/mmcblk0p2 rw rootwait > > I don't really see the point in adding the file for a oneliner. I'd > rather see it in the Readme.md. Speaking of which, can you also add a > link in edk2-platforms/Readme.md to *this* Readme.md? OK noted. I'll remove this nsh and put it into the Readme.md. > > Also, we should look into having the DT provided by the firmware > instead of passed on the command line. > > And manually specifying console is very 2014 - use stdout-path in the DT. Yeah I'll be looking into it. Can I get this 2014'ish implementation in first as I need to add DT support arm-trusted-firmware first before I can add this back to EDK2? > > / > Leif > > > + > > -- > > 2.19.0 > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#41662): https://edk2.groups.io/g/devel/message/41662 Mute This Topic: https://groups.io/mt/31553242/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
On Thu, May 30, 2019 at 05:34:23AM +0000, Loh, Tien Hock wrote: > > Also, we should look into having the DT provided by the firmware > > instead of passed on the command line. > > > > And manually specifying console is very 2014 - use stdout-path in > > the DT. > > Yeah I'll be looking into it. Can I get this 2014'ish implementation > in first as I need to add DT support arm-trusted-firmware first > before I can add this back to EDK2? For the "having the DT provided by the firmware" bit, sure. But for specifying console on command line: https://github.com/altera-opensource/linux-socfpga/blob/master/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts#L29 So I don't see why the command line juggling is needed at all? / Leif -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#41728): https://edk2.groups.io/g/devel/message/41728 Mute This Topic: https://groups.io/mt/31553242/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
> -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Loh, Tien Hock > Sent: Thursday, May 09, 2019 4:56 PM > To: devel@edk2.groups.io; thloh85@gmail.com > Cc: Loh, Tien Hock; Ard Biesheuvel; Leif Lindholm; Kinney, Michael D > Subject: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add > Stratix 10 platform support > > From: "Tien Hock, Loh" <tien.hock.loh@intel.com> > > Adds support for Intel Stratix 10 Platform. > > Signed-off-by: "Tien Hock, Loh" <tien.hock.loh@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.1 > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Leif Lindholm <leif.lindholm@linaro.org> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > -- > v4 > - Removed LibC > - Added NOOPT to BUILD_TARGETS > - Removed ARM from SUPPORTED_ARCHITECTURE Hello Tien Hock, Could you help to remove the IntelFrameworkModulePkg dependency on the platform? The package will be removed in the near future. More specifically, for: * GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf I do not see the library is being consumed by any module and I think it can be dropped. Could you help to double-confirm on this? * ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf The platform seems do not have a status code router, so could you help to use MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf for ReportStatusCodeLib instances? Thanks in advance. Best Regards, Hao Wu > v3 > - Updated Pcd with updated name > v2 > - Updates ShellBinPkg with ShellPkg > --- > Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++ > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 546 > ++++++++++++++++++++ > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 > ++++++++++ > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > | 49 ++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf | > 49 ++ > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c | > 43 ++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c | > 155 ++++++ > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c | > 167 ++++++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp > er.S | 51 ++ > Platform/Intel/Stratix10/Readme.md | 61 +++ > Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 + > 11 files changed, 1423 insertions(+) > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > new file mode 100755 > index 000000000000..5677ac7676d5 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > @@ -0,0 +1,30 @@ > +#/** @file > +# Intel Stratix 10 SoC FPGA Package > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials are licensed and made > available under > +# the terms and conditions of the BSD License which accompanies this > distribution. > +# The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +#**/ > + > +[Defines] > + DEC_SPECIFICATION = 0x00010005 > + PACKAGE_NAME = IntelSoCFpgaPkg > + PACKAGE_GUID = 45533DD0-C41F-4ab6-A5DF-65B52684AC60 > + PACKAGE_VERSION = 0.1 > + > +[Includes.common] > + > +[Guids.common] > + gIntelSocFpgaTokenSpaceGuid = { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, 0xa, > 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } } > +[PcdsFeatureFlag.common] > + > +[PcdsFixedAtBuild.common] > + > + > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > new file mode 100755 > index 000000000000..5665ac6c8982 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > @@ -0,0 +1,546 @@ > +#/** @file > +# Intel Stratix 10 SoC FPGA Package > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials are licensed and made > available under > +# the terms and conditions of the BSD License which accompanies this > distribution. > +# The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +#**/ > + > + > +######################################################### > ####################### > +# > +# Defines Section - statements that will be processed to create a Makefile. > +# > +######################################################### > ####################### > +[Defines] > + PLATFORM_NAME = Intel Stratix 10 SoC Development Board > + PLATFORM_GUID = A2D10D02-7C36-4de8-831B-EFBFC2092D1B > + PLATFORM_VERSION = 0.1 > + FIRMWARE_VERSION = 1.0 > + DSC_SPECIFICATION = 0x00010005 > + SUPPORTED_ARCHITECTURES = AARCH64 > + BUILD_TARGETS = DEBUG|RELEASE|NOOPT > + SKUID_IDENTIFIER = DEFAULT > + FLASH_DEFINITION = Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > + OUTPUT_DIRECTORY = Build/Stratix10SoCPkg > + USE_ARM_BDS = FALSE > + SECURE_BOOT_ENABLE = FALSE > + > +######################################################### > ####################### > +# > +# Pcd Section - list of all EDK II PCD Entries defined by this Platform > +# > +######################################################### > ####################### > + > +[PcdsFixedAtBuild.common] > + > gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > + gArmPlatformTokenSpaceGuid.PcdCoreCount|1 > + > + # Stacks for MPCores in PEI Phase > + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000 > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x30000 > + > + # ARM L2x0 PCDs > + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000 > + > + # ARM GIC > + gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000 > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2000 > + > + # ARM Floating Point architecture (VFP) > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > + > + # System Memory (1GB, minus reserved memory for Linux PSCI calls) > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000 > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000 > + > + # Arm Architectural Timer > + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000 > + > + # Trustzone Enable > + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE > + > + #------------------------------- > + # gEfiMdeModulePkgTokenSpaceGuid > + #------------------------------- > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMW > ARE_VERSION)" > + > + #------------------------------- > + # gEfiMdePkgTokenSpaceGuid > + #------------------------------- > + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0 > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 > + > + # DEBUG_ASSERT_ENABLED 0x01 > + # DEBUG_PRINT_ENABLED 0x02 > + # DEBUG_CODE_ENABLED 0x04 > + # CLEAR_MEMORY_ENABLED 0x08 > + # ASSERT_BREAKPOINT_ENABLED 0x10 > + # ASSERT_DEADLOOP_ENABLED 0x20 > +!if $(TARGET) == RELEASE > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > +!else > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > +!endif > + > + # DEBUG_INIT 0x00000001 // Initialization > + # DEBUG_WARN 0x00000002 // Warnings > + # DEBUG_LOAD 0x00000004 // Load events > + # DEBUG_FS 0x00000008 // EFI File system > + # DEBUG_POOL 0x00000010 // Alloc & Free's > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > + # DEBUG_INFO 0x00000040 // Verbose > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers > + # DEBUG_VARIABLE 0x00000100 // Variable > + # DEBUG_BM 0x00000400 // Boot Manager > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > + # DEBUG_NET 0x00004000 // SNI Driver > + # DEBUG_UNDI 0x00010000 // UNDI Driver > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > + # DEBUG_EVENT 0x00080000 // Event messages > + # DEBUG_GCD 0x00100000 // Global Coherency Database changes > + # DEBUG_CACHE 0x00200000 // Memory range cachability changes > + # DEBUG_ERROR 0x80000000 // Error > +# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F > + > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00 > + > + #------------------------------- > + # gEmbeddedTokenSpaceGuid > + #------------------------------- > + > + # MMC > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808000 > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|5000000 > 0 > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25000000 > + > + # > + # Optional feature to help prevent EFI memory map fragments > + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob > + # Values are in EFI Pages (4K). DXE Core will make sure that > + # at least this much of each type of memory can be allocated > + # from a single memory range. This way you only end up with > + # maximum of two fragements for each type in the memory map > + # (the memory used, and the free memory that was prereserved > + # but not used). > + # > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|819 > 2 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > + > + # We want to use the Shell Libraries but don't want it to initialise > + # automatically. We initialise the libraries when the command is called by > the > + # Shell. > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > + > + # Pcd Settings - UART Serial Terminal > + # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000. > + # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100. > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|32 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xFFC02000 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|100000000 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF, 0xFF, > 0xFF, 0xFF, 0xFF} > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4 > + > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > + > + # ConColumn/Row > + > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutSetupVa > r"|gArmGlobalVariableGuid|0x0|132 > + > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutSetupVar"| > gArmGlobalVariableGuid|0x4|43 > + > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > + > + # RunAxf support via Dynamic Shell Command protocol > + # We want to use the Shell Libraries but don't want it to initialise > + # automatically. We initialise the libraries when the command is called by > the > + # Shell. > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > + > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, > 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, > 0x23, 0x31 } > + > +!if $(USE_ARM_BDS) == FALSE > + > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationC > hange|FALSE > +!endif > + > +# TODO: Add suppot for secure boot > +!if $(SECURE_BOOT_ENABLE) == TRUE > + # override the default values from SecurityPkg to ensure images from all > sources are verified in secure boot > + > gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > + > gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x0 > 4 > + > gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolic > y|0x04 > +!endif > + > + > +[PcdsFeatureFlag.common] > + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE > + > + > + # Use the Vector Table location in CpuDxe. We will not copy the Vector > Table at PcdCpuVectorBaseAddress > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE > + # If TRUE, Graphics Output Protocol will be installed on virtual handle > created by ConsplitterDxe. > + # Set FALSE to save size. > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE > + > + #------------------------------- > + # gEfiMdePkgTokenSpaceGuid > + #------------------------------- > + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE > + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE > + > + > +[LibraryClasses.common] > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > + > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounter > Lib/ArmGenericTimerPhyCounterLib.inf > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > + > ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler > Lib.inf > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > + > ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatfo > rmLib.inf > + > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + > + > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > + > + > ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPla > tformStackLib.inf > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > + > CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCach > eMaintenanceLib.inf > + > CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib > .inf > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > + > DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/D > efaultExceptionHandlerLib.inf > + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > + > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTabl > eLib.inf > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/Base > PeCoffGetEntryPointLib.inf > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > + > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanc > eLibNull.inf > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > + > RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRea > lTimeClockLib.inf > + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf > + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > + > + > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort > Lib16550.inf > + > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePla > tformHookLibNull.inf > + > + > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniz > ationLib.inf > + > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBoo > tManagerLib.inf > + > PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/Platfor > mBootManagerLib.inf #thloh > + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf #thloh > + > + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf > + > + > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiA > pplicationEntryPoint.inf > + > UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBo > otServicesTableLib.inf > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > + > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry > Point.inf > + > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiService > sLib.inf > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > + > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib > /UefiRuntimeServicesTableLib.inf > + > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf > + # > + # Secure Boot dependencies > + # > +!if $(SECURE_BOOT_ENABLE) == TRUE > + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf > + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > + > TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTp > mMeasurementLib.inf > + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > + > + # re-use the UserPhysicalPresent() dummy implementation from the ovmf > tree > + > PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.i > nf > +!else > + > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/Tp > mMeasurementLibNull.inf > + > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableL > ibNull.inf > +!endif > + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > + > +!if $(USE_ARM_BDS) == FALSE > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.i > nf > + > GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericB > dsLib.inf > + > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Custo > mizedDisplayLib.inf > +!endif > + > + #------------------------------- > + # Networking Requirements > + #------------------------------- > + DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf > + IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf > + NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf > + UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf > + > + #------------------------------- > + # These libraries are used by the dynamic EFI Shell commands > + #------------------------------- > + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > + > + #------------------------------- > + # Build Debug / Release > + #------------------------------- > +!if $(TARGET) == RELEASE > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > +!else > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort. > inf > +!endif > + > + > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLi > bNull.inf > + > DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/Debu > gAgentTimerLibNull.inf > + > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/Bas > eDebugPrintErrorLevelLib.inf > + > PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPe > CoffExtraActionLib.inf > + > +[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE] > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionL > ib/PrePiExtractGuidedSectionLib.inf > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/L > zmaCustomDecompressLib.inf > + > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > + > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre > PiHobListPointerLib.inf > + > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/Pre > PiMemoryAllocationLib.inf > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanc > eLib.inf > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf > + > +[LibraryClasses.common.DXE_DRIVER, > LibraryClasses.common.UEFI_APPLICATION, > LibraryClasses.common.UEFI_DRIVER] > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf > + > +[LibraryClasses.common.PEI_CORE] > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionL > ib/PrePiExtractGuidedSectionLib.inf > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/L > zmaCustomDecompressLib.inf > + > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemory > AllocationLib.inf > + > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibN > ull/OemHookStatusCodeLibNull.inf > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/Base > PeCoffGetEntryPointLib.inf > + > PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.in > f > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanc > eLib.inf > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre > PiHobListPointerLib.inf > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > + #thloh > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiR > eportStatusCodeLib.inf > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > + > PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/PeiCrc32GuidedS > ectionExtractLib/PeiCrc32GuidedSectionExtractLib.inf > + > +[LibraryClasses.common.DXE_CORE] > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint > .inf > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > xtractGuidedSectionLib.inf > + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > + > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLi > b/DxeCoreMemoryAllocationLib.inf > + > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCore > PerformanceLib.inf > + # thloh > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > + > +[LibraryClasses.common.DXE_DRIVER] > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > ryAllocationLib.inf > + > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementL > ib/DxeSecurityManagementLib.inf > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforma > nceLib.inf > + > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > + > +[LibraryClasses.common.UEFI_APPLICATION] > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > ryAllocationLib.inf > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforma > nceLib.inf > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > + > +[LibraryClasses.common.UEFI_DRIVER] > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > xtractGuidedSectionLib.inf > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > ryAllocationLib.inf > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforma > nceLib.inf > + > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > + > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > +!if $(SECURE_BOOT_ENABLE) == TRUE > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > +!endif > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.i > nf > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > ryAllocationLib.inf > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > eReportStatusCodeLib.inf > + > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > + # > + # PSCI support in EL3 may not be available if we are not running under a > PSCI > + # compliant secure firmware, but since the default VExpress > EfiResetSystemLib > + # cannot be supported at runtime (due to the fact that the syscfg MMIO > registers > + # cannot be runtime remapped), it is our best bet to get ResetSystem > functionality > + # on these platforms. > + # > + > EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSy > stemLib.inf > + > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > + # It is not possible to prevent the ARM compiler for generic intrinsic > functions. > + # This library provides the instrinsic functions generate by a given compiler. > + # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. > + # > + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf > + > + # Add support for GCC stack protector > + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > + > +######################################################### > ####################### > +# > +# Components Section - list of all EDK II Modules needed by this Platform > +# > +######################################################### > ####################### > +[Components.common] > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > + <LibraryClasses> > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + } > + > + EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > + > + ArmPlatformPkg/PrePi/PeiUniCore.inf { > + <LibraryClasses> > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + } > + > + # > + # DXE > + # > + MdeModulePkg/Core/Dxe/DxeMain.inf { > + <LibraryClasses> > + #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + > NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32G > uidedSectionExtractLib.inf > + } > + > + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > + MdeModulePkg/Application/UiApp/UiApp.inf { > + <LibraryClasses> > + > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > + > NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf > + > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMainte > nanceManagerUiLib.inf > + } > + > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf > + > + FatPkg/EnhancedFatDxe/Fat.inf > + > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > + > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > + > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleD > xe.inf > + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > + > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > + > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.in > f > + > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe. > inf > + > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCoun > terRuntimeDxe.inf > + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > { > + <LibraryClasses> > + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf > + } > + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > + > + # Multimedia Card Interface > + EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > + EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > + > + # Shell > + ShellPkg/Application/Shell/Shell.inf { > + <LibraryClasses> > + > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellComma > ndLib.inf > + > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2Comma > ndsLib.inf > + > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1Comma > ndsLib.inf > + > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3Comma > ndsLib.inf > + > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Com > mandsLib.inf > + > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Com > mandsLib.inf > + > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1Com > mandsLib.inf > + > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1 > CommandsLib.inf > + > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingL > ib.inf > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > + > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfg > CommandLib.inf > + > + <PcdsFixedAtBuild> > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 > + } > + > + # > + # Platform Specific Init for DXE phase > + # > + Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > + > +[BuildOptions] > + #------------------------------- > + # Common > + #------------------------------- > + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -fstack-protector - > O2 -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security > + GCC:RELEASE_*_*_DLINK_FLAGS = -z noexecstack -z relro -z now > + > + #------------------------------- > + # IntelPlatformPkg/... > + #------------------------------- > + GCC:DEBUG_*_AARCH64_PLATFORM_FLAGS = - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -Wno-unused-but-set- > variable #-mstrict-align > + GCC:RELEASE_*_AARCH64_PLATFORM_FLAGS = - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -DMDEPKG_NDEBUG - > DMDEPKG_NDEBUG # -mstrict-align > + > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > new file mode 100755 > index 000000000000..cab6536b5350 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > @@ -0,0 +1,270 @@ > +#/** @file > +# Intel SoC FPGA Package > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials are licensed and made > available under > +# the terms and conditions of the BSD License which accompanies this > distribution. > +# The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +#**/ > + > +######################################################### > ####################### > +# > +# FD Section > +# The [FD] Section is made up of the definition statements and a > +# description of what goes into the Flash Device Image. Each FD section > +# defines one flash "device" image. A flash device image may be one of > +# the following: Removable media bootable image (like a boot floppy > +# image,) an Option ROM image (that would be "flashed" into an add-in > +# card,) a System "Flash" image (that would be burned into a system's > +# flash) or an Update ("Capsule") image that will be used to update and > +# existing system flash. > +# > +######################################################### > ####################### > + > +[FD.IntelStratix10_EFI] > +BaseAddress = 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # > The base address of the Firmware in remapped DRAM. > +Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in > bytes > +ErasePolarity = 1 > +BlockSize = 0x00000001 > +NumBlocks = 0x00400000 > + > +######################################################### > ####################### > +# > +# FD Region layout > +# > +# A Layout Region start with a eight digit hex offset (leading "0x" required) > +# followed by the pipe "|" character, > +# followed by the size of the region, also in hex with the leading "0x" > characters. > +# Must be defined in ascending order and may not overlap. > +# Like: > +# Offset|Size > +# PcdOffsetCName|PcdSizeCName > +# RegionType <FV, DATA, or FILE> > +# > +######################################################### > ####################### > +0x00000000|0x00400000 > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > +FV = FV_PEIDXE > + > +[FV.FV_PEIDXE] > +FvAlignment = 8 > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > + > + INF ArmPlatformPkg/PrePi/PeiUniCore.inf > + > + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF > PROCESSING_REQUIRED = TRUE { > + SECTION FV_IMAGE = FV_DXE > + } > + } > + > +[FV.FV_DXE] > +BlockSize = 0x00000001 > +NumBlocks = 0 # This FV gets compressed so make it just big > enough > +FvAlignment = 8 # FV alignment and FV attributes setting. > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > +FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c > + > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > + INF > EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > + > + # > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > + # > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + INF > MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > + INF > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > + INF > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.in > f > + INF > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCoun > terRuntimeDxe.inf > + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > + > + # Multiple Console IO support > + INF > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > + INF > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > + > + # ARM packages > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > + > + # FAT filesystem + GPT/MBR partitioning > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > + INF FatPkg/EnhancedFatDxe/Fat.inf > + INF > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > + > + # Multimedia Card Interface > + INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > + INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > + > + # Platform Specific Init for DXE phase > + INF > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > + > + # UEFI application (Shell Embedded Boot Loader) > + INF ShellPkg/Application/Shell/Shell.inf > + > + # Bds > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > + INF MdeModulePkg/Application/UiApp/UiApp.inf > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > + > + # FV Filesystem > + INF > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe. > inf > + > + # Include UEFI Shell Start Up Script > + FILE FREEFORM = AF3F9E26-DDB5-4e85-B4D7-AC60A2772BC2 { > + SECTION RAW = Platform/Intel/Stratix10/ShellScript/startup.nsh > + SECTION UI = "startup.nsh" > + } > + > + > + > +######################################################### > ####################### > +# > +# Rules are use with the [FV] section's module INF type to define > +# how an FFS file is created for a given INF file. The following Rule are the > default > +# rules for the different module type. User can add the customized rules to > define the > +# content of the FFS file. > +# > +######################################################### > ####################### > + > + > +######################################################### > ################### > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section > # > +######################################################### > ################### > +# > +#[Rule.Common.DXE_DRIVER] > +# FILE DRIVER = $(NAMED_GUID) { > +# DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > +# COMPRESS PI_STD { > +# GUIDED { > +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > +# UI STRING="$(MODULE_NAME)" Optional > +# VERSION STRING="$(INF_VERSION)" Optional > BUILD_NUM=$(BUILD_NUMBER) > +# } > +# } > +# } > +# > +######################################################### > ################### > + > +[Rule.Common.SEC] > + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > + } > + > +[Rule.Common.PEI_CORE] > + FILE PEI_CORE = $(NAMED_GUID) FIXED { > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING ="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.PEIM] > + FILE PEIM = $(NAMED_GUID) FIXED { > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.PEIM.TIANOCOMPRESSED] > + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 > PROCESSING_REQUIRED = TRUE { > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + } > + > +[Rule.Common.DXE_CORE] > + FILE DXE_CORE = $(NAMED_GUID) { > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.UEFI_DRIVER] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.DXE_DRIVER] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.DXE_RUNTIME_DRIVER] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + UI STRING="$(MODULE_NAME)" Optional > + } > + > +[Rule.Common.UEFI_APPLICATION] > + FILE APPLICATION = $(NAMED_GUID) { > + UI STRING ="$(MODULE_NAME)" Optional > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > + } > + > +[Rule.Common.UEFI_DRIVER.BINARY] > + FILE DRIVER = $(NAMED_GUID) { > + DXE_DEPEX DXE_DEPEX Optional |.depex > + PE32 PE32 |.efi > + UI STRING="$(MODULE_NAME)" Optional > + VERSION STRING="$(INF_VERSION)" Optional > BUILD_NUM=$(BUILD_NUMBER) > + } > + > +[Rule.Common.UEFI_APPLICATION.BINARY] > + FILE APPLICATION = $(NAMED_GUID) { > + PE32 PE32 |.efi > + UI STRING="$(MODULE_NAME)" Optional > + VERSION STRING="$(INF_VERSION)" Optional > BUILD_NUM=$(BUILD_NUMBER) > + } > + > + > + > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > new file mode 100644 > index 000000000000..c3c0d7242082 > --- /dev/null > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > @@ -0,0 +1,49 @@ > +#/** @file > +# > +# Copyright (c) 2019, Intel All rights reserved. > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the > BSD License > +# which accompanies this distribution. The full text of the license may be > found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x00010005 > + BASE_NAME = IntelPlatformDxe > + FILE_GUID = AB87E291-1689-4c7b-B613-FB54A0E38CEA > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = IntelPlatformDxeEntryPoint > + > +[Sources.common] > + IntelPlatformDxe.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + MdePkg/MdePkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + > +[LibraryClasses] > + ArmLib > + BaseMemoryLib > + DebugLib > + DxeServicesTableLib > + PcdLib > + PrintLib > + SerialPortLib > + UefiBootServicesTableLib > + UefiRuntimeServicesTableLib > + UefiLib > + UefiDriverEntryPoint > + > + > +[Depex] > + # We depend on these protocols to create the default boot entries > + gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > new file mode 100644 > index 000000000000..83649c95c9c3 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > @@ -0,0 +1,49 @@ > +/** @file > +* > +* Stratix 10 Platform Library > +* > +* Copyright (c) 2019, Intel Corporations All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the > BSD License > +* which accompanies this distribution. The full text of the license may be > found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +* > +**/ > + > +[Defines] > + INF_VERSION = 0x00010005 > + BASE_NAME = Stratix10PlatformLib > + FILE_GUID = 99E236C7-D5FD-42A0-B520-60C85C4870B8 > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = ArmPlatformLib > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + ArmPkg/ArmPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Platform/Intel/Stratix10/Stratix10SoCPkg.dec > + > +[LibraryClasses] > + ArmLib > + ArmMmuLib > + DebugLib > + IoLib > + PcdLib > + > +[Sources.common] > + Stratix10PlatformLib.c > + Stratix10Mmu.c > + > +[Sources.AArch64] > + AArch64/ArmPlatformHelper.S > + > +[FixedPcd] > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask > + gArmTokenSpaceGuid.PcdArmPrimaryCore > + > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > new file mode 100644 > index 000000000000..144b4c54ef55 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > @@ -0,0 +1,43 @@ > +/** @file > +* > +* Copyright (c) 2019, Intel All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the > BSD License > +* which accompanies this distribution. The full text of the license may be > found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +* > +**/ > + > + > +#include <Uefi.h> > +#include <Guid/GlobalVariable.h> > +#include <Library/ArmLib.h> > +#include <Library/BaseLib.h> > +#include <Library/BaseMemoryLib.h> > +#include <Library/DebugLib.h> > +#include <Library/DevicePathLib.h> > +#include <Library/DxeServicesTableLib.h> > +#include <Library/IoLib.h> > +#include <Library/MemoryAllocationLib.h> > +#include <Library/PrintLib.h> > +#include <Library/UefiBootServicesTableLib.h> > +#include <Library/UefiLib.h> > +#include <Library/UefiRuntimeServicesTableLib.h> > +#include <Protocol/DevicePathFromText.h> > + > +EFI_STATUS > +EFIAPI > +IntelPlatformDxeEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status = 0; > + > + return Status; > +} > + > diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > new file mode 100644 > index 000000000000..ed4aa2bdb12a > --- /dev/null > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > @@ -0,0 +1,155 @@ > +/** @file > +* > +* Stratix 10 Mmu configuration > +* > +* Copyright (c) 2019, Intel Corporations All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the > BSD License > +* which accompanies this distribution. The full text of the license may be > found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +* > +**/ > + > +#include <Library/ArmLib.h> > +#include <Library/ArmMmuLib.h> > +#include <Library/ArmPlatformLib.h> > +#include <Library/BaseMemoryLib.h> > +#include <Library/DebugLib.h> > +#include <Library/IoLib.h> > +#include <Library/MemoryAllocationLib.h> > +#include <Library/PcdLib.h> > +#include <Library/TimerLib.h> > + > +// The total number of descriptors, including the final "end-of-table" > descriptor. > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 > +ARM_MEMORY_REGION_DESCRIPTOR > gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; > + > +// DDR attributes > +#define DDR_ATTRIBUTES_CACHED > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > +#define DDR_ATTRIBUTES_UNCACHED > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > + > +#define DRAM_BASE 0x0 > +#define DRAM_SIZE 0x40000000 > + > +#define FPGA_SLAVES_BASE 0x80000000 > +#define FPGA_SLAVES_SIZE 0x60000000 > + > +#define PERIPHERAL_BASE 0xF7000000 > +#define PERIPHERAL_SIZE 0x08E00000 > + > +#define OCRAM_BASE 0xFFE00000 > +#define OCRAM_SIZE 0x00100000 > + > +#define GIC_BASE 0xFFFC0000 > +#define GIC_SIZE 0x00008000 > + > +#define MEM64_BASE 0x0100000000 > +#define MEM64_SIZE 0x1F00000000 > + > +#define DEVICE64_BASE 0x2000000000 > +#define DEVICE64_SIZE 0x0100000000 > +/** > + Return the Virtual Memory Map of your platform > + > + This Virtual Memory Map is used to initialize the MMU for DXE Phase. > + > + @param[out] VirtualMemoryMap Array of > ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > + Virtual Memory mapping. This array must be ended by a > zero-filled > + entry > + > +**/ > +VOID > +EFIAPI > +ArmPlatformGetVirtualMemoryMap ( > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > + ) > +{ > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > + UINTN Index = 0; > + > + VirtualMemoryTable = &gVirtualMemoryTable[0]; > + > + CacheAttributes = DDR_ATTRIBUTES_CACHED; > + > + // Start create the Virtual Memory Map table > + // Our goal is to a simple 1:1 mapping where virtual==physical address > + > + // DDR SDRAM > + VirtualMemoryTable[Index].PhysicalBase = DRAM_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = DRAM_SIZE; > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > + > + // FPGA > + VirtualMemoryTable[Index].PhysicalBase = FPGA_SLAVES_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = FPGA_SLAVES_SIZE; > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // DEVICE 142MB > + VirtualMemoryTable[Index].PhysicalBase = PERIPHERAL_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = PERIPHERAL_SIZE; > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // OCRAM 1MB but available 256KB > + VirtualMemoryTable[Index].PhysicalBase = OCRAM_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = OCRAM_SIZE; > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > + > + // DEVICE 32KB > + VirtualMemoryTable[Index].PhysicalBase = GIC_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = GIC_SIZE; > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // MEM 124GB > + VirtualMemoryTable[Index].PhysicalBase = MEM64_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = MEM64_SIZE; > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > + > + // DEVICE 4GB > + VirtualMemoryTable[Index].PhysicalBase = DEVICE64_BASE; > + VirtualMemoryTable[Index].VirtualBase = > VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = DEVICE64_SIZE; > + VirtualMemoryTable[Index++].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // End of Table > + VirtualMemoryTable[Index].PhysicalBase = 0; > + VirtualMemoryTable[Index].VirtualBase = 0; > + VirtualMemoryTable[Index].Length = 0; > + VirtualMemoryTable[Index++].Attributes = > (ARM_MEMORY_REGION_ATTRIBUTES)0; > + > + ASSERT((Index) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > + > + *VirtualMemoryMap = VirtualMemoryTable; > +} > + > + > +VOID > +EFIAPI > +InitMmu ( > + VOID > + ) > +{ > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > + VOID *TranslationTableBase; > + UINTN TranslationTableSize; > + RETURN_STATUS Status; > + // Construct a Virtual Memory Map for this platform > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > + > + // Configure the MMU > + Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, > &TranslationTableSize); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); > + } > +} > + > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > new file mode 100644 > index 000000000000..6bee4d5d43e8 > --- /dev/null > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > @@ -0,0 +1,167 @@ > +/** @file > +* > +* Stratix 10 Platform Library > +* > +* Copyright (c) 2019, Intel Corporations All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the > BSD License > +* which accompanies this distribution. The full text of the license may be > found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +* > +**/ > + > +#include <Library/ArmLib.h> > +#include <Library/ArmPlatformLib.h> > +#include <Library/DebugLib.h> > +#include <Library/IoLib.h> > +#include <Library/PcdLib.h> > +#include <Ppi/ArmMpCoreInfo.h> > +#include <Library/TimerLib.h> > + > +#define ALT_RSTMGR_OFST 0xffd11000 > +#define ALT_RSTMGR_PER1MODRST_OFST 0x28 > +#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK > 0x00000001 > +#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK 0xffffffef > + > + > +VOID > +AssertWatchDogTimerZeroReset ( > + VOID > + ) > +{ > + // Assert the Reset signal of Watchdog Timer 0 which may have been > enabled by BootROM > + MmioOr32 (ALT_RSTMGR_OFST + > + ALT_RSTMGR_PER1MODRST_OFST, > + ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK); > +} > + > +VOID > +DeassertSystemTimerZeroReset ( > + VOID > + ) > +{ > + // Assert the Reset signal of Watchdog Timer 0 which may have been > enabled by BootROM > + MmioAnd32 (ALT_RSTMGR_OFST + > + ALT_RSTMGR_PER1MODRST_OFST, > + ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK); > +} > + > + > +/** > + * Return the current Boot Mode > + * > + * This function returns the boot reason on the platform > + * > + * **/ > +EFI_BOOT_MODE > +ArmPlatformGetBootMode ( > + VOID > + ) > +{ > + return BOOT_WITH_FULL_CONFIGURATION; > +} > + > + > +/** > + Initialize controllers that must setup before entering PEI MAIN > +**/ > +RETURN_STATUS > +ArmPlatformInitialize ( > + IN UINTN MpId > + ) > +{ > + AssertWatchDogTimerZeroReset(); > + return EFI_SUCCESS; > +} > + > +//----------------------------------------------------------------------------------------- > +// BEGIN ARM CPU RELATED CODE > +//----------------------------------------------------------------------------------------- > + > +// This Table will be consume by Hob init code to publish it into HOB as > MPCore Info > +// Hob init code will retrieve it by calling PrePeiCoreGetMpCoreInfo via Ppi > +ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = { > + { > + // Cluster 0, Core 0 > + 0x0, 0x0, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + }, > + { > + // Cluster 0, Core 1 > + 0x0, 0x1, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + }, > + { > + // Cluster 0, Core 2 > + 0x0, 0x2, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + }, > + { > + // Cluster 0, Core 3 > + 0x0, 0x3, > + > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (EFI_PHYSICAL_ADDRESS)0, > + (UINT64)0xFFFFFFFF > + } > +}; > + > +EFI_STATUS > +PrePeiCoreGetMpCoreInfo ( > + OUT UINTN *CoreCount, > + OUT ARM_CORE_INFO **ArmCoreTable > + ) > +{ > + *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / > sizeof(ARM_CORE_INFO); > + *ArmCoreTable = mArmPlatformNullMpCoreInfoTable; > + return EFI_SUCCESS; > +} > + > +// This will be consume by PrePeiCore to install Ppi > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is > undefined in the contect of PrePeiCore > +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = > { PrePeiCoreGetMpCoreInfo }; > + > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { > + { > + EFI_PEI_PPI_DESCRIPTOR_PPI, > + &mArmMpCoreInfoPpiGuid, > + &mMpCoreInfoPpi > + } > +}; > + > +VOID > +ArmPlatformGetPlatformPpiList ( > + OUT UINTN *PpiListSize, > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > + ) > +{ > + *PpiListSize = sizeof(gPlatformPpiTable); > + *PpiList = gPlatformPpiTable; > +} > + > +//----------------------------------------------------------------------------------------- > +// END ARM CPU RELATED CODE > +//----------------------------------------------------------------------------------------- > + > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > new file mode 100644 > index 000000000000..2f4cf95cbf13 > --- /dev/null > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > @@ -0,0 +1,51 @@ > +// > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > +// > +// This program and the accompanying materials > +// are licensed and made available under the terms and conditions of the > BSD License > +// which accompanies this distribution. The full text of the license may be > found at > +// http://opensource.org/licenses/bsd-license.php > +// > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +// > +// > + > +#include <AsmMacroIoLibV8.h> > +#include <Library/ArmLib.h> > + > +ASM_FUNC(ArmPlatformPeiBootAction) > + ret > + > +//UINTN > +//ArmPlatformGetCorePosition ( > +// IN UINTN MpId > +// ); > +// With this function: CorePos = (ClusterId * 4) + CoreId > +ASM_FUNC(ArmPlatformGetCorePosition) > + and x1, x0, #ARM_CORE_MASK > + and x0, x0, #ARM_CLUSTER_MASK > + add x0, x1, x0, LSR #6 > + ret > + > +//UINTN > +//ArmPlatformGetPrimaryCoreMpId ( > +// VOID > +// ); > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > + ret > + > +//UINTN > +//ArmPlatformIsPrimaryCore ( > +// IN UINTN MpId > +// ); > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > + and x0, x0, x1 > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > + cmp w0, w1 > + mov x0, #1 > + mov x1, #0 > + csel x0, x0, x1, eq > + ret > diff --git a/Platform/Intel/Stratix10/Readme.md > b/Platform/Intel/Stratix10/Readme.md > new file mode 100644 > index 000000000000..334439fa9a47 > --- /dev/null > +++ b/Platform/Intel/Stratix10/Readme.md > @@ -0,0 +1,61 @@ > +Intel Stratix 10 Platform > +========================= > + > +# Summary > + > +This is a port of 64-bit Tiano Core UEFI for the Intel Stratix 10 platform > +based on Stratix 10 SX development board. > + > +This UEFI port works with ATF + UEFI implementation for Intel Stratix 10 > board, and > +will boot to Linux port of Stratix 10. > + > +# Status > + > +This firmware has been validated to boot to Linux for Stratix 10 that can be > obtained from > +https://github.com/altera-opensource/linux-socfpga. > + > +The default boot is the UEFI shell. The UEFI > +shell will run startup.nsh by default, and you may change the startup.nsh to > run commands on boot. > + > +# Building the firmware > + > +- Fetch the ATF, edk2, and edk2-platforms repositories into local host. > + Make all the repositories in the same ${BUILD\_PATH}. > + > +- Install the AARCH64 GNU 4.8 toolchain. > + > +- Build UEFI using Stratix 10 platform as configuration > + > + . edksetup.sh > + > + build -a AARCH64 -p Platform/Intel/Stratix10/Stratix10SoCPkg.dsc -t > GCC48 -b RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y FLASH -Y > DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS > + > +Note: Refer to build instructions from the top level edk2-platforms > Readme.md for further details > + > +- Build ATF for Stratix 10 platform > + > + make CROSS_COMPILE=aarch64-linux-gnu- device=s10 > + > +- Build atf providing the previously generated UEFI as the BL33 image > + > + make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=stratix10 > + BL33=PEI.ROM > + > +Install Procedure > +----------------- > + > +- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10 > + board. > + > +- Generate a SOF containing bl2 > + > +.. code:: bash > + aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses > 0xffe00000 bl2.bin bl2.hex > + quartus_cpf --bootloader bl2.hex <quartus_generated_sof> > <output_sof_with_bl2> > + > +- Configure SOF to board > + > +.. code:: bash > + nios2-configure-sof <output_sof_with_bl2> > + > + > diff --git a/Platform/Intel/Stratix10/ShellScript/startup.nsh > b/Platform/Intel/Stratix10/ShellScript/startup.nsh > new file mode 100644 > index 000000000000..8c4067972c5b > --- /dev/null > +++ b/Platform/Intel/Stratix10/ShellScript/startup.nsh > @@ -0,0 +1,2 @@ > +Image dtb=socfpga_stratix10_socdk.dtb console=ttyS0,115200 > root=/dev/mmcblk0p2 rw rootwait > + > -- > 2.19.0 > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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> -----Original Message----- > From: Wu, Hao A > Sent: Thursday, May 30, 2019 9:03 AM > To: devel@edk2.groups.io; Loh, Tien Hock <tien.hock.loh@intel.com>; > thloh85@gmail.com > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>; Leif Lindholm > <leif.lindholm@linaro.org>; Kinney, Michael D > <michael.d.kinney@intel.com> > Subject: RE: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add > Stratix 10 platform support > > > -----Original Message----- > > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > > Loh, Tien Hock > > Sent: Thursday, May 09, 2019 4:56 PM > > To: devel@edk2.groups.io; thloh85@gmail.com > > Cc: Loh, Tien Hock; Ard Biesheuvel; Leif Lindholm; Kinney, Michael D > > Subject: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add > > Stratix 10 platform support > > > > From: "Tien Hock, Loh" <tien.hock.loh@intel.com> > > > > Adds support for Intel Stratix 10 Platform. > > > > Signed-off-by: "Tien Hock, Loh" <tien.hock.loh@intel.com> > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > Cc: Leif Lindholm <leif.lindholm@linaro.org> > > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > > > -- > > v4 > > - Removed LibC > > - Added NOOPT to BUILD_TARGETS > > - Removed ARM from SUPPORTED_ARCHITECTURE > > Hello Tien Hock, > > Could you help to remove the IntelFrameworkModulePkg dependency on the > platform? The package will be removed in the near future. > > More specifically, for: > > * > GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBd > sLib.inf > I do not see the library is being consumed by any module and I think it > can be dropped. Could you help to double-confirm on this? > > * > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > The platform seems do not have a status code router, so could you help to > use > MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull > .inf > for ReportStatusCodeLib instances? OK noted. I'll fix this and resubmit a new version. Thanks! > > Thanks in advance. > > Best Regards, > Hao Wu > > > v3 > > - Updated Pcd with updated name > > v2 > > - Updates ShellBinPkg with ShellPkg > > --- > > Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 546 > > ++++++++++++++++++++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 > > ++++++++++ > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > | 49 ++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf | > > 49 ++ > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > | > > 43 ++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c | > > 155 ++++++ > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > | > > 167 ++++++ > > > > > Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp > > er.S | 51 ++ > > Platform/Intel/Stratix10/Readme.md | 61 +++ > > Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 + > > 11 files changed, 1423 insertions(+) > > > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > new file mode 100755 > > index 000000000000..5677ac7676d5 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > @@ -0,0 +1,30 @@ > > +#/** @file > > +# Intel Stratix 10 SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > > available under > > +# the terms and conditions of the BSD License which accompanies this > > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > +[Defines] > > + DEC_SPECIFICATION = 0x00010005 > > + PACKAGE_NAME = IntelSoCFpgaPkg > > + PACKAGE_GUID = 45533DD0-C41F-4ab6-A5DF-65B52684AC60 > > + PACKAGE_VERSION = 0.1 > > + > > +[Includes.common] > > + > > +[Guids.common] > > + gIntelSocFpgaTokenSpaceGuid = { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, > 0xa, > > 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } } > > +[PcdsFeatureFlag.common] > > + > > +[PcdsFixedAtBuild.common] > > + > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > new file mode 100755 > > index 000000000000..5665ac6c8982 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > @@ -0,0 +1,546 @@ > > +#/** @file > > +# Intel Stratix 10 SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > > available under > > +# the terms and conditions of the BSD License which accompanies this > > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > + > > +######################################################### > > ####################### > > +# > > +# Defines Section - statements that will be processed to create a Makefile. > > +# > > +######################################################### > > ####################### > > +[Defines] > > + PLATFORM_NAME = Intel Stratix 10 SoC Development Board > > + PLATFORM_GUID = A2D10D02-7C36-4de8-831B-EFBFC2092D1B > > + PLATFORM_VERSION = 0.1 > > + FIRMWARE_VERSION = 1.0 > > + DSC_SPECIFICATION = 0x00010005 > > + SUPPORTED_ARCHITECTURES = AARCH64 > > + BUILD_TARGETS = DEBUG|RELEASE|NOOPT > > + SKUID_IDENTIFIER = DEFAULT > > + FLASH_DEFINITION = > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > + OUTPUT_DIRECTORY = Build/Stratix10SoCPkg > > + USE_ARM_BDS = FALSE > > + SECURE_BOOT_ENABLE = FALSE > > + > > +######################################################### > > ####################### > > +# > > +# Pcd Section - list of all EDK II PCD Entries defined by this Platform > > +# > > +######################################################### > > ####################### > > + > > +[PcdsFixedAtBuild.common] > > + > > gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > > + gArmPlatformTokenSpaceGuid.PcdCoreCount|1 > > + > > + # Stacks for MPCores in PEI Phase > > + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000 > > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x30000 > > + > > + # ARM L2x0 PCDs > > + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000 > > + > > + # ARM GIC > > + gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000 > > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2000 > > + > > + # ARM Floating Point architecture (VFP) > > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > > + > > + # System Memory (1GB, minus reserved memory for Linux PSCI calls) > > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000 > > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000 > > + > > + # Arm Architectural Timer > > + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000 > > + > > + # Trustzone Enable > > + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE > > + > > + #------------------------------- > > + # gEfiMdeModulePkgTokenSpaceGuid > > + #------------------------------- > > + > > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMW > > ARE_VERSION)" > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > > + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > > + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 > > + > > + # DEBUG_ASSERT_ENABLED 0x01 > > + # DEBUG_PRINT_ENABLED 0x02 > > + # DEBUG_CODE_ENABLED 0x04 > > + # CLEAR_MEMORY_ENABLED 0x08 > > + # ASSERT_BREAKPOINT_ENABLED 0x10 > > + # ASSERT_DEADLOOP_ENABLED 0x20 > > +!if $(TARGET) == RELEASE > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!else > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!endif > > + > > + # DEBUG_INIT 0x00000001 // Initialization > > + # DEBUG_WARN 0x00000002 // Warnings > > + # DEBUG_LOAD 0x00000004 // Load events > > + # DEBUG_FS 0x00000008 // EFI File system > > + # DEBUG_POOL 0x00000010 // Alloc & Free's > > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > > + # DEBUG_INFO 0x00000040 // Verbose > > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers > > + # DEBUG_VARIABLE 0x00000100 // Variable > > + # DEBUG_BM 0x00000400 // Boot Manager > > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > > + # DEBUG_NET 0x00004000 // SNI Driver > > + # DEBUG_UNDI 0x00010000 // UNDI Driver > > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > > + # DEBUG_EVENT 0x00080000 // Event messages > > + # DEBUG_GCD 0x00100000 // Global Coherency Database changes > > + # DEBUG_CACHE 0x00200000 // Memory range cachability changes > > + # DEBUG_ERROR 0x80000000 // Error > > +# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F > > + > > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00 > > + > > + #------------------------------- > > + # gEmbeddedTokenSpaceGuid > > + #------------------------------- > > + > > + # MMC > > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808000 > > + > > > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|5000000 > > 0 > > + > > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25000000 > > + > > + # > > + # Optional feature to help prevent EFI memory map fragments > > + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob > > + # Values are in EFI Pages (4K). DXE Core will make sure that > > + # at least this much of each type of memory can be allocated > > + # from a single memory range. This way you only end up with > > + # maximum of two fragements for each type in the memory map > > + # (the memory used, and the free memory that was prereserved > > + # but not used). > > + # > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > > + > > > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|819 > > 2 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > > + > > + # We want to use the Shell Libraries but don't want it to initialise > > + # automatically. We initialise the libraries when the command is called by > > the > > + # Shell. > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + > > + # Pcd Settings - UART Serial Terminal > > + # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000. > > + # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100. > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|32 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xFFC02000 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|100000000 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF, 0xFF, > > 0xFF, 0xFF, 0xFF} > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > > + > > + # ConColumn/Row > > + > > > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutSetupVa > > r"|gArmGlobalVariableGuid|0x0|132 > > + > > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutSetupVar"| > > gArmGlobalVariableGuid|0x4|43 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > > + > > + # RunAxf support via Dynamic Shell Command protocol > > + # We want to use the Shell Libraries but don't want it to initialise > > + # automatically. We initialise the libraries when the command is called by > > the > > + # Shell. > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + > > + > > + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, > > 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, > 0x66, > > 0x23, 0x31 } > > + > > +!if $(USE_ARM_BDS) == FALSE > > + > > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationC > > hange|FALSE > > +!endif > > + > > +# TODO: Add suppot for secure boot > > +!if $(SECURE_BOOT_ENABLE) == TRUE > > + # override the default values from SecurityPkg to ensure images from all > > sources are verified in secure boot > > + > > > gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > > + > > gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x0 > > 4 > > + > > gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolic > > y|0x04 > > +!endif > > + > > + > > +[PcdsFeatureFlag.common] > > + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE > > + > > + > > + # Use the Vector Table location in CpuDxe. We will not copy the Vector > > Table at PcdCpuVectorBaseAddress > > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > > + > > + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE > > + # If TRUE, Graphics Output Protocol will be installed on virtual handle > > created by ConsplitterDxe. > > + # Set FALSE to save size. > > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE > > + > > + > > +[LibraryClasses.common] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + > > > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounter > > Lib/ArmGenericTimerPhyCounterLib.inf > > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > > + > > > ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler > > Lib.inf > > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > > + > > > ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatfo > > rmLib.inf > > + > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + > FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > + > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > > + > > > ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPla > > tformStackLib.inf > > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > > + > > > CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCach > > eMaintenanceLib.inf > > + > > > CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib > > .inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > > + > > > DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/D > > efaultExceptionHandlerLib.inf > > + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > > + > > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTabl > > eLib.inf > > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > > + > > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/Base > > PeCoffGetEntryPointLib.inf > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > + > > > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanc > > eLibNull.inf > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > > > RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRea > > lTimeClockLib.inf > > + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf > > + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > > + > > + > > > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort > > Lib16550.inf > > + > > > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePla > > tformHookLibNull.inf > > + > > + > > > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniz > > ationLib.inf > > + > > > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBoo > > tManagerLib.inf > > + > > > PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/Platfor > > mBootManagerLib.inf #thloh > > + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf > #thloh > > + > > + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf > > + > > + > > > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiA > > pplicationEntryPoint.inf > > + > > > UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBo > > otServicesTableLib.inf > > + > > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > > mpressLib.inf > > + > > > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry > > Point.inf > > + > > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiService > > sLib.inf > > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > > + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > > + > > > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib > > /UefiRuntimeServicesTableLib.inf > > + > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > > + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf > > + # > > + # Secure Boot dependencies > > + # > > +!if $(SECURE_BOOT_ENABLE) == TRUE > > + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf > > + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > > + > > TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTp > > mMeasurementLib.inf > > + > AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > > + > > + # re-use the UserPhysicalPresent() dummy implementation from the > ovmf > > tree > > + > > > PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.i > > nf > > +!else > > + > > > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/Tp > > mMeasurementLibNull.inf > > + > > > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableL > > ibNull.inf > > +!endif > > + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > > + > > +!if $(USE_ARM_BDS) == FALSE > > + > > > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.i > > nf > > + > > GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericB > > dsLib.inf > > + > > > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Custo > > mizedDisplayLib.inf > > +!endif > > + > > + #------------------------------- > > + # Networking Requirements > > + #------------------------------- > > + DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf > > + IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf > > + NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf > > + UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf > > + > > + #------------------------------- > > + # These libraries are used by the dynamic EFI Shell commands > > + #------------------------------- > > + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > > + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > > + > > + #------------------------------- > > + # Build Debug / Release > > + #------------------------------- > > +!if $(TARGET) == RELEASE > > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > > +!else > > + > > > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort. > > inf > > +!endif > > + > > + > > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLi > > bNull.inf > > + > > > DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/Debu > > gAgentTimerLibNull.inf > > + > > > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/Bas > > eDebugPrintErrorLevelLib.inf > > + > > > PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPe > > CoffExtraActionLib.inf > > + > > +[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + > > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > > mpressLib.inf > > + > > > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionL > > ib/PrePiExtractGuidedSectionLib.inf > > + > > > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/L > > zmaCustomDecompressLib.inf > > + > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > + > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > > > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre > > PiHobListPointerLib.inf > > + > > > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/Pre > > PiMemoryAllocationLib.inf > > + > > > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanc > > eLib.inf > > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > > + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER, > > LibraryClasses.common.UEFI_APPLICATION, > > LibraryClasses.common.UEFI_DRIVER] > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf > > + > > +[LibraryClasses.common.PEI_CORE] > > + > > > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionL > > ib/PrePiExtractGuidedSectionLib.inf > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > > > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/L > > zmaCustomDecompressLib.inf > > + > > > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemory > > AllocationLib.inf > > + > > > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibN > > ull/OemHookStatusCodeLibNull.inf > > + > > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/Base > > PeCoffGetEntryPointLib.inf > > + > > > PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.in > > f > > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > > + > > > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanc > > eLib.inf > > + > > > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre > > PiHobListPointerLib.inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + #thloh > > > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiR > > eportStatusCodeLib.inf > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + > > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > > mpressLib.inf > > + > > PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/PeiCrc32GuidedS > > ectionExtractLib/PeiCrc32GuidedSectionExtractLib.inf > > + > > +[LibraryClasses.common.DXE_CORE] > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > > > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint > > .inf > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > > xtractGuidedSectionLib.inf > > + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > > + > > > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLi > > b/DxeCoreMemoryAllocationLib.inf > > + > > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCore > > PerformanceLib.inf > > + # thloh > > > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > > odeLibFramework/DxeReportStatusCodeLib.inf > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + > > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > > mpressLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER] > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > > ryAllocationLib.inf > > + > > > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementL > > ib/DxeSecurityManagementLib.inf > > + > > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforma > > nceLib.inf > > + > > > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > > odeLibFramework/DxeReportStatusCodeLib.inf > > + > > +[LibraryClasses.common.UEFI_APPLICATION] > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + > > > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > > ryAllocationLib.inf > > + > > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforma > > nceLib.inf > > + > > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > > mpressLib.inf > > + > > +[LibraryClasses.common.UEFI_DRIVER] > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > > xtractGuidedSectionLib.inf > > + > > > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > > ryAllocationLib.inf > > + > > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforma > > nceLib.inf > > + > > > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > > odeLibFramework/DxeReportStatusCodeLib.inf > > + > > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > > mpressLib.inf > > + > > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > > +!if $(SECURE_BOOT_ENABLE) == TRUE > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > > +!endif > > + > > > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.i > > nf > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + > > > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemo > > ryAllocationLib.inf > > + > > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dx > > eReportStatusCodeLib.inf > > + > > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > > + # > > + # PSCI support in EL3 may not be available if we are not running under a > > PSCI > > + # compliant secure firmware, but since the default VExpress > > EfiResetSystemLib > > + # cannot be supported at runtime (due to the fact that the syscfg MMIO > > registers > > + # cannot be runtime remapped), it is our best bet to get ResetSystem > > functionality > > + # on these platforms. > > + # > > + > > > EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSy > > stemLib.inf > > + > > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > > + # It is not possible to prevent the ARM compiler for generic intrinsic > > functions. > > + # This library provides the instrinsic functions generate by a given > compiler. > > + # [LibraryClasses.ARM] and NULL mean link this library into all ARM > images. > > + # > > + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf > > + > > + # Add support for GCC stack protector > > + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > > + > > +######################################################### > > ####################### > > +# > > +# Components Section - list of all EDK II Modules needed by this Platform > > +# > > +######################################################### > > ####################### > > +[Components.common] > > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > > + <LibraryClasses> > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > > + > > + ArmPlatformPkg/PrePi/PeiUniCore.inf { > > + <LibraryClasses> > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + # > > + # DXE > > + # > > + MdeModulePkg/Core/Dxe/DxeMain.inf { > > + <LibraryClasses> > > + #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > > > NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32G > > uidedSectionExtractLib.inf > > + } > > + > > + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + MdeModulePkg/Application/UiApp/UiApp.inf { > > + <LibraryClasses> > > + > > > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > > + > > NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf > > + > > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMainte > > nanceManagerUiLib.inf > > + } > > + > > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf > > + > > + FatPkg/EnhancedFatDxe/Fat.inf > > + > > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > > + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + > > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > + > > > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleD > > xe.inf > > + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > + > > > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > + > > > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.in > > f > > + > > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe. > > inf > > + > > > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCoun > > terRuntimeDxe.inf > > + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > + > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > > { > > + <LibraryClasses> > > + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf > > + } > > + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > > + > > + # Multimedia Card Interface > > + EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Shell > > + ShellPkg/Application/Shell/Shell.inf { > > + <LibraryClasses> > > + > > > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellComma > > ndLib.inf > > + > > > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2Comma > > ndsLib.inf > > + > > > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1Comma > > ndsLib.inf > > + > > > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3Comma > > ndsLib.inf > > + > > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Com > > mandsLib.inf > > + > > > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Com > > mandsLib.inf > > + > > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1Com > > mandsLib.inf > > + > > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1 > > CommandsLib.inf > > + > > > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingL > > ib.inf > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > > > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfg > > CommandLib.inf > > + > > + <PcdsFixedAtBuild> > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 > > + } > > + > > + # > > + # Platform Specific Init for DXE phase > > + # > > + Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > + > > +[BuildOptions] > > + #------------------------------- > > + # Common > > + #------------------------------- > > + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -fstack-protector - > > O2 -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security > > + GCC:RELEASE_*_*_DLINK_FLAGS = -z noexecstack -z relro -z now > > + > > + #------------------------------- > > + # IntelPlatformPkg/... > > + #------------------------------- > > + GCC:DEBUG_*_AARCH64_PLATFORM_FLAGS = - > > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -Wno-unused-but- > set- > > variable #-mstrict-align > > + GCC:RELEASE_*_AARCH64_PLATFORM_FLAGS = - > > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -DMDEPKG_NDEBUG > - > > DMDEPKG_NDEBUG # -mstrict-align > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > new file mode 100755 > > index 000000000000..cab6536b5350 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > @@ -0,0 +1,270 @@ > > +#/** @file > > +# Intel SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > > available under > > +# the terms and conditions of the BSD License which accompanies this > > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > +######################################################### > > ####################### > > +# > > +# FD Section > > +# The [FD] Section is made up of the definition statements and a > > +# description of what goes into the Flash Device Image. Each FD section > > +# defines one flash "device" image. A flash device image may be one of > > +# the following: Removable media bootable image (like a boot floppy > > +# image,) an Option ROM image (that would be "flashed" into an add-in > > +# card,) a System "Flash" image (that would be burned into a system's > > +# flash) or an Update ("Capsule") image that will be used to update and > > +# existing system flash. > > +# > > +######################################################### > > ####################### > > + > > +[FD.IntelStratix10_EFI] > > +BaseAddress = 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # > > The base address of the Firmware in remapped DRAM. > > +Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in > > bytes > > +ErasePolarity = 1 > > +BlockSize = 0x00000001 > > +NumBlocks = 0x00400000 > > + > > +######################################################### > > ####################### > > +# > > +# FD Region layout > > +# > > +# A Layout Region start with a eight digit hex offset (leading "0x" required) > > +# followed by the pipe "|" character, > > +# followed by the size of the region, also in hex with the leading "0x" > > characters. > > +# Must be defined in ascending order and may not overlap. > > +# Like: > > +# Offset|Size > > +# PcdOffsetCName|PcdSizeCName > > +# RegionType <FV, DATA, or FILE> > > +# > > +######################################################### > > ####################### > > +0x00000000|0x00400000 > > > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > > +FV = FV_PEIDXE > > + > > +[FV.FV_PEIDXE] > > +FvAlignment = 8 > > +ERASE_POLARITY = 1 > > +MEMORY_MAPPED = TRUE > > +STICKY_WRITE = TRUE > > +LOCK_CAP = TRUE > > +LOCK_STATUS = TRUE > > +WRITE_DISABLED_CAP = TRUE > > +WRITE_ENABLED_CAP = TRUE > > +WRITE_STATUS = TRUE > > +WRITE_LOCK_CAP = TRUE > > +WRITE_LOCK_STATUS = TRUE > > +READ_DISABLED_CAP = TRUE > > +READ_ENABLED_CAP = TRUE > > +READ_STATUS = TRUE > > +READ_LOCK_CAP = TRUE > > +READ_LOCK_STATUS = TRUE > > + > > + INF ArmPlatformPkg/PrePi/PeiUniCore.inf > > + > > + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF > > PROCESSING_REQUIRED = TRUE { > > + SECTION FV_IMAGE = FV_DXE > > + } > > + } > > + > > +[FV.FV_DXE] > > +BlockSize = 0x00000001 > > +NumBlocks = 0 # This FV gets compressed so make it just big > > enough > > +FvAlignment = 8 # FV alignment and FV attributes setting. > > +ERASE_POLARITY = 1 > > +MEMORY_MAPPED = TRUE > > +STICKY_WRITE = TRUE > > +LOCK_CAP = TRUE > > +LOCK_STATUS = TRUE > > +WRITE_DISABLED_CAP = TRUE > > +WRITE_ENABLED_CAP = TRUE > > +WRITE_STATUS = TRUE > > +WRITE_LOCK_CAP = TRUE > > +WRITE_LOCK_STATUS = TRUE > > +READ_DISABLED_CAP = TRUE > > +READ_ENABLED_CAP = TRUE > > +READ_STATUS = TRUE > > +READ_LOCK_CAP = TRUE > > +READ_LOCK_STATUS = TRUE > > +FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c > > + > > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > + INF > > EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > > + > > + # > > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > > + # > > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > + INF > > MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > + INF > > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > > + INF > > > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.in > > f > > + INF > > > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCoun > > terRuntimeDxe.inf > > + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > > + > > + # Multiple Console IO support > > + INF > > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > + INF > > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > + > > + # ARM packages > > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > > + > > + # FAT filesystem + GPT/MBR partitioning > > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > + INF FatPkg/EnhancedFatDxe/Fat.inf > > + INF > > > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > + > > + # Multimedia Card Interface > > + INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Platform Specific Init for DXE phase > > + INF > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > + > > + # UEFI application (Shell Embedded Boot Loader) > > + INF ShellPkg/Application/Shell/Shell.inf > > + > > + # Bds > > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + INF MdeModulePkg/Application/UiApp/UiApp.inf > > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > + > > + # FV Filesystem > > + INF > > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe. > > inf > > + > > + # Include UEFI Shell Start Up Script > > + FILE FREEFORM = AF3F9E26-DDB5-4e85-B4D7-AC60A2772BC2 { > > + SECTION RAW = Platform/Intel/Stratix10/ShellScript/startup.nsh > > + SECTION UI = "startup.nsh" > > + } > > + > > + > > + > > +######################################################### > > ####################### > > +# > > +# Rules are use with the [FV] section's module INF type to define > > +# how an FFS file is created for a given INF file. The following Rule are the > > default > > +# rules for the different module type. User can add the customized rules > to > > define the > > +# content of the FFS file. > > +# > > +######################################################### > > ####################### > > + > > + > > +######################################################### > > ################### > > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation > section > > # > > +######################################################### > > ################### > > +# > > +#[Rule.Common.DXE_DRIVER] > > +# FILE DRIVER = $(NAMED_GUID) { > > +# DXE_DEPEX DXE_DEPEX Optional > > $(INF_OUTPUT)/$(MODULE_NAME).depex > > +# COMPRESS PI_STD { > > +# GUIDED { > > +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > +# UI STRING="$(MODULE_NAME)" Optional > > +# VERSION STRING="$(INF_VERSION)" Optional > > BUILD_NUM=$(BUILD_NUMBER) > > +# } > > +# } > > +# } > > +# > > +######################################################### > > ################### > > + > > +[Rule.Common.SEC] > > + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { > > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > > + } > > + > > +[Rule.Common.PEI_CORE] > > + FILE PEI_CORE = $(NAMED_GUID) FIXED { > > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING ="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM] > > + FILE PEIM = $(NAMED_GUID) FIXED { > > + PEI_DEPEX PEI_DEPEX Optional > > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM.TIANOCOMPRESSED] > > + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > > + PEI_DEPEX PEI_DEPEX Optional > > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 > > PROCESSING_REQUIRED = TRUE { > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + } > > + > > +[Rule.Common.DXE_CORE] > > + FILE DXE_CORE = $(NAMED_GUID) { > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_DRIVER] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_DRIVER] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_RUNTIME_DRIVER] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING="$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_APPLICATION] > > + FILE APPLICATION = $(NAMED_GUID) { > > + UI STRING ="$(MODULE_NAME)" Optional > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi > > + } > > + > > +[Rule.Common.UEFI_DRIVER.BINARY] > > + FILE DRIVER = $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional |.depex > > + PE32 PE32 |.efi > > + UI STRING="$(MODULE_NAME)" Optional > > + VERSION STRING="$(INF_VERSION)" Optional > > BUILD_NUM=$(BUILD_NUMBER) > > + } > > + > > +[Rule.Common.UEFI_APPLICATION.BINARY] > > + FILE APPLICATION = $(NAMED_GUID) { > > + PE32 PE32 |.efi > > + UI STRING="$(MODULE_NAME)" Optional > > + VERSION STRING="$(INF_VERSION)" Optional > > BUILD_NUM=$(BUILD_NUMBER) > > + } > > + > > + > > + > > diff --git > > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > new file mode 100644 > > index 000000000000..c3c0d7242082 > > --- /dev/null > > +++ > > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > @@ -0,0 +1,49 @@ > > +#/** @file > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials > > +# are licensed and made available under the terms and conditions of the > > BSD License > > +# which accompanies this distribution. The full text of the license may be > > found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +# > > +# > > +#**/ > > + > > +[Defines] > > + INF_VERSION = 0x00010005 > > + BASE_NAME = IntelPlatformDxe > > + FILE_GUID = AB87E291-1689-4c7b-B613-FB54A0E38CEA > > + MODULE_TYPE = DXE_DRIVER > > + VERSION_STRING = 1.0 > > + ENTRY_POINT = IntelPlatformDxeEntryPoint > > + > > +[Sources.common] > > + IntelPlatformDxe.c > > + > > +[Packages] > > + ArmPkg/ArmPkg.dec > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + MdePkg/MdePkg.dec > > + EmbeddedPkg/EmbeddedPkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + BaseMemoryLib > > + DebugLib > > + DxeServicesTableLib > > + PcdLib > > + PrintLib > > + SerialPortLib > > + UefiBootServicesTableLib > > + UefiRuntimeServicesTableLib > > + UefiLib > > + UefiDriverEntryPoint > > + > > + > > +[Depex] > > + # We depend on these protocols to create the default boot entries > > + gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid > > diff --git > > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > new file mode 100644 > > index 000000000000..83649c95c9c3 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > @@ -0,0 +1,49 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > > BSD License > > +* which accompanies this distribution. The full text of the license may be > > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +[Defines] > > + INF_VERSION = 0x00010005 > > + BASE_NAME = Stratix10PlatformLib > > + FILE_GUID = 99E236C7-D5FD-42A0-B520-60C85C4870B8 > > + MODULE_TYPE = BASE > > + VERSION_STRING = 1.0 > > + LIBRARY_CLASS = ArmPlatformLib > > + > > +[Packages] > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + ArmPkg/ArmPkg.dec > > + MdeModulePkg/MdeModulePkg.dec > > + MdePkg/MdePkg.dec > > + Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + ArmMmuLib > > + DebugLib > > + IoLib > > + PcdLib > > + > > +[Sources.common] > > + Stratix10PlatformLib.c > > + Stratix10Mmu.c > > + > > +[Sources.AArch64] > > + AArch64/ArmPlatformHelper.S > > + > > +[FixedPcd] > > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask > > + gArmTokenSpaceGuid.PcdArmPrimaryCore > > + > > diff --git > > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > new file mode 100644 > > index 000000000000..144b4c54ef55 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > @@ -0,0 +1,43 @@ > > +/** @file > > +* > > +* Copyright (c) 2019, Intel All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > > BSD License > > +* which accompanies this distribution. The full text of the license may be > > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > + > > +#include <Uefi.h> > > +#include <Guid/GlobalVariable.h> > > +#include <Library/ArmLib.h> > > +#include <Library/BaseLib.h> > > +#include <Library/BaseMemoryLib.h> > > +#include <Library/DebugLib.h> > > +#include <Library/DevicePathLib.h> > > +#include <Library/DxeServicesTableLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/MemoryAllocationLib.h> > > +#include <Library/PrintLib.h> > > +#include <Library/UefiBootServicesTableLib.h> > > +#include <Library/UefiLib.h> > > +#include <Library/UefiRuntimeServicesTableLib.h> > > +#include <Protocol/DevicePathFromText.h> > > + > > +EFI_STATUS > > +EFIAPI > > +IntelPlatformDxeEntryPoint ( > > + IN EFI_HANDLE ImageHandle, > > + IN EFI_SYSTEM_TABLE *SystemTable > > + ) > > +{ > > + EFI_STATUS Status = 0; > > + > > + return Status; > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > new file mode 100644 > > index 000000000000..ed4aa2bdb12a > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > @@ -0,0 +1,155 @@ > > +/** @file > > +* > > +* Stratix 10 Mmu configuration > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > > BSD License > > +* which accompanies this distribution. The full text of the license may be > > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include <Library/ArmLib.h> > > +#include <Library/ArmMmuLib.h> > > +#include <Library/ArmPlatformLib.h> > > +#include <Library/BaseMemoryLib.h> > > +#include <Library/DebugLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/MemoryAllocationLib.h> > > +#include <Library/PcdLib.h> > > +#include <Library/TimerLib.h> > > + > > +// The total number of descriptors, including the final "end-of-table" > > descriptor. > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 > > +ARM_MEMORY_REGION_DESCRIPTOR > > gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; > > + > > +// DDR attributes > > +#define DDR_ATTRIBUTES_CACHED > > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > > +#define DDR_ATTRIBUTES_UNCACHED > > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > > + > > +#define DRAM_BASE 0x0 > > +#define DRAM_SIZE 0x40000000 > > + > > +#define FPGA_SLAVES_BASE 0x80000000 > > +#define FPGA_SLAVES_SIZE 0x60000000 > > + > > +#define PERIPHERAL_BASE 0xF7000000 > > +#define PERIPHERAL_SIZE 0x08E00000 > > + > > +#define OCRAM_BASE 0xFFE00000 > > +#define OCRAM_SIZE 0x00100000 > > + > > +#define GIC_BASE 0xFFFC0000 > > +#define GIC_SIZE 0x00008000 > > + > > +#define MEM64_BASE 0x0100000000 > > +#define MEM64_SIZE 0x1F00000000 > > + > > +#define DEVICE64_BASE 0x2000000000 > > +#define DEVICE64_SIZE 0x0100000000 > > +/** > > + Return the Virtual Memory Map of your platform > > + > > + This Virtual Memory Map is used to initialize the MMU for DXE Phase. > > + > > + @param[out] VirtualMemoryMap Array of > > ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > > + Virtual Memory mapping. This array must be ended > by a > > zero-filled > > + entry > > + > > +**/ > > +VOID > > +EFIAPI > > +ArmPlatformGetVirtualMemoryMap ( > > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > > + UINTN Index = 0; > > + > > + VirtualMemoryTable = &gVirtualMemoryTable[0]; > > + > > + CacheAttributes = DDR_ATTRIBUTES_CACHED; > > + > > + // Start create the Virtual Memory Map table > > + // Our goal is to a simple 1:1 mapping where virtual==physical address > > + > > + // DDR SDRAM > > + VirtualMemoryTable[Index].PhysicalBase = DRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = DRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > > + > > + // FPGA > > + VirtualMemoryTable[Index].PhysicalBase = FPGA_SLAVES_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = FPGA_SLAVES_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // DEVICE 142MB > > + VirtualMemoryTable[Index].PhysicalBase = PERIPHERAL_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = PERIPHERAL_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // OCRAM 1MB but available 256KB > > + VirtualMemoryTable[Index].PhysicalBase = OCRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = OCRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > > + > > + // DEVICE 32KB > > + VirtualMemoryTable[Index].PhysicalBase = GIC_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = GIC_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // MEM 124GB > > + VirtualMemoryTable[Index].PhysicalBase = MEM64_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = MEM64_SIZE; > > + VirtualMemoryTable[Index++].Attributes = CacheAttributes; > > + > > + // DEVICE 4GB > > + VirtualMemoryTable[Index].PhysicalBase = DEVICE64_BASE; > > + VirtualMemoryTable[Index].VirtualBase = > > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length = DEVICE64_SIZE; > > + VirtualMemoryTable[Index++].Attributes = > > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // End of Table > > + VirtualMemoryTable[Index].PhysicalBase = 0; > > + VirtualMemoryTable[Index].VirtualBase = 0; > > + VirtualMemoryTable[Index].Length = 0; > > + VirtualMemoryTable[Index++].Attributes = > > (ARM_MEMORY_REGION_ATTRIBUTES)0; > > + > > + ASSERT((Index) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > > + > > + *VirtualMemoryMap = VirtualMemoryTable; > > +} > > + > > + > > +VOID > > +EFIAPI > > +InitMmu ( > > + VOID > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > > + VOID *TranslationTableBase; > > + UINTN TranslationTableSize; > > + RETURN_STATUS Status; > > + // Construct a Virtual Memory Map for this platform > > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > > + > > + // Configure the MMU > > + Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, > > &TranslationTableSize); > > + if (EFI_ERROR (Status)) { > > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); > > + } > > +} > > + > > diff --git > > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > > new file mode 100644 > > index 000000000000..6bee4d5d43e8 > > --- /dev/null > > +++ > > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > > @@ -0,0 +1,167 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of the > > BSD License > > +* which accompanies this distribution. The full text of the license may be > > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include <Library/ArmLib.h> > > +#include <Library/ArmPlatformLib.h> > > +#include <Library/DebugLib.h> > > +#include <Library/IoLib.h> > > +#include <Library/PcdLib.h> > > +#include <Ppi/ArmMpCoreInfo.h> > > +#include <Library/TimerLib.h> > > + > > +#define ALT_RSTMGR_OFST 0xffd11000 > > +#define ALT_RSTMGR_PER1MODRST_OFST 0x28 > > +#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK > > 0x00000001 > > +#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK 0xffffffef > > + > > + > > +VOID > > +AssertWatchDogTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 which may have been > > enabled by BootROM > > + MmioOr32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK); > > +} > > + > > +VOID > > +DeassertSystemTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 which may have been > > enabled by BootROM > > + MmioAnd32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK); > > +} > > + > > + > > +/** > > + * Return the current Boot Mode > > + * > > + * This function returns the boot reason on the platform > > + * > > + * **/ > > +EFI_BOOT_MODE > > +ArmPlatformGetBootMode ( > > + VOID > > + ) > > +{ > > + return BOOT_WITH_FULL_CONFIGURATION; > > +} > > + > > + > > +/** > > + Initialize controllers that must setup before entering PEI MAIN > > +**/ > > +RETURN_STATUS > > +ArmPlatformInitialize ( > > + IN UINTN MpId > > + ) > > +{ > > + AssertWatchDogTimerZeroReset(); > > + return EFI_SUCCESS; > > +} > > + > > +//----------------------------------------------------------------------------------------- > > +// BEGIN ARM CPU RELATED CODE > > +//----------------------------------------------------------------------------------------- > > + > > +// This Table will be consume by Hob init code to publish it into HOB as > > MPCore Info > > +// Hob init code will retrieve it by calling PrePeiCoreGetMpCoreInfo via Ppi > > +ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = { > > + { > > + // Cluster 0, Core 0 > > + 0x0, 0x0, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 1 > > + 0x0, 0x1, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 2 > > + 0x0, 0x2, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 3 > > + 0x0, 0x3, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + } > > +}; > > + > > +EFI_STATUS > > +PrePeiCoreGetMpCoreInfo ( > > + OUT UINTN *CoreCount, > > + OUT ARM_CORE_INFO **ArmCoreTable > > + ) > > +{ > > + *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / > > sizeof(ARM_CORE_INFO); > > + *ArmCoreTable = mArmPlatformNullMpCoreInfoTable; > > + return EFI_SUCCESS; > > +} > > + > > +// This will be consume by PrePeiCore to install Ppi > > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is > > undefined in the contect of PrePeiCore > > +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; > > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = > > { PrePeiCoreGetMpCoreInfo }; > > + > > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { > > + { > > + EFI_PEI_PPI_DESCRIPTOR_PPI, > > + &mArmMpCoreInfoPpiGuid, > > + &mMpCoreInfoPpi > > + } > > +}; > > + > > +VOID > > +ArmPlatformGetPlatformPpiList ( > > + OUT UINTN *PpiListSize, > > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > > + ) > > +{ > > + *PpiListSize = sizeof(gPlatformPpiTable); > > + *PpiList = gPlatformPpiTable; > > +} > > + > > +//----------------------------------------------------------------------------------------- > > +// END ARM CPU RELATED CODE > > +//----------------------------------------------------------------------------------------- > > + > > diff --git > > > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > > lper.S > > > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > > lper.S > > new file mode 100644 > > index 000000000000..2f4cf95cbf13 > > --- /dev/null > > +++ > > > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > > lper.S > > @@ -0,0 +1,51 @@ > > +// > > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > > +// > > +// This program and the accompanying materials > > +// are licensed and made available under the terms and conditions of the > > BSD License > > +// which accompanies this distribution. The full text of the license may be > > found at > > +// http://opensource.org/licenses/bsd-license.php > > +// > > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > > BASIS, > > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > > EXPRESS OR IMPLIED. > > +// > > +// > > + > > +#include <AsmMacroIoLibV8.h> > > +#include <Library/ArmLib.h> > > + > > +ASM_FUNC(ArmPlatformPeiBootAction) > > + ret > > + > > +//UINTN > > +//ArmPlatformGetCorePosition ( > > +// IN UINTN MpId > > +// ); > > +// With this function: CorePos = (ClusterId * 4) + CoreId > > +ASM_FUNC(ArmPlatformGetCorePosition) > > + and x1, x0, #ARM_CORE_MASK > > + and x0, x0, #ARM_CLUSTER_MASK > > + add x0, x1, x0, LSR #6 > > + ret > > + > > +//UINTN > > +//ArmPlatformGetPrimaryCoreMpId ( > > +// VOID > > +// ); > > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > > + ret > > + > > +//UINTN > > +//ArmPlatformIsPrimaryCore ( > > +// IN UINTN MpId > > +// ); > > +ASM_FUNC(ArmPlatformIsPrimaryCore) > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > > + and x0, x0, x1 > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > > + cmp w0, w1 > > + mov x0, #1 > > + mov x1, #0 > > + csel x0, x0, x1, eq > > + ret > > diff --git a/Platform/Intel/Stratix10/Readme.md > > b/Platform/Intel/Stratix10/Readme.md > > new file mode 100644 > > index 000000000000..334439fa9a47 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Readme.md > > @@ -0,0 +1,61 @@ > > +Intel Stratix 10 Platform > > +========================= > > + > > +# Summary > > + > > +This is a port of 64-bit Tiano Core UEFI for the Intel Stratix 10 platform > > +based on Stratix 10 SX development board. > > + > > +This UEFI port works with ATF + UEFI implementation for Intel Stratix 10 > > board, and > > +will boot to Linux port of Stratix 10. > > + > > +# Status > > + > > +This firmware has been validated to boot to Linux for Stratix 10 that can > be > > obtained from > > +https://github.com/altera-opensource/linux-socfpga. > > + > > +The default boot is the UEFI shell. The UEFI > > +shell will run startup.nsh by default, and you may change the startup.nsh > to > > run commands on boot. > > + > > +# Building the firmware > > + > > +- Fetch the ATF, edk2, and edk2-platforms repositories into local host. > > + Make all the repositories in the same ${BUILD\_PATH}. > > + > > +- Install the AARCH64 GNU 4.8 toolchain. > > + > > +- Build UEFI using Stratix 10 platform as configuration > > + > > + . edksetup.sh > > + > > + build -a AARCH64 -p Platform/Intel/Stratix10/Stratix10SoCPkg.dsc -t > > GCC48 -b RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y FLASH -Y > > DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS > > + > > +Note: Refer to build instructions from the top level edk2-platforms > > Readme.md for further details > > + > > +- Build ATF for Stratix 10 platform > > + > > + make CROSS_COMPILE=aarch64-linux-gnu- device=s10 > > + > > +- Build atf providing the previously generated UEFI as the BL33 image > > + > > + make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=stratix10 > > + BL33=PEI.ROM > > + > > +Install Procedure > > +----------------- > > + > > +- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10 > > + board. > > + > > +- Generate a SOF containing bl2 > > + > > +.. code:: bash > > + aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses > > 0xffe00000 bl2.bin bl2.hex > > + quartus_cpf --bootloader bl2.hex <quartus_generated_sof> > > <output_sof_with_bl2> > > + > > +- Configure SOF to board > > + > > +.. code:: bash > > + nios2-configure-sof <output_sof_with_bl2> > > + > > + > > diff --git a/Platform/Intel/Stratix10/ShellScript/startup.nsh > > b/Platform/Intel/Stratix10/ShellScript/startup.nsh > > new file mode 100644 > > index 000000000000..8c4067972c5b > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/ShellScript/startup.nsh > > @@ -0,0 +1,2 @@ > > +Image dtb=socfpga_stratix10_socdk.dtb console=ttyS0,115200 > > root=/dev/mmcblk0p2 rw rootwait > > + > > -- > > 2.19.0 > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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