[v2] Update the reset values of the Xilinx ZynqMP QSPI

[Qemu-devel] [PATCH-2.12 v2 0/3] Update the reset values of the Xilinx ZynqMP QSPI

Alistair Francis posted 3 patches 6 years, 4 months ago

Diff against v1 v3
Download series mbox

Failed in applying to current master (apply log)

There is a newer version of this series

hw/ssi/xilinx_spips.c         | 45 +++++++++++++++++++++++++++++++------------
include/hw/ssi/xilinx_spips.h |  2 +-
2 files changed, 34 insertions(+), 13 deletions(-)

Expand all Fold all

[Qemu-devel] [PATCH-2.12 v2 0/3] Update the reset values of the Xilinx ZynqMP QSPI

Posted by Alistair Francis 6 years, 4 months ago

Update the reset values of the Xilinx ZynqMP QSPI device to match the
resister spec here:
https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html

V2:
 - Don't double set registers

Based-on: 20171126231634.9531-14-frasse.iglesias@gmail.com

Alistair Francis (3):
  xilinx_spips: Update the QSPI Mod ID reset value
  xilinx_spips: Set all of the reset values
  xilinx_spips: Use memset instead of a for loop to zero registers

 hw/ssi/xilinx_spips.c         | 45 +++++++++++++++++++++++++++++++------------
 include/hw/ssi/xilinx_spips.h |  2 +-
 2 files changed, 34 insertions(+), 13 deletions(-)

-- 
2.14.1