[PATCH v2 0/8] Add some checks before translating instructions

Song Gao posted 8 patches 9 months, 1 week ago
Failed in applying to current master (apply log)
There is a newer version of this series
target/loongarch/cpu.c                        |    1 +
target/loongarch/insn_trans/trans_arith.c.inc |   96 +-
.../loongarch/insn_trans/trans_atomic.c.inc   |   92 +-
target/loongarch/insn_trans/trans_bit.c.inc   |   56 +-
.../loongarch/insn_trans/trans_branch.c.inc   |   20 +-
target/loongarch/insn_trans/trans_extra.c.inc |   28 +-
.../loongarch/insn_trans/trans_farith.c.inc   |   96 +-
target/loongarch/insn_trans/trans_fcmp.c.inc  |    8 +
target/loongarch/insn_trans/trans_fcnv.c.inc  |   56 +-
.../loongarch/insn_trans/trans_fmemory.c.inc  |   32 +-
target/loongarch/insn_trans/trans_fmov.c.inc  |   52 +-
target/loongarch/insn_trans/trans_lsx.c.inc   | 1482 +++++++++--------
.../loongarch/insn_trans/trans_memory.c.inc   |   84 +-
.../insn_trans/trans_privileged.c.inc         |   24 +-
target/loongarch/insn_trans/trans_shift.c.inc |   34 +-
target/loongarch/translate.c                  |    3 +
target/loongarch/translate.h                  |   24 +-
17 files changed, 1237 insertions(+), 951 deletions(-)
[PATCH v2 0/8] Add some checks before translating instructions
Posted by Song Gao 9 months, 1 week ago
Based-on: https://patchew.org/QEMU/20230809083258.1787464-1-c@jia.je/

Hi,

This series adds some checks before translating instructions

This includes:

CPUCFG[1].IOCSR

CPUCFG[2].FP
CPUCFG[2].FP_SP
CPUCFG[2].FP_DP
CPUCFG[2].LSPW
CPUCFG[2].LAM
CPUCFG[2].LSX

V2:
- Add a check parameter to the TRANS macro.
- remove TRANS_64.
- Add avail_ALL/64/FP/FP_SP/FP_DP/LSPW/LAM/LSX/IOCSR
  to check instructions.

Thanks.
Song Gao

Song Gao (8):
  target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW.
  target/loongarch: Add a check parameter to the TRANS macro
  target/loongarch: Add avail_64 to check la64-only instructions
  target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions
  target/loongarch: Add avail_LSPW to check LSPW instructions
  target/loongarch: Add avail_LAM to check atomic instructions
  target/loongarch: Add avail_LSX to check LSX instructions
  target/loongarch: Add avail_IOCSR to check iocsr instructions

 target/loongarch/cpu.c                        |    1 +
 target/loongarch/insn_trans/trans_arith.c.inc |   96 +-
 .../loongarch/insn_trans/trans_atomic.c.inc   |   92 +-
 target/loongarch/insn_trans/trans_bit.c.inc   |   56 +-
 .../loongarch/insn_trans/trans_branch.c.inc   |   20 +-
 target/loongarch/insn_trans/trans_extra.c.inc |   28 +-
 .../loongarch/insn_trans/trans_farith.c.inc   |   96 +-
 target/loongarch/insn_trans/trans_fcmp.c.inc  |    8 +
 target/loongarch/insn_trans/trans_fcnv.c.inc  |   56 +-
 .../loongarch/insn_trans/trans_fmemory.c.inc  |   32 +-
 target/loongarch/insn_trans/trans_fmov.c.inc  |   52 +-
 target/loongarch/insn_trans/trans_lsx.c.inc   | 1482 +++++++++--------
 .../loongarch/insn_trans/trans_memory.c.inc   |   84 +-
 .../insn_trans/trans_privileged.c.inc         |   24 +-
 target/loongarch/insn_trans/trans_shift.c.inc |   34 +-
 target/loongarch/translate.c                  |    3 +
 target/loongarch/translate.h                  |   24 +-
 17 files changed, 1237 insertions(+), 951 deletions(-)

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2.39.1