Hi; here's a target-arm pullreq. Mostly this is some decodetree
conversion patches from me, plus a scattering of other bug fixes.
thanks
-- PMM
The following changes since commit e3660cc1e3cb136af50c0eaaeac27943c2438d1d:
Merge tag 'pull-loongarch-20230616' of https://gitlab.com/gaosong/qemu into staging (2023-06-16 12:30:16 +0200)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230619
for you to fetch changes up to 074259c0f2ac40042dce766d870318cc22f388eb:
hw/misc/bcm2835_property: Handle CORE_CLK_ID firmware property (2023-06-19 15:27:21 +0100)
----------------------------------------------------------------
target-arm queue:
* Fix return value from LDSMIN/LDSMAX 8/16 bit atomics
* Return correct result for LDG when ATA=0
* Conversion of system insns, loads and stores to decodetree
* hw/intc/allwinner-a10-pic: Handle IRQ levels other than 0 or 1
* hw/sd/allwinner-sdhost: Don't send non-boolean IRQ line levels
* hw/timer/nrf51_timer: Don't lose time when timer is queried in tight loop
* hw/arm/Kconfig: sbsa-ref uses Bochs display
* imx_serial: set wake bit when we receive a data byte
* docs: sbsa: document board to firmware interface
* hw/misc/bcm2835_property: avoid hard-coded constants
----------------------------------------------------------------
Marcin Juszkiewicz (2):
hw/arm/Kconfig: sbsa-ref uses Bochs display
docs: sbsa: document board to firmware interface
Martin Kaiser (1):
imx_serial: set wake bit when we receive a data byte
Peter Maydell (26):
target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics
target/arm: Return correct result for LDG when ATA=0
target/arm: Pass memop to gen_mte_check1_mmuidx() in reg_imm9 decode
target/arm: Consistently use finalize_memop_asimd() for ASIMD loads/stores
target/arm: Convert hint instruction space to decodetree
target/arm: Convert barrier insns to decodetree
target/arm: Convert CFINV, XAFLAG and AXFLAG to decodetree
target/arm: Convert MSR (immediate) to decodetree
target/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetree
target/arm: Convert exception generation instructions to decodetree
target/arm: Convert load/store exclusive and ordered to decodetree
target/arm: Convert LDXP, STXP, CASP, CAS to decodetree
target/arm: Convert load reg (literal) group to decodetree
target/arm: Convert load/store-pair to decodetree
target/arm: Convert ld/st reg+imm9 insns to decodetree
target/arm: Convert LDR/STR with 12-bit immediate to decodetree
target/arm: Convert LDR/STR reg+reg to decodetree
target/arm: Convert atomic memory ops to decodetree
target/arm: Convert load (pointer auth) insns to decodetree
target/arm: Convert LDAPR/STLR (imm) to decodetree
target/arm: Convert load/store (multiple structures) to decodetree
target/arm: Convert load/store single structure to decodetree
target/arm: Convert load/store tags insns to decodetree
hw/intc/allwinner-a10-pic: Handle IRQ levels other than 0 or 1
hw/sd/allwinner-sdhost: Don't send non-boolean IRQ line levels
hw/timer/nrf51_timer: Don't lose time when timer is queried in tight loop
Sergey Kambalin (4):
hw/arm/raspi: Import Linux raspi definitions as 'raspberrypi-fw-defs.h'
hw/misc/bcm2835_property: Use 'raspberrypi-fw-defs.h' definitions
hw/misc/bcm2835_property: Replace magic frequency values by definitions
hw/misc/bcm2835_property: Handle CORE_CLK_ID firmware property
docs/system/arm/sbsa.rst | 38 +-
include/hw/arm/raspi_platform.h | 10 +
include/hw/char/imx_serial.h | 1 +
include/hw/misc/raspberrypi-fw-defs.h | 163 ++
target/arm/tcg/a64.decode | 403 ++++
hw/char/imx_serial.c | 5 +-
hw/intc/allwinner-a10-pic.c | 2 +-
hw/misc/bcm2835_property.c | 112 +-
hw/sd/allwinner-sdhost.c | 2 +-
hw/timer/nrf51_timer.c | 7 +-
target/arm/tcg/translate-a64.c | 3319 +++++++++++++++------------------
hw/arm/Kconfig | 1 +
12 files changed, 2157 insertions(+), 1906 deletions(-)
create mode 100644 include/hw/misc/raspberrypi-fw-defs.h