Support for print to log vector extension registers

[PATCH v3 0/2] Support for print to log vector extension registers

Ivan Klokov posted 2 patches 1 year ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230410124451.15929-1-ivan.klokov@syntacore.com

Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <eduardo@habkost.net>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Yanan Wang <wangyanan55@huawei.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liweiwei@iscas.ac.cn>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

accel/tcg/cpu-exec.c  |  3 +++
include/hw/core/cpu.h |  2 ++
include/qemu/log.h    |  1 +
target/riscv/cpu.c    | 56 ++++++++++++++++++++++++++++++++++++++++++-
util/log.c            |  2 ++
5 files changed, 63 insertions(+), 1 deletion(-)

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[PATCH v3 0/2] Support for print to log vector extension registers

Posted by Ivan Klokov 1 year ago

The patch added an ability to include VPU registers in the 'cpu' logging.
---
v3:
   - split of the patch into two parts: general and RISC-V specific
---

Ivan Klokov (2):
  util/log: Add vector registers to log
  target/riscv: Add RVV registers to log

 accel/tcg/cpu-exec.c  |  3 +++
 include/hw/core/cpu.h |  2 ++
 include/qemu/log.h    |  1 +
 target/riscv/cpu.c    | 56 ++++++++++++++++++++++++++++++++++++++++++-
 util/log.c            |  2 ++
 5 files changed, 63 insertions(+), 1 deletion(-)

-- 
2.34.1

Re: [PATCH v3 0/2] Support for print to log vector extension registers

Posted by Alistair Francis 11 months ago

On Mon, Apr 10, 2023 at 10:46 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> The patch added an ability to include VPU registers in the 'cpu' logging.
> ---
> v3:
>    - split of the patch into two parts: general and RISC-V specific
> ---
>
> Ivan Klokov (2):
>   util/log: Add vector registers to log
>   target/riscv: Add RVV registers to log

I'm going to go ahead and merge this

Applied to riscv-to-apply.next

Alistair

>
>  accel/tcg/cpu-exec.c  |  3 +++
>  include/hw/core/cpu.h |  2 ++
>  include/qemu/log.h    |  1 +
>  target/riscv/cpu.c    | 56 ++++++++++++++++++++++++++++++++++++++++++-
>  util/log.c            |  2 ++
>  5 files changed, 63 insertions(+), 1 deletion(-)
>
> --
> 2.34.1
>
>