From nobody Wed May 15 19:21:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1681130821; cv=none; d=zohomail.com; s=zohoarc; b=bSry5iM/Ax9wEhLQAJt5KPsOMakd8H8tT5UIpIR6dCS+UxI/dKWlX241g9jOuKsW+TikmcJqeLERyVXUwEmZR281fdxCRp8qouSPzCW2oT6dnyVi2bhwbRPFad9mFsdXDh83TtmdWwbK5za8/FQyL4FsF4ZzflE8jEU/r0ST4T8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1681130821; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ws8UZbWZ43H9WIfvrwofpDwLMb//4wQVSXRDrM+/i28=; b=BJqkDh8f/MD2OTov0mOT1+9nbB6lbThjgTZZGI+pA7MmXhwzoOrW7eEpdMnefK147VYGjN+jMpNzukXVp3HyWPsIkFiGkEULi2esfq4YpRy9askNH2EvNWUkJSHZxVHaFrjbjFU0lkWSd1QqmmZ57+kN+3q8+7Ip0EHUCljEEzQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1681130821353977.839375465121; Mon, 10 Apr 2023 05:47:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1plqtr-000669-OJ; Mon, 10 Apr 2023 08:45:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1plqtm-00063t-83; Mon, 10 Apr 2023 08:45:30 -0400 Received: from forward201b.mail.yandex.net ([2a02:6b8:c02:900:1:45:d181:d201]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1plqtj-0004Eo-Gu; Mon, 10 Apr 2023 08:45:29 -0400 Received: from mail-nwsmtp-smtp-production-main-25.sas.yp-c.yandex.net (mail-nwsmtp-smtp-production-main-25.sas.yp-c.yandex.net [IPv6:2a02:6b8:c08:2e14:0:640:2cd1:0]) by forward201b.mail.yandex.net (Yandex) with ESMTP id BB0AB46CFF; Mon, 10 Apr 2023 15:45:21 +0300 (MSK) Received: by mail-nwsmtp-smtp-production-main-25.sas.yp-c.yandex.net (smtp/Yandex) with ESMTPSA id GjTsr15WxCg0-4kWX4wq7; Mon, 10 Apr 2023 15:45:20 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mail; t=1681130720; bh=ws8UZbWZ43H9WIfvrwofpDwLMb//4wQVSXRDrM+/i28=; h=Message-Id:Date:In-Reply-To:Cc:Subject:References:To:From; b=wbzrNoiQjGBTEVnodvdVLW36GiMCQ4JzzmkC5IuIymvTZEPq1NB7UjBjQBXuBIAzM 0ItCkMoHrqlE4/XHs0b8w4zhGdwRti+J6f2qcexwz6ajFy0jeO341MX5STD75oNNIe HaZN8y/DNzAlQloYb86vg1ve9w1CIbINiV37FDxU= Authentication-Results: mail-nwsmtp-smtp-production-main-25.sas.yp-c.yandex.net; dkim=pass header.i=@syntacore.com From: Ivan Klokov To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, richard.henderson@linaro.org, pbonzini@redhat.com, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, Ivan Klokov Subject: [PATCH v3 1/2] util/log: Add vector registers to log Date: Mon, 10 Apr 2023 15:44:50 +0300 Message-Id: <20230410124451.15929-2-ivan.klokov@syntacore.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230410124451.15929-1-ivan.klokov@syntacore.com> References: <20230410124451.15929-1-ivan.klokov@syntacore.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a02:6b8:c02:900:1:45:d181:d201; envelope-from=ivan.klokov@syntacore.com; helo=forward201b.mail.yandex.net X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @syntacore.com) X-ZM-MESSAGEID: 1681130823125100003 Content-Type: text/plain; charset="utf-8" Added QEMU option 'vpu' to log vector extension registers such as gpr\fpu. Signed-off-by: Ivan Klokov Reviewed-by: Alistair Francis --- accel/tcg/cpu-exec.c | 3 +++ include/hw/core/cpu.h | 2 ++ include/qemu/log.h | 1 + util/log.c | 2 ++ 4 files changed, 8 insertions(+) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 56aaf58b9d..0dca69fccb 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -319,6 +319,9 @@ static void log_cpu_exec(target_ulong pc, CPUState *cpu, #if defined(TARGET_I386) flags |=3D CPU_DUMP_CCOP; #endif + if (qemu_loglevel_mask(CPU_LOG_TB_VPU)) { + flags |=3D CPU_DUMP_VPU; + } cpu_dump_state(cpu, logfile, flags); qemu_log_unlock(logfile); } diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 75689bff02..7c9d25ff45 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -545,11 +545,13 @@ GuestPanicInformation *cpu_get_crash_info(CPUState *c= pu); * @CPU_DUMP_CODE: * @CPU_DUMP_FPU: dump FPU register state, not just integer * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization = state + * @CPU_DUMP_VPU: dump VPU registers */ enum CPUDumpFlags { CPU_DUMP_CODE =3D 0x00010000, CPU_DUMP_FPU =3D 0x00020000, CPU_DUMP_CCOP =3D 0x00040000, + CPU_DUMP_VPU =3D 0x00080000, }; =20 /** diff --git a/include/qemu/log.h b/include/qemu/log.h index c5643d8dd5..df59bfabcd 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -35,6 +35,7 @@ bool qemu_log_separate(void); /* LOG_STRACE is used for user-mode strace logging. */ #define LOG_STRACE (1 << 19) #define LOG_PER_THREAD (1 << 20) +#define CPU_LOG_TB_VPU (1 << 21) =20 /* Lock/unlock output. */ =20 diff --git a/util/log.c b/util/log.c index 7837ff9917..93dccee7b8 100644 --- a/util/log.c +++ b/util/log.c @@ -495,6 +495,8 @@ const QEMULogItem qemu_log_items[] =3D { "log every user-mode syscall, its input, and its result" }, { LOG_PER_THREAD, "tid", "open a separate log file per thread; filename must contain '%d'" }, + { CPU_LOG_TB_VPU, "vpu", + "include VPU registers in the 'cpu' logging" }, { 0, NULL, NULL }, }; =20 --=20 2.34.1 From nobody Wed May 15 19:21:14 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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Mon, 10 Apr 2023 15:45:23 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mail; t=1681130723; bh=9Mb4Qwkx8fOHD6B0/BJrqGmPRtDY8NFbHmHYbVZV5AE=; h=Message-Id:Date:In-Reply-To:Cc:Subject:References:To:From; b=OpPS8Fac/XbYKqlvENFYXn6rF7Udw4MCTNMvVBpJcQ9fdoK5SGaMOI5NE7e+vnw1E BUddlO2aKZ0ECGgHpgwrF0uZ1wil90pkjhdBO6sPY2X6ITJoY/cqDLO5d37V2Bf93M xsqm3Wo7pl2wrQdeHBBGoo7rf/LYWVTPgctmPE2E= Authentication-Results: mail-nwsmtp-smtp-production-main-25.sas.yp-c.yandex.net; dkim=pass header.i=@syntacore.com From: Ivan Klokov To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, richard.henderson@linaro.org, pbonzini@redhat.com, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, Ivan Klokov Subject: [PATCH v3 2/2] target/riscv: Add RVV registers to log Date: Mon, 10 Apr 2023 15:44:51 +0300 Message-Id: <20230410124451.15929-3-ivan.klokov@syntacore.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230410124451.15929-1-ivan.klokov@syntacore.com> References: <20230410124451.15929-1-ivan.klokov@syntacore.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=178.154.239.151; envelope-from=ivan.klokov@syntacore.com; helo=forward206b.mail.yandex.net X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @syntacore.com) X-ZM-MESSAGEID: 1681130824976100005 Content-Type: text/plain; charset="utf-8" Print RvV extesion register to log if VPU option is enabled. Signed-off-by: Ivan Klokov Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 56 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 5bc0005cc7..cfd063a5dc 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -172,6 +172,14 @@ const char * const riscv_fpr_regnames[] =3D { "f30/ft10", "f31/ft11" }; =20 +const char * const riscv_rvv_regnames[] =3D { + "v0", "v1", "v2", "v3", "v4", "v5", "v6", + "v7", "v8", "v9", "v10", "v11", "v12", "v13", + "v14", "v15", "v16", "v17", "v18", "v19", "v20", + "v21", "v22", "v23", "v24", "v25", "v26", "v27", + "v28", "v29", "v30", "v31" +}; + static const char * const riscv_excp_names[] =3D { "misaligned_fetch", "fault_fetch", @@ -422,7 +430,8 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,= int flags) { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; - int i; + int i, j; + uint8_t *p; =20 #if !defined(CONFIG_USER_ONLY) if (riscv_has_ext(env, RVH)) { @@ -506,6 +515,51 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f= , int flags) } } } + if (riscv_has_ext(env, RVV) && (flags & CPU_DUMP_VPU)) { + static const int dump_rvv_csrs[] =3D { + CSR_VSTART, + CSR_VXSAT, + CSR_VXRM, + CSR_VCSR, + CSR_VL, + CSR_VTYPE, + CSR_VLENB, + }; + for (int i =3D 0; i < ARRAY_SIZE(dump_rvv_csrs); ++i) { + int csrno =3D dump_rvv_csrs[i]; + target_ulong val =3D 0; + RISCVException res =3D riscv_csrrw_debug(env, csrno, &val, 0, = 0); + + /* + * Rely on the smode, hmode, etc, predicates within csr.c + * to do the filtering of the registers that are present. + */ + if (res =3D=3D RISCV_EXCP_NONE) { + qemu_fprintf(f, " %-8s " TARGET_FMT_lx "\n", + csr_ops[csrno].name, val); + } + } + uint16_t vlenb =3D env_archcpu(env)->cfg.vlen >> 3; + +/* + * From vector_helper.c + * Note that vector data is stored in host-endian 64-bit chunks, + * so addressing bytes needs a host-endian fixup. + */ +#if HOST_BIG_ENDIAN +#define BYTE(x) ((x) ^ 7) +#else +#define BYTE(x) (x) +#endif + for (i =3D 0; i < 32; i++) { + qemu_fprintf(f, " %-8s ", riscv_rvv_regnames[i]); + p =3D (uint8_t *)env->vreg; + for (j =3D vlenb - 1 ; j >=3D 0; j--) { + qemu_fprintf(f, "%02x", *(p + i * vlenb + BYTE(j))); + } + qemu_fprintf(f, "\n"); + } + } } =20 static void riscv_cpu_set_pc(CPUState *cs, vaddr value) --=20 2.34.1