On Sun, 26 Feb 2023 09:05:12 PST (-0800), dbarboza@ventanamicro.com wrote:
> Based-on: 20230222185205.355361-2-dbarboza@ventanamicro.com
> ("[PATCH v7 01/10] target/riscv: introduce riscv_cpu_cfg()")
>
> Hi,
>
> This is a re-send of patch 1, which is already reviewed, with a
> follow-up that uses riscv_cpu_cfg() in the remaining of the file. This
> was suggested by Weiwei Li in the "[PATCH 0/4] RISCVCPUConfig related
> cleanups" review. Patch 1 makes the work of patch 2 easier since it
> eliminated some uses of env_archcpu() we want to avoid.
>
> Both patches depends on patch "[PATCH v7 01/10] target/riscv: introduce
> riscv_cpu_cfg()" that can be found here:
>
> https://patchew.org/QEMU/20230222185205.355361-1-dbarboza@ventanamicro.com/20230222185205.355361-2-dbarboza@ventanamicro.com/
>
>
> Daniel Henrique Barboza (2):
> target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
> target/riscv/vector_helper.c: avoid env_archcpu() when reading
> RISCVCPUConfig
>
> target/riscv/vector_helper.c | 104 +++++++++++++----------------------
> 1 file changed, 39 insertions(+), 65 deletions(-)
Thanks, these are queued up. If we're already broken on
non-power-of-two then that ROUND_UP() suggestion might be worth looking
at, as I doubt we'd want to support them even if the ISA allows for it.