[PATCH 0/4] Support x2APIC mode with TCG accelerator

Bui Quang Minh posted 4 patches 1 year, 2 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230221160500.30336-1-minhquangbui99@gmail.com
Maintainers: "Michael S. Tsirkin" <mst@redhat.com>, Peter Xu <peterx@redhat.com>, Jason Wang <jasowang@redhat.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Eduardo Habkost <eduardo@habkost.net>, Cleber Rosa <crosa@redhat.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Wainer dos Santos Moschetta <wainersm@redhat.com>, Beraldo Leal <bleal@redhat.com>
There is a newer version of this series
hw/i386/intel_iommu.c                |  11 --
hw/intc/apic.c                       | 211 +++++++++++++++++++++------
hw/intc/apic_common.c                |   2 +-
include/hw/i386/apic.h               |   5 +-
include/hw/i386/apic_internal.h      |   2 +-
target/i386/cpu-sysemu.c             |   5 +
target/i386/cpu.c                    |   5 +-
target/i386/cpu.h                    |   4 +
target/i386/tcg/sysemu/misc_helper.c |  27 ++++
tests/avocado/tcg_x2apic.py          |  91 ++++++++++++
10 files changed, 302 insertions(+), 61 deletions(-)
create mode 100644 tests/avocado/tcg_x2apic.py
[PATCH 0/4] Support x2APIC mode with TCG accelerator
Posted by Bui Quang Minh 1 year, 2 months ago
This series implements x2APIC mode in userspace local APIC and the
RDMSR/WRMSR helper to access x2APIC registers in x2APIC mode. With this
series, we can now boot up Linux kernel in x2APIC with TCG accelerator.

Bui Quang Minh (4):
  apic: add support for x2APIC mode
  i386/tcg: implement x2APIC registers MSR access
  intel_iommu: allow Extended Interrupt Mode when using userspace local
    APIC
  test/avocado: test Linux boot up in x2APIC with userspace local APIC

 hw/i386/intel_iommu.c                |  11 --
 hw/intc/apic.c                       | 211 +++++++++++++++++++++------
 hw/intc/apic_common.c                |   2 +-
 include/hw/i386/apic.h               |   5 +-
 include/hw/i386/apic_internal.h      |   2 +-
 target/i386/cpu-sysemu.c             |   5 +
 target/i386/cpu.c                    |   5 +-
 target/i386/cpu.h                    |   4 +
 target/i386/tcg/sysemu/misc_helper.c |  27 ++++
 tests/avocado/tcg_x2apic.py          |  91 ++++++++++++
 10 files changed, 302 insertions(+), 61 deletions(-)
 create mode 100644 tests/avocado/tcg_x2apic.py

-- 
2.25.1
Re: [PATCH 0/4] Support x2APIC mode with TCG accelerator
Posted by David Woodhouse 1 year, 1 month ago
On Tue, 2023-02-21 at 23:04 +0700, Bui Quang Minh wrote:
> This series implements x2APIC mode in userspace local APIC and the
> RDMSR/WRMSR helper to access x2APIC registers in x2APIC mode. With this
> series, we can now boot up Linux kernel in x2APIC with TCG accelerator.
> 
> Bui Quang Minh (4):
>   apic: add support for x2APIC mode
>   i386/tcg: implement x2APIC registers MSR access
>   intel_iommu: allow Extended Interrupt Mode when using userspace local
>     APIC
>   test/avocado: test Linux boot up in x2APIC with userspace local APIC

Please can you ensure CPUID 0x0B is correctly populated with the APIC
ID (and other information) when X2APIC is enabled?