[v3] nvic: Handle ARMv6-M SCS reserved registers

[Qemu-devel] [PATCH v3 0/2] nvic: Handle ARMv6-M SCS reserved registers

Julia Suvorova via Qemu-devel posted 2 patches 5 years, 9 months ago

Diff against v1 v2
Download series mbox

Failed in applying to current master (apply log)

hw/intc/armv7m_nvic.c             | 51 ++++++++++++++++++++++++--
tests/Makefile.include            |  2 ++
tests/tcg/arm/test-reserved-reg.c | 60 +++++++++++++++++++++++++++++++
3 files changed, 111 insertions(+), 2 deletions(-)
create mode 100644 tests/tcg/arm/test-reserved-reg.c

Expand all Fold all

[Qemu-devel] [PATCH v3 0/2] nvic: Handle ARMv6-M SCS reserved registers

Posted by Julia Suvorova via Qemu-devel 5 years, 9 months ago

v3:
    * Fix indents
v2:
    * Use ARM_FEATURE_M_MAIN instead of ARM_FEATURE_V7 in most cases
    * Remove CPUID registers check
    * Use bad_offset instead of return
    * Misc style fixes

Julia Suvorova (2):
  nvic: Handle ARMv6-M SCS reserved registers
  tests: Add ARMv6-M reserved register test

 hw/intc/armv7m_nvic.c             | 51 ++++++++++++++++++++++++--
 tests/Makefile.include            |  2 ++
 tests/tcg/arm/test-reserved-reg.c | 60 +++++++++++++++++++++++++++++++
 3 files changed, 111 insertions(+), 2 deletions(-)
 create mode 100644 tests/tcg/arm/test-reserved-reg.c

-- 
2.17.1